FML16N50ES

http://www.fujisemi.com FML16N50ES Super FAP-E3 series Features Maintains both low power loss and low noise Lower RDS(on) characteristic More controllable switching dv/dt by gate resistance Smaller VGS ringing waveform during switching Narrow band of the gate threshold voltage (4.2±0.5V) High avalanche durability FUJI POWER MOSFET N-CHANNEL SILICON POWER MOSFET Outline Drawings [mm] TFP 4 0.6±0.2 Equivalent circuit schematic 9.0± 0.2 0.1 7.0± 0.2 0.4± 0.1 0.5 4D 10.1±0.3 9.0±0.2 0.5±0.2 2.0 1.5 2.0 2.5 G1 (10.1) (5.8) Applications Switching regulators UPS (Uninterruptible Power Supply) DC-DC converters 1 1.0±0.2 1.0±0.2 S1 2 3 S2 0.4±0.1 3.6±0.2 2.8±0.2 Solder Plating (2.2) (4.0) (3.2) (0.8) Maximum Ratings and Characteristics Absolute Maximum Ratings at Tc=25°C (unless otherwise specified) Description Drain-Source Voltage Continuous Drain Current Pulsed Drain Current Gate-Source Voltage Repetitive and Non-Repetitive Maximum Avalanche Current Non-Repetitive Maximum Avalanche Energy Repetitive Maximum Avalanche Energy Peak Diode Recovery dV/dt Peak Diode Recovery -di/dt Maximum Power Dissipation Operating and Storage Temperature range Symbol VDS VDSX ID I DP VGS IAR E AS E AR dV/dt -di/dt PD Tch Tstg Characteristics 500 500 ±16 ±64 ±30 16 485 22.5 4.8 100 1.44 225 150 -55 to +150 Unit V V A A V A mJ mJ kV/µs A/µs W °C °C Remarks VGS = - 30V (2.1) 2 3 Note*1 Note*2 Note*3 Note*4 Note*5 Ta=25°C Tc=25°C Electrical Characteristics at Tc=25°C (unless otherwise specified) Description Drain-Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current Gate-Source Leakage Current Drain-Source On-State Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Time Turn-Off Time Total Gate Charge Gate-Source Charge Drain-Source Crossover Charge Gate-Drain Charge Avalanche Capability Diode Forward On-Voltage Reverse Recovery Time Reverse Recovery Charge Symbol BVDSS VGS (th) I DSS I GSS R DS (on) gfs Ciss Coss Crss td(on) tr td(off) tf QG Q GS Q SW Q GD IAV VSD trr Qrr Conditions I D =250µA, VGS=0V I D =250µA, VDS=VGS VDS=500V, VGS=0V VDS=400V, VGS=0V VGS=±30V, VDS=0V I D =8A, VGS=10V I D =8A, VDS=25V VDS=25V VGS=0V f=1MHz Vcc =300V VGS=10V I D =8A RG=18Ω Vcc =250V I D =16A VGS=10V L=1.52mH, Tch=25°C I F=16A, VGS=0V, Tch=25°C I F=16A, VGS=0V -di/dt=100A/µs, Tch=25°C min. 500 3.7 5.5 16 typ. 4.2 10 0.33 11 1700 210 13 37 30 87 17 48 17 7 18 0.90 0.46 6.0 max. 4.7 25 250 100 0.38 2550 315 19.5 55.5 45 130.5 25.5 72 25.5 10.5 27 1.35 Unit V V µA nA Ω S pF Tch=25°C Tch=125°C ns nC A V µS µC Thermal Characteristics Description Thermal resistance Symbol Rth (ch-c) Rth (ch-a) Rth (ch-a) Test Conditions Channel to case Channel to Ambient Channel to Ambient Note*6 min. typ. max. 0.56 87 52 Unit °C/W °C/W °C/W Note *1 : Tch≤150°C Note *2 : Stating Tch=25°C, IAS=5A, L=33.8mH, Vcc=50V, RG =10Ω, E AS limited by maximum channel temperature and avalanche current. Note *3 : Repetitive rating : Pulse width limited by maximum channel temperature. Note *4 : I F ≤-I D, -di/dt=100A/µs, Vcc≤BVDSS, Tch≤150°C. Note *5 : I F ≤-I D, dv/dt=6.3kV/µs, Vcc≤BVDSS, Tch≤150°C. Note *6 : Surface mounted on 1000mm2, t=1.6mm FR-4 PCB (Drain pad area : 500mm2) 1 FML16N50ES Allowable Power Dissipation PD=f(Tc) Safe Operating Area ID=f(VDS):Duty=0(Singlepulse), Tc=25˚c FUJI POWER MOSFET http://www.fujisemi.com 300 10 2 t= 1µs 10µs 250 10 200 1 100µs PD [W] 150 100 ID [A] 10 0 1ms 10 50 -1 Power loss waveform : Square waveform PD t 0 0 25 50 75 Tc [˚ C] 100 125 150 10 -2 10 0 10 1 VDS [V] 10 2 10 3 Typical Output Characteristics ID=f(VDS):80µs pulse test, Tch=25˚C 40 100 Typical Transfer Characteristic ID=f(VGS):80µs pulse test, VDS=25V, Tch=25˚C 10V 30 8.0V ID[A] 10 ID [A] 20 7.5V 1 7.0V 10 6.5V VGS=6.0V 0 0 4 8 12 VDS [V] 16 20 24 0 2 4 6 VGS[V] 8 10 12 0.1 Typical Transconductance gfs=f(ID):80µs pulse test, VDS=25V, Tch=25˚C 100 0.8 Typical Drain-Source on-state Resistance RDS(on)=f(ID):80µs pulse test, Tch=25˚C VGS=6.5V 0.7 7V 10 RDS(on)[Ω] 0.6 8V 10V 20V gfs [S] 0.5 1 0.4 0.3 0.1 0.1 1 ID [A] 10 100 0.2 0 10 20 ID [A] 30 40 2 FML16N50ES Drain-Source On-state Resistance RDS(on)=f(Tch):ID=8A, VGS=10V 1.2 1.1 1.0 0.9 0.8 0.7 RDS(on)[Ω] VGS(th)[V] FUJI POWER MOSFET http://www.fujisemi.com 8 7 6 5 Gate Threshold Voltage vs. Tch VGS(th)=f(Tch):VDS=VGS, ID=250µA max. 4 3 2 1 0 typ. min. 0.6 0.5 0.4 0.3 0.2 0.1 0.0 -50 -25 0 25 50 Tch [˚ C] 75 100 125 150 max. typ. -50 -25 0 25 50 75 Tch [˚ C] 100 125 150 Typical Gate Charge Characteristics VGS=f(Qg):ID=16A, Tch=25˚C 14 Typical Capacitance C=f(VDS):VGS=0V, f=1MHz 10 4 12 Vcc= 100V 250V 400V 10 10 3 Ciss VGS[V] C[pF] 8 10 2 6 Coss 4 10 2 1 Crss 0 0 20 40 Qg [nC] 60 80 10 0 10 -2 10 -1 10 0 10 1 10 2 VDS [V] Typical Forward Characteristics of Reverse Diode IF=f(VSD):80µs pulse test, Tch=25˚C 100 Typical Switching Characteristics vs. ID t=f(ID):Vcc=300V, VGS=10V, RG=18Ω 10 3 td(off) 10 10 2 tf IF[A] td(on) t[ns] tr 1 10 1 0.1 0.00 0.25 0.50 0.75 VSD [V] 1.00 1.25 1.50 10 0 10 -1 10 0 10 1 10 2 3 ID [A] FML16N50ES Maximum Avalanche Energy vs. starting Tch E(AV)=f(starting Tch):Vcc=50V, I(AV)