65nm CMOS Technology, CS200 / CS200A
Description
As miniaturization of silicon devices progresses, Fujitsu provides the most competitive, world-class technology to ASIC and COT customers. Fujitsu's 65nm technology has shrunk gates by 25% when compared to the 90nm technology. Fujitsu will start tape-out acceptance for the technology in early 2006.
Features
• The 30nm long gate, only 75% the size of the CS100 transistors. • 20 to 30% faster performance than the 90nm generation. • Transistor density doubled compared with the 90nm generation. • SRAM cell area reduced 50% compared with the 90nm generation.
Specifications
65nm (CS200)
Gate length Core VDD Gate oxide thickness (physical) Gate electrode Source / drain electrode Interconnects Metal 1 pitch Inter-level dielectric Drain current enhancement 30nm 1.0V 1.1nm NiSi / Poly-Si NiSi 11-Cu + 1-Al 0.18µm Porous ULK (k = 2.25) Advanced stress control
65nm (CS200A)
50nm 1.2V 1.7nm CoSi2 / Poly-Si CoSi2
65nm CMOS Technology, CS200 / CS200A
Technology Lineup
CS200A: Wide Speed Range + Low Power Consumption
Large Low Power Lineup CS200A
HS-Tr HS-Tr Server/ Network STD-Tr UHS-Tr HV-Tr Mobile Computing High End Server
Standard Vdd UHS HS STD LL HVt 1.8V 2.5V 3.3V 3.3V LVt 6T Symmetry
Technology families CS200A CS200 1.2V x x x x x x x x 0.535µm2 1.0V x x x x x
Leakage current
Core
STD-Tr Digital Consumer LL-Tr Cellular Phone
High Performance Lineup CS200
UHS:Ultra high speed, HS:High speed STD:Standard, LL:Low leakage
I/O SRAM
Speed
Fast
0.595µm2
Fujitsu provides two series of technology: CS200 for high-end use such as high-performance server CPU chips, and CS200A for low-power or mobile use. The CS200A technology, in particular, provides a great variety of transistors from low-leakage (LL) for cellular phones to ultra-high-speed (UHS) for servers or network devices. Customer can mix the transistors in a chip to meet their needs. The 65nm family consists of the low-power CS200A and the high-performance CS200, giving customers the flexibility to choose the appropriate technology to differentiate their products. The HVt (high Vth transistor) of the CS200 achieves higher
performance. The I/O ranges from 1.8V to 3.3V. For the CS200A, 1.8 (2.5 or 3.3V) I/O-transistors can be embedded in a chip. The SRAM memory cell size is less than 0.6µm2. SPICE simulations for some benchmarking circuits show that the new product is 20 to 30% faster than the previous version. The great performance improvement is a result of Fujitsu's advanced technology, which was developed for the company's high-performance servers. The chip size of the CS200 is only 60% the size of CS100, when making the same spec LSI, which is 4M gate logic and 2M gate macro. (SRAM: 0.5Mbit, PLL, etc.)
CS200 Circuit Delay Performance (ps per gate) CS200 CS100 Inverter 5.7 7.0 2-input NAND 8.7 11.4 2-input NAND + 200-grid interconnect load 23.1 30.8
Delay reduction 77% 69% 67%
IP Portfolio
Fujitsu's foundry services offer an extensive IP lineup, including CPU cores, image cores, encryption, interface controllers and high-speed I/O, all prepared for 65nm ASIC. Fujitsu provides a one-stop, turnkey packaging service, which includes package design, simulation, assembly and testing. Packaging options include standard BGA and Flip-Chip BGA (FC-BGA). Fujitsu is the acknowledged global leader in advanced packaging technology, innovation, patents and manufacturing techniques.
FUJITSU MICROELECTRONICS AMERICA, INC.
Corporate Headquarters 1250 E. Arques Ave. Sunnyvale, CA 94088-3470 Tel: (800) 866-8608 Fax: (408) 737-5999 E-mail: inquiry@fma.fujitsu.com Web Site: http://us.fujitsu.com/micro
©2005 Fujitsu Microelectronics America, Inc. All company and product names are trademarks or registered trademarks of their respective owners. Printed in the U.S.A. WFS-FS-21139-9/2005
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