MB3773PF-G-BND-JN-ERE1

FUJITSU MICROELECTRONICS DATA SHEET DS04-27401-8Ea ASSP BIPOLAR Power Supply Monitor with Watch-Dog Timer MB3773 ■ DESCRIPTION MB3773 generates the reset signal to protect an arbitrary system when the power-supply voltage momentarily is intercepted or decreased. It is IC for the power-supply voltage watch and “Power on reset” is generated at the normal return of the power supply. MB3773 sends the microprocessor the reset signal when decreasing more than the voltage, which the power supply of the system specified, and the computer data is protected from an accidental deletion. In addition, the watch-dog timer for the operation diagnosis of the system is built into, and various microprocessor systems can provide the fail-safe function. If MB3773 does not receive the clock pulse from the processor for a specified period, MB3773 generates the reset signal. ■ FEATURES • • • • • • • • Precision voltage detection (VS = 4.2 V ± 2.5 %) Detection threshold voltage has hysteresis function Low voltage output for reset signal (VCC = 0.8 V Typ) Precision reference voltage output (VR = 1.245 V ± 1.5%) With built-in watch-dog timer of edge trigger input. External parts are few.(1 piece in capacity) The reset signal outputs the positive and negative both theories reason. One type of package (SOP-8pin : 1 type) ■ APPLICATION • Industrial Equipment • Arcade Amusement etc. Copyright©2003-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved 2006.5 MB3773 ■ PIN ASSIGNMENT (TOP VIEW) CT 1 8 RESET RESET 2 7 VS CK 3 6 V REF GND 4 5 V CC (FPT-8P-M01) 2 MB3773 ■ BLOCK DIAGRAM VCC 5 Reference AMP =: 1.24 V =: 1.24 V Reference Voltage Generator =: 100 =: 1.2 µA kΩ COMP.S + VS 7 + _ _ R _ COMP.O + + 6 VREF 4 GND =: 10 µA =: 10 µA Q _ S =: 40 kΩ Inhibit CK WatchDog Timer 3 P.G 1 8 CT RESET 2 RESET 3 MB3773 ■ FUNCTIONAL DESCRIPTIONS Comp.S is comparator including hysteresis. it compare the reference voltage and the voltage of Vs, so that when the voltage of Vs terminal falls below approximately 1.23 V, reset signal outputs. Instantaneous breaks or drops in the power can be detected as abnormal conditions by the MB3773 within a 2 µs interval. However because momentary breaks or drops of this duration do not cause problems in actual systems in some cases, a delayed trigger function can be created by connecting capacitors to the Vs terminal. Comp.O is comparator for turning on/off the output and, compare the voltage of the CT terminal and the threshold voltage. Because the RESET/RESET outputs have built-in pull-up circuit, there is no need to connect to external pull-up resistor when connected to a high impedance load such as CMOS logic IC. (It corresponds to 500 kΩ at Vcc = 5 V.) when the voltage of the CK terminal changes from the “high” level into the “Low” level, pulse generator is sent to the watch-dog timer by generating the pulse momentarily at the time of drop from the threshold level. When power-supply voltages fall more than detecting voltages, the watch-dog timer becomes an interdiction. The Reference amplifier is an op-amp to output the reference voltage. If the comparator is put up outside, two or more power-supply voltage monitor and overvoltage monitor can be done. If it uses a comparator of the open-collector output, and the output of the comparator is connected with the Vs terminal of MB3773 without the pull-up resistor, it is possible to voltage monitor with reset-hold time. 4 MB3773 • MB3773 Basic Operation VCC VCC CT Logic Circuit TPR (ms) =: 1000 · CT (µF) TWD (ms) =: 100 · CT (µF) TWR (ms) =: 20 · CT (µF) RESET RESET CK RESET RESET CK Example : CT = 0.1 µF TRR (ms) =: 100 (ms) TWD (ms) =: 10 (ms) TWR (ms) =: 2 (ms) GND VCC VSH VSL 0.8 V CK TCK CT TPR RESET (1) (2) TWD TWR (3)(4)(5) (5) (6) (7) TPR (8)(9) (10) (11) (12) 5 MB3773 ■ OPERATION SEQUENCE (1) When Vcc rises to about 0.8 V, RESET goes “Low” and RESET goes “High”. The pull-up current of approximately 1 µA (Vcc = 0.8 V) is output from RESET. (2) When Vcc rises to VSH ( =: 4.3V) , the charge with CT starts. At this time, the output is being reset. (3) When CT begins charging, RESET goes “High” and RESET goes “Low”. After TPR reset of the output is released. Reset hold time: TPR (ms) =: 1000 × CT (µF) After releasing reset, the discharge of CT starts, and watch-dog timer operation starts. TPR is not influenced by the CK input. (4) C changes from the discharge into the charge if the clock (Negative edge) is input to the CK terminal while discharging CT. (5) C changes from the charge into the discharge when the voltage of CT reaches a constant threshold ( =: 1.4 V) . (4) and (5) are repeated while a normal clock is input by the logic system. (6) When the clock is cut off, gets, and the voltage of CT falls on threshold ( =: 0.4 V) of reset on, RESET goes “Low” and RESET goes “High”. Discharge time of CT until reset is output: TWD is watch-dog timer monitoring time. TWD (ms) =: 100 × CT (µF) Because the charging time of CT is added at accurate time from stop of the clock and getting to the output of reset of the clock, TWD becomes maximum TWD + TWR by minimum TWD. (7) Reset time in operating watch-dog timer:TWR is charging time where the voltage of CT goes up to off threshold ( =: 1.4 V) for reset. TWR (ms) =: 20 × CT (µF) Reset of the output is released after CT reaches an off threshold for reset, and CT starts the discharge, after that if the clock is normally input, operation repeats (4) and (5) , when the clock is cut off, operation repeats (6) and (7) . (8) When Vcc falls on VSL ( =: 4.2 V) , reset is output. CT is rapidly discharged of at the same time. (9) When Vcc goes up to VSH, the charge with CT is started. When Vcc is momentarily low, After falling VSL or less Vcc, the time to going up is the standard value of the Vcc input pulse width in VSH or more. After the charge of CT is discharged, the charge is started if it is TPI or more. (10) Reset of the output is released after TPR, after Vcc becomes VSH or more, and the watch-dog timer starts. After that, when Vcc becomes VSL or less, (8) to (10) is repeated. (11) While power supply is off, when Vcc becomes VSL or less, reset is output. (12) The reset output is maintained until Vcc becomes 0.8 V when Vcc falls on 0 V. 6 MB3773 ■ ABSOLUTE MAXIMUM RATINGS Rating Parameter Symbol Unit Min Max VCC − 0.3 + 18 V VS − 0.3 VCC + 0.3 ( ≤ +18) V VCK − 0.3 + 18 V RESET, RESET Supply voltage VOH − 0.3 VCC + 0.3 ( ≤ +18) V Power dissipation (Ta ≤ +85 °C) PD  200 mW TSTG − 55 + 125 °C Supply voltage Input voltage Storage temperature WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. ■ RECOMMENDED OPERATING CONDITIONS Value Parameter Symbol Unit Min Max Supply voltage VCC + 3.5 + 16 V RESET, RESET sink current IOL 0 20 mA VREF output current IOUT − 200 +5 µA Watch clock setting time tWD 0.1 1000 ms CK Rising/falling time tFC, tRC  100 µs Terminal capacitance CT 0.001 10 µF Operating ambient temperature Ta − 40 + 85 °C WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. 7 MB3773 ■ ELECTORICAL CHARACTERISTICS (1) DC Characteristics (VCC = 5 V, Ta = + 25 °C) Value Parameter Supply current Symbol ICC VSL Condition Min Typ Max Unit  600 900 µA VCC 4.10 4.20 4.30 Ta = − 40 °C to + 85 °C 4.05 4.20 4.35 VCC 4.20 4.30 4.40 Ta = − 40 °C to + 85 °C 4.15 4.30 4.45 50 100 150 1.227 1.245 1.263 1.215 1.245 1.275 Watch-dog timer operating Detection voltage V VSH Hysteresis width VHYS Reference voltage VREF VCC  V Reference voltage change rate ∆VREF1 VCC = 3.5 V to 16 V  3 10 mV Reference voltage output loading change rate ∆VREF2 IOUT = − 200 µA to + 5 µA −5  +5 mV VTH Ta = − 40 °C to + 85 °C 0.8 1.25 2.0 V IIH VCK = 5.0 V  0 1.0 IIL VCK = 0.0 V − 1.0 − 0.1  7 10 14 CK threshold voltage CK input current CT discharge current Watch-dog timer operating VCT = 1.0 V VOH1 VS open, IRESET = − 5 µA 4.5 4.9  VOH2 VS = 0 V, IRESET = − 5 µA 4.5 4.9  VOL1 VS = 0 V, IRESET = 3 mA  0.2 0.4 VOL2 VS = 0 V, IRESET = 10 mA  0.3 0.5 VOL3 VS open, IRESET = 3 mA  0.2 0.4 VOL4 VS open, IRESET = 10 mA  0.3 0.5 IOL1 VS = 0 V, VRESET = 1.0 V 20 60  IOL2 VS open, VRESET = 1.0 V 20 60  ICTU Power on reset operating VCT = 1.0 V 0.5 1.2 2.5 µA Output saturation voltage Output sink current CT charge current µA ICTD High level output voltage 8 Ta = − 40 °C to + 85 °C mV µA V V mA Min supply voltage for RESET VCCL1 VRESET = 0.4 V, IRESET = 0.2 mA  0.8 1.2 V Min supply voltage for RESET VCCL2 VRESET = VCC − 0.1 V, RL (between pin 2 and GND) = 1 MΩ  0.8 1.2 V MB3773 (2)AC Characteristics Parameter Symbol Condition 5V 8.0   µs 3.0   µs 20   µs CT = 0.1 µF 5 10 15 ms TWR CT = 0.1 µF 1 2 3 ms TPR CT = 0.1 µF, VCC 50 100 150 ms TPD1 RESET, RL = 2.2 kΩ, CL = 100 pF  2 10 TPD2 RESET, RL = 2.2 kΩ, CL = 100 pF  3 10 VCC input pulse width TPI VCC CK input pulse width TCKW CK CK input frequency TCK Watch-dog timer watching time TWD Watch-dog timer reset time Rising reset hold time Output propagation delay time from VCC (VCC = 5 V, Ta = + 25 °C) Value Unit Min Typ Max 4V or  µs Output rising time* tR RL = 2.2 kΩ, CL = 100 pF  1.0 1.5 Output falling time* tF RL = 2.2 kΩ, CL = 100 pF  0.1 0.5 µs * : Output rising/falling time are measured at 10 % to 90 % of voltage. 9 MB3773 ■ TYPICAL CHARACTERISTIC CURVES Output voltage vs. Supply voltage Supply current vs. Supply voltage (RESET terminal) 6.0 Ta = + 85 °C Ta = + 25 °C 0.65 Ta = − 40 °C 0.55 CT = 0.1 µF 0.45 Ta = − 40 °C Ta = + 25 °C 0.35 Ta = + 85 °C 0.25 0.15 0 2.0 4.0 6.0 Output voltage VRESET (V) Supply current ICC (mA) 0.75 Pull up 2.2 kΩ 5.0 Ta = − 40 °C, + 25 °C, + 85 °C 4.0 3.0 2.0 1.0 0 8.0 10.0 12.0 14.0 16.0 18.0 20.0 1.0 2.0 3.0 4.0 (RESET terminal) Pull up 2.2 kΩ 5.0 4.0 3.0 2.0 Ta = + 85 °C Ta = + 25 °C Ta = − 40 °C 2.0 3.0 4.0 5.0 6.0 (RESET, RESET terminal) Detection voltage VSH, VSL (V) Output voltage VRESET (V) 6.0 1.0 4.50 4.44 VSH 4.30 VSL 4.20 4.10 4.00 −40 7.0 400 300 Ta = + 25 °C Ta = + 85 °C 200 100 0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 Output sink current IOL2 (mA) +20 +40 +60 +80 +100 (RESET terminal) Output saturation voltage VOL2 (mV) Output saturation voltage VOL2 (mV) CT = 0.1µF 0 Output saturation voltage vs. Output sink current Output saturation voltage vs. Output sink current (RESET terminal) −20 Operating ambient temperature Ta ( °C) Supply voltage VCC (V) Ta = − 40 °C 7.0 Detection voltage (VSH, VSL) vs. Operating ambient temperature Output voltage vs. Supply voltage 0 6.0 Supply voltage VCC (V) Supply voltage VCC (V) 1.0 5.0 500 CT = 0.1µF Ta = −40 °C 400 300 Ta = +25 °C Ta = +85 °C 200 100 0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 Output sink current IOL8 (mA) (Continued) 10 MB3773 High level output voltage vs. High level output current (RESET terminal) 5.0 CT = 0.1 µF Ta = +25 °C Ta = −40 °C 4.5 4.0 Ta = +85 °C −5 0 −10 High level output voltage VOH8 (V) High level output voltage VOH2 (V) High level output voltage vs. High level output current −15 (RESET terminal) 5.0 CT = 0.1 µF Ta = −40 °C 4.5 4.0 −5 0 Reference voltage vs. Supply voltage 1.255 CT = 0.1 µF Ta = +85 °C 1.242 Ta = −40 °C 1.240 CT = 0.1 µF 1.238 1.236 1.234 0 Reference voltage VREF (V) Ta = +25 °C 1.244 −15 Reference voltage vs. Reference current 1.246 Reference voltage VREF (V) −10 High level output current IOH8 (µA) High level output current IOH2 (µA) 1.250 Ta = +25 °C 1.245 Ta = +85 °C Ta = −40 °C 1.240 −40 0 3.0 5.0 7.0 9.0 11.0 13.0 15.0 17.0 19.0 21.0 Supply voltage VCC (V) −80 −120 −160 −200 −240 Reference current IREF (µA) Reference voltage vs. Operating ambient temperature Rising reset hold time vs. Operating ambient temperature 160 Rising reset hold time TPR (ms) 1.27 Reference voltage VREF (V) Ta = +25 °C Ta = +85 °C 1.26 1.25 1.24 1.23 1.22 1.21 −40 −20 0 +20 +40 +60 +80 +100 Operating ambient temperature Ta ( °C) VCC = 5 V CT = 0.1 µF 140 120 100 80 60 40 0 −40 −20 0 +20 +40 +60 +80 +100 Operating ambient temperature Ta ( °C) (Continued) 11 MB3773 (Continued) Reset time vs. Operating ambient temperature Watch-dog timer watching time vs. Operating ambient temperature (At watch-dog timer) 2 1 0 −40 −20 0 +20 +40 +60 12 10 8 6 4 0 +80 +100 Operating ambient temperature Ta ( °C) Watch-dog timer watching time vs. CT terminal capacitance VCC = 5 V CT = 0.1 µF 14 Watch-dog timer watching time TWD (ms) Reset time TWR (ms) 16 VCC = 5 V CT = 0.1 µF 3 −40 −20 0 +20 +40 +60 +80 +100 Operating ambient temperature Ta ( °C) Reset time vs. CT terminal capacitance Rising reset hold time vs. CT terminal capacitance (at watch-dog timer) 10 6 10 6 10 4 10 3 10 2 Ta = −40 °C Ta = +25 °C, +85 °C 10 1 10 0 10 −1 Reset time TWR (ms) Watch-dog timer watching time TWD (ms) 10 5 10 1 Ta = +25 °C, +85 °C 10 0 10 −1 Ta = −40 °C 10 −2 10 −2 10 −3 10 −3 10 −2 10 −1 10 0 10 1 10 2 CT terminal capacitance CT (µF) 12 10 −3 Rising reset hold time TPR (ms) 10 2 10 −3 10 −2 10 −1 10 0 10 1 10 2 CT terminal capacitance CT (µF) 10 5 10 4 10 3 10 2 10 1 Ta = −40 °C Ta = +25 °C, +85 °C 10 0 10 −1 10 −2 10 −3 10 −3 10 −2 10 −1 10 0 10 1 10 2 CT terminal capacitance CT (µF) MB3773 ■ APPLICATION CIRCUIT EXAMPLE 1: Monitoring 5V Supply Voltage and Watch-dog Timer VCC (5V) MB3773 8 7 6 5 1 2 3 4 CT Logic circuit RESET RESET CK GND Notes : • Supply voltage is monitored using VS. • Detection voltage are VSH and VSL. EXAMPLE 2: 5V Supply Voltage Monitoring (external fine-tuning type) VCC (5V) MB3773 1 2 3 4 CT R1 8 7 6 5 R2 Logic circuit RESET RESET CK GND Notes : • Vs detection voltage can be adjusted externally. • Based on selecting R1 and R2 values that are sufficiently lower than the resistance of the IC’s internal voltage divider, the detection voltage can be set according to the resistance ratio of R1 and R2 (Refer to the table below.) R1 (kΩ) R2 (kΩ) Detection voltage: VSL (V) Detection voltage: VSH (V) 10 3.9 4.4 4.5 9.1 3.9 4.1 4.2 13 MB3773 EXAMPLE 3: With Forced Reset (with reset hold) (a) VCC MB3773 CT 1 2 3 4 Logic circuit 8 7 6 5 SW RESET RESET CK GND Note : Grounding pin 7 at the time of SW ON sets RESET (pin 8) to Low and RESET (pin 2) to High. (b) VCC MB3773 Cr 1 2 3 4 8 7 6 5 Logic circuit Tr 10 kΩ RESET RESET CK GND 10 kΩ RESIN Note : Feeding the signal to terminal RESIN and turning on Tr sets the RESET terminal to Low and the RESET terminal to High. 14 MB3773 EXAMPLE 4: Monitoring Two Supply Voltages (with hysteresis, reset output and NMI) VCC2(12 V) VCC1 (5 V) Logic circuit MB3773 CT 1 2 3 4 RESET 8 7 6 5 RESET CK 30 kΩ R3 180 kΩ 10 kΩ R6 R4 NMI or port GND + _ + _ Comp. 1 1.2 kΩ R1 5.1 kΩ R2 Comp. 2 4.7 kΩ R5 Example : Comp. 1, Comp. 2 : MB4204, MB47393 Notes : • The 5 V supply voltage is monitored by the MB3773. • The 12 V supply voltage is monitored by the external circuit. Its output is connected to the NMI terminal and, when voltage drops, Comp. 2 interrupts the logic circuit. • Use VCC1 ( = 5 V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown above. • The detection voltage of the VCC2 ( = 12 V) supply voltage is approximately 9.2 V/9.4 V and has a hysteresis width of approximately 0.2 V. VCC2 detection voltage and hysteresis width can be found using the following formulas: → Detection voltage V2H = V2L = → Hysteresis width R3 + (R4 // R5) R4 // R5 R3 + R5 R5 × VREF × VREF (Approximately 9.4 V in the above illustration) (Approximately 9.2 V in the above illustration) VHYS = V2H − V2L 15 MB3773 EXAMPLE 5: Monitoring Two Supply Voltages (with hysteresis and reset output) VCC2 (12 V) VCC1 (5 V) 20 kΩ R6 MB3773 CT 1 2 3 4 8 7 6 5 30 kΩ R3 Diode Logic circuit RESET RESET CK GND 180 kΩ R4 + _ + _ Comp. 1 1.2 kΩ R1 5.1 kΩ R2 Comp. 2 4.7 kΩ R5 Example : Comp. 1, Comp. 2 : MB4204, MB47393 Notes : • When either 5 V or 12 V supply voltage decreases below its detection voltage (VSL), the MB3773 RESET terminal is set to High and the MB3773 RESET terminal is set to Low. • Use VCC1 ( = 5 V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown above. • The detection voltage of the VCC2 ( = 12 V) supply voltage is approximately 9.2 V/9.4 V and has a hysteresis width of approximately 0.2 V. For the formulas for finding hysteresis width and detection voltage, refer to section 4. 16 MB3773 EXAMPLE 6: Monitoring Low voltage and Overvoltage Monitoring (with hysteresis) VCC (5 V) 20 kΩ R6 MB3773 CT 1 2 3 4 8 7 6 5 RESET RESET CK GND Diode 30 kΩ R3 Logic circuit 180 kΩ R4 + _ _ 5.6 kΩ R6 + Comp. 1 1.2 kΩ R1 Comp. 2 4.7 kΩ R5 Example : Comp. 1, Comp. 2 : MB4204, MB47393 RESET 0 V1L V1H V2L V2H VCC Notes : • Comp. 1 and Comp. 2 are used to monitor for overvoltage while the MB3773 is used to monitor for low voltage. Detection voltages V1L/V1H at the time of low voltage are approximately 4.2 V/4.3 V. Detection voltages V2L/V2H at the time of overvoltage are approximately 6.0 V/6.1 V. For the formulas for finding hysteresis width and detection voltage, see EXAMPLE 4. • Use VCC ( = 5 V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown above. 17 MB3773 EXAMPLE 7: Monitoring Supply Voltage Using Delayed Trigger VCC 5V VCC 4V MB3773 CT 1 2 3 4 8 7 6 5 Logic circuit C1 RESET RESET CK GND Note : Adding voltage such as shown in the figure to VCC increases the minimum input pulse width by 50 µs (C1 = 1000 pF). 18 MB3773 EXAMPLE 8: Stopping Watch-dog Timer (Monitoring only supply voltage) These are example application circuits in which the MB3773 monitors supply voltage alone without resetting the microprocessor even if the latter, used in standby mode, stops sending the clock pulse to the MB3773. • The watch-dog timer is inhibited by clamping the CT terminal voltage to VREF. The supply voltage is constantly monitored even while the watch-dog timer is inhibited. For this reason, a reset signal is output at the occurrence of either instantaneous disruption or a sudden drop to low voltage. Note that in application examples (a) and (b), the hold signal is inactive when the watch-dog timer is inhibited at the time of resetting. If the hold signal is active when tie microprocessor is reset, the solution is to add a gate, as in examples (c) and (d). (a) Using NPN transistor VCC(5 V) MB3773 1 2 3 4 Logic circuit RESET RESET CK HALT 8 7 6 5 GND R2=1 kΩ R1=1 MΩ CT (b) Using PNP transistor VCC (5 V) MB3773 Logic circuit 1 8 RESET 2 7 3 6 4 5 RESET CK HALT GND R2=1 kΩ R1=51 kΩ CT (Continued) 19 MB3773 (Continued) (c) Using NPN transistor VCC (5 V) MB3773 1 2 3 4 Logic circuit 8 7 6 5 R1=1 MΩ RESET RESET CK HALT GND R2=1 kΩ CT (d) Using PNP transistor VCC (5 V) MB3773 1 2 3 4 Logic circuit 8 7 6 5 R1=51 kΩ RESET RESET CK HALT GND R2=1 kΩ CT 20 MB3773 EXAMPLE 9: Reducing Reset Hold Time VCC ( = 5 V) VCC( = 5 V) MB3773 CT 1 2 3 4 8 7 6 5 MB3773 Logic circuit RESET RESET CK GND CT 1 2 3 4 8 7 6 5 Logic circuit RESET RESET CK GND (b) Standard usage (a) TPR reduction method Notes : • RESET is the only output that can be used. • Standard TPR, TWD and TWR value can be found using the following formulas. Formulas: TPR (ms) =: 100 × CT (µF) TWD (ms) =: 100 × CT (µF) TWR (ms) =: 16 × CT (µF) • The above formulas become standard values in determining TPR, TWD and TWR. Reset hold time is compared below between the reduction circuit and the standard circuit. CT = 0.1 µF TPR reduction circuit Standard circuit TPR =: 10 ms 100 ms TWD =: 10 ms 10 ms TWR =: 1.6 ms 2.0 ms 21 MB3773 EXAMPLE 10: Circuit for Monitoring Multiple Microprocessor FF1 S D 1 Q1 FF2 S D2 Q 2 VCC ( = 5 V) FF3 S D3 Q3 CK1 Q1 CK2 Q2 CK3 Q3 R R R R2 R1 * * * RESET RESET RESET RESET RESET RESET CK CK CK GND GND GND CT *: Microprocessor 1 2 8 7 3 4 6 5 MB3773 Figure 1 Notes : • connects from FF1 and FF2 outputs Q1 and Q2 to the NOR input. • Depending on timing, these connections may not be necessary. • Example : R1 = R2 = 2.2 kΩ CT = 0.1 µF CK1 Q1 CK2 Q2 CK3 Q3 NOR Output 22 Figure 2 MB3773 Description of Application Circuits Using one MB3773, this application circuit monitors multiple microprocessor in one system. Signals from each microprocessor are sent to FF1, FF2 and FF3 clock inputs. Figure 2 shows these timings. Each flip-flop operates using signals sent from microprocessor as its clock pulse. When even one signal stops, the relevant receiving flip-flop stops operating. As a result, cyclical pulses are not generated at output Q3. Since the clock pulse stops arriving at the CK terminal of the MB3773, the MB3773 generates a reset signal. Note that output Q3 frequency f will be in the following range, where the clock frequencies of CK1, CK2 and CK3 are f1, f2 and f3 respectively. 1 1 1 1 1 ---- ≤ --- ≤ --- + ---- + ---f0 f f1 f2 f3 where f0 is the lowest frequency among f1, f2 and f3. 23 MB3773 EXAMPLE 11: Circuit for Limiting Upper Clock Input Frequency VCC (5 V) R2 CT RESET 8 7 6 5 1 2 3 4 RESET R1=10 kΩ CK GND Tr1 C2 Notes : • This is an example application to limit upper frequency fH of clock pulses sent from the microprocessor. If the CK cycle sent from the microprocessor exceeds fH, the circuit generates a reset signal. (The lower frequency has already been set using CT.) • When a clock pulse such as shown below is sent to terminal CK, a short T2 prevents C2 voltage from reaching the CK input threshold level ( =: 1.25 V), and will cause a reset signal to be output. The T1 value can be found using the following formula : T1 =: 0.3 C2R2 where VCC = 5 V, T3 ≥ 3.0 µs, T2 ≥ 20 µs T2 CK waveform T3 C2 voltage T1 Example : Setting C and R allow the upper T1 value to be set (Refer to the table below). 24 C R T1 0.01 µF 10 kΩ 30 µs 0.1 µF 10 kΩ 300 µs MB3773 ■ NOTES ON USE • Take account of common impedance when designing the earth line on a printed wiring board. • Take measures against static electricity. - For semiconductors, use antistatic or conductive containers. - When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container. - The work table, tools and measuring instruments must be grounded. - The worker must put on a grounding device containing 250 kΩ to 1 MΩ resistors in series. • Do not apply a negative voltage - Applying a negative voltage of −0.3 V or less to an LSI may generate a parasitic transistor, resulting in malfunction. ■ ORDERING INFORMATION Part number Package Remarks MB3773PF-❏❏❏ 8-pin plastic SOP (FPT-8P-M01) Conventional version MB3773PF-❏❏❏E1 8-pin plastic SOP (FPT-8P-M01) Lead Free version ■ RoHS Compliance Information of Lead (Pb) Free version The LSI products of Fujitsu Microelectronics with “E1” are compliant with RoHS Directive , and has observed the standard of lead, cadmium, mercury, Hexavalent chromium, polybrominated biphenyls (PBB) , and polybrominated diphenyl ethers (PBDE) . The product that conforms to this standard is added “E1” at the end of the part number. ■ MARKING FORMAT (Lead Free version) Lead-Free version 3773 E1XXXX XXX INDEX 25 MB3773 ■ LABELING SAMPLE (Lead free version) lead-free mark JEITA logo MB123456P - 789 - GE1 (3N) 1MB123456P-789-GE1 1000 (3N)2 1561190005 107210 JEDEC logo G Pb QC PASS PCS 1,000 MB123456P - 789 - GE1 2006/03/01 ASSEMBLED IN JAPAN MB123456P - 789 - GE1 1/1 0605 - Z01A 1561190005 Lead-Free version 26 1000 MB3773 ■ MB3773PF-❏❏❏E1 RECOMMENDED CONDITIONS OF MOISTURE SENSITIVITY LEVEL Item Condition Mounting Method IR (infrared reflow) , Manual soldering (partial heating method) Mounting times 2 times Storage period Before opening Please use it within two years after Manufacture. From opening to the 2nd reflow Less than 8 days When the storage period after opening was exceeded Please processes within 8 days after baking (125 °C, 24h) 5 °C to 30 °C, 70%RH or less (the lowest possible humidity) Storage conditions [Temperature Profile for FJ Standard IR Reflow] (1) IR (infrared reflow) 260 °C H rank : 260 °C Max. 255 °C 170 °C to 190 °C (b) RT (a) (a) Temperature Increase gradient (b) Preliminary heating (c) Temperature Increase gradient (d) Actual heating (d’) (e) Cooling (c) (d) (e) (d') : Average 1 °C/s to 4 °C/s : Temperature 170 °C to 190 °C, 60s to 180s : Average 1 °C/s to 4 °C/s : Temperature 260 °C MAX; 255 °C or more, 10s or less : Temperature 230 °C or more, 40s or less or Temperature 225 °C or more, 60s or less or Temperature 220 °C or more, 80s or less : Natural cooling or forced cooling Note : Temperature : the top of the package body (2) Manual soldering (partial heating method) Conditions : Temperature 400 °C MAX Times : 5 s max/pin 27 MB3773 ■ PACKAGE DIMENSION 8-pin plastic SOP (FPT-8P-M01) 8-pin plastic SOP (FPT-8P-M01) Lead pitch 1.27 mm Package width × package length 5.3 × 6.35 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 2.25 mm MAX Weight 0.10 g Code (Reference) P-SOP8-5.3×6.35-1.27 Note 1) *1 : These dimensions include resin protrusion. Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. +0.25 +.010 +0.03 *1 6.35 –0.20 .250 –.008 0.17 –0.04 +.001 8 .007 –.002 5 *2 5.30±0.30 7.80±0.40 (.209±.012) (.307±.016) INDEX Details of "A" part +0.25 2.00 –0.15 +.010 .079 –.006 1 1.27(.050) "A" 4 0.47±0.08 (.019±.003) 0.13(.005) (Mounting height) 0.25(.010) 0~8˚ M 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) +0.10 0.10 –0.05 +.004 .004 –.002 (Stand off) 0.10(.004) C 28 2002 FUJITSU LIMITED F08002S-c-6-7 Dimensions in mm (inches). Note: The values in parentheses are reference values. MB3773 MEMO 29 MB3773 MEMO 30 MB3773 MEMO 31 FUJITSU MICROELECTRONICS LIMITED Shinjuku Dai-Ichi Seimei Bldg. 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ For further information please contact: North and South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://www.fma.fujitsu.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE LTD. 151 Lorong Chuan, #05-08 New Tech Park, Singapore 556741 Tel: +65-6281-0770 Fax: +65-6281-0220 http://www.fujitsu.com/sg/services/micro/semiconductor/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Pittlerstrasse 47, 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/microelectronics/ FUJITSU MICROELECTRONICS SHANGHAI CO., LTD. Rm.3102, Bund Center, No.222 Yan An Road(E), Shanghai 200002, China Tel: +86-21-6335-1560 Fax: +86-21-6335-1605 http://cn.fujitsu.com/fmc/ Korea FUJITSU MICROELECTRONICS KOREA LTD. 206 KOSMO TOWER, 1002 Daechi-Dong, Kangnam-Gu,Seoul 135-280 Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://www.fmk.fujitsu.com/ FUJITSU MICROELECTRONICS PACIFIC ASIA LTD. 10/F., World Commerce Centre, 11 Canton Road Tsimshatsui, Kowloon Hong Kong Tel: +852-2377-0226 Fax: +852-2376-3269 http://cn.fujitsu.com/fmc/tw All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information. 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The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws. The company names and brand names herein are the trademarks or registered trademarks of their respective owners. Edited Strategic Business Development Dept.