MB3832APFV

FUJITSU SEMICONDUCTOR DATA SHEET DS04-27701-4E ASSP For Power Management Applications (Secondary battery) DC/DC Converter IC for Charging MB3832A s DESCRIPTION The MB3832A is a pulse width modulation (PWM) DC/DC converter IC, incorporating a current detector amplifier and error amplifiers (2 circuits) to control the output voltage and current independently. It is suitable for downconversion. With an on-chip reference voltage generator, the MB3832A is best suited for use in applications such as lithiumion battery (1-cell to 3-cell) chargers. s FEATURES • High precision reference voltage source: 2.5 V ± 0.5% (+25°C) : 2.5 V ± 1.0% (–10°C to +85°C) • High frequency operating capability: 500 kHz Max. • Wide operating supply voltage range: 3.6 V to 18 V • On-chip current detector amplifier with wide in-phase input voltage range: 0 V to VCC • On-chip standby function • On-chip triangular waveform oscillator capable of operating in external synchronization • On-chip, timer-latch short-circuit protection circuit • Internal totem-pole output stage supporting P-channel MOS FETs and PNP transistors s PACKAGE 20-pin plastic SSOP (FPT-20P-M03) MB3832A s PIN ASSIGNMENT (TOP VIEW) VREF : 1 RT : 2 CT : 3 SYNC : 4 CSCP : 5 FB1 : 6 −IN1 : 7 +IN1 : 8 −INC : 9 +INC : 10 20 : VE 19 : OUT 18 : VCC 17 : CTL 16 : DTC 15 : FB2 14 : −IN2 13 : +IN2 12 : COUT 11 : GND (FPT-20P-M03) 2 MB3832A s PIN DESCRIPTION Pin no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Pin name VREF RT CT SYNC CSCP FBI –IN1 +IN1 –INC +INC GND COUT +IN2 –IN2 FB2 DTC CTL VCC OUT VE I/O O — — I — O I I I I — O I I O I I — O — Descriptions Reference voltage output terminal Connection terminal for triangular wave frequency setting resistor Connection terminal for triangular wave frequency setting capacitor External synchronous signal input terminal Connection terminal for time constant setting capacitor for timer-latch shortcircuit protection circuit Error amplifier 1 output terminal Error amplifier 1 inverted input terminal Error amplifier 1 non-inverted input terminal Current detector amplifier inverted input terminal Current detector amplifier non-inverted input terminal Ground terminal Current detector amplifier output terminal Error amplifier 2 non-inverted input terminal Error amplifier 2 inverted input terminal Error amplifier 2 output terminal Connection terminal for dead time/soft start time setting resistor/capacitor Power supply control input terminal “H” level: Active state “L” level: Standby state Power supply terminal Totem-pole output terminal Connector terminal for output sink current setting resistor I: Input pin, O: Output pin 3 MB3832A s BLOCK DIAGRAM COUT 12 FB2 15 −IN2 14 +IN2 13 FB1 6 −IN1 7 +IN1 8 − + − + + + + − Error Amp.2 Current Amp. − × 25 + PWM Comp. −INC +INC 9 10 Out 100 kΩ 18 VCC Error Amp.1 19 OUT DTC 16 SCP Comp. − − + − + 1.1 V bias CSCP 5 S R Latch UVLO OSC Ref bias DTC Comp. 1.9 V 1.3 V 1V 20 VE 1 µA 2.1 V VCC CTL 17 CTL 2.5 V 4 2 3 CT 1 VREF 11 GND SYNC RT 4 MB3832A s ABSOLUTE MAXIMUM RATINGS Parameter Power supply voltage Control input voltage Output current Peak output current Allowable dissipation Storage temperature Symbol VCC VCTL IO IO PD Tstg Condition — — OUT terminal, DC OUT terminal, Duty 5% Ta +25°C — Rating Min — — — — — –55 Max 20 20 50 600 540* +125 Unit V V mA mA mW °C *: When mounted on a 10 cm-square dual-sided epoxy base board WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. s RECOMMENDED OPERATING CONDITIONS Parameter Power supply voltage Reference voltage output current Input voltage Control input voltage SYNC input voltage Output current Oscillator frequency Timing capacitance Timing resistance Short detection capacitance Operating temperature Symbol VCC IOR Condition — — +IN1, –IN1, +IN2, –IN2 terminal +INC, –INC terminal VCTL VSYNC IO fOSC CT RT CSCP Ta CTL terminal SYNC terminal OUT terminal, DC — — — — — Value Min 3.6 –1 0 0 0 0 — 10 100 8.2 — –30 Typ 16 — — — — — — 200 390 12 0.1 +25 Max 18 0 VCC – 0.9 VCC 18 VCC 30 500 2200 51 1.0 +85 Unit V mA V V V V mA kHz pF kΩ µF °C VIN WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 5 MB3832A s ELECTRICAL CHARACTERISTICS (VCC = 16 V, Ta = +25°C) Parameter Symbol Pin no. 1 1 1 1 16 16 16 19 5 5 5 5 5 19 19 19 19 4 Condition Ta = +25°C Value Min 2.4875 2.475 2.480 — — –36 — 2.3 80 1.7 2.0 0.65 — — –1.4 190 — 2.0 0 — –3 –200 0 60 60 — Typ 2.50 2.50 2.50 1 3 –16 2.8 2.6 200 2.1 2.1 0.70 50 50 –1.0 200 1 — — 50 — –50 — 100 100 750* 2.7 0.8 –120 2.0 Max 2.5125 2.525 2.520 10 10 –7 3.1 — — — 2.2 0.75 100 100 –0.6 210 5 — 0.8 100 3 — VCC – 0.9 Unit V V V mV mV mA V V mV V V V mV mV µA kHz % V V µA mV nA V dB dB kHz V V µA mA Output voltage Reference voltage block Input stability (Ref) Load stability Short circuit output current Under voltage lockout circuit block (UVLO) Hysteresis width VREF Line Load IOS VTH VTL VH VRST VTH VTH VSTB VI ICSCP fOSC ∆f/f VIH VIL ISYNC VIO IB VCM CMRR Ta = –10°C to +85°C Ta = +25°C to +85°C VCC = 3.6 V to 18 V IREF = 0 mA to –1 mA VREF = 0 V VCC terminal VCC terminal VCC terminal VCC terminal FB terminal CSCP terminal CSCP terminal CSCP terminal CSCP terminal CT = 330 pF, RT = 12 kΩ VCC = 3.6 V to 18 V Input “H” level Input “L” level VSYNC = 5 V Threshold voltage Reset voltage Detection voltage Short Threshold voltage detection block Input standby voltage (SCP Comp, Input latch voltage S-R Latch) Input source current Oscillator frequency Triangular Frequency input stability wave oscillator block (OSC) SYNC input condition Input current Input offset voltage Input bias current Common mode input voltage range Error amplifier (Error Amp.1, 2) Common mode rejection ratio Voltage gain Frequency bandwidth Maximum output voltage width Output source current Output sink current *: Standard design value 8, 7, VFB = 1.6 V 13, 14 8, 7, VFB = 1.6 V 13, 14 8, 7, 13, 14 6, 15 6, 15 DC 6, 15 AV = 0 dB 6, 15 6, 15 — — — — — — — — 1.0 –60 — AV BW V I I OM+ OM– 2.5 — — 0.6 V OM– 6, 15 VFB = 1.6 V 6, 15 VFB = 1.6 V OM+ (Continued) 6 MB3832A (Continued) (VCC = 16 V, Ta = +25°C) Parameter Input offset voltage Symbol Pin no. 10, 9 10 9 12 12 12 12 10, 9 12 12 12 12 12 12 12 12 19 19 16 16 16 19 Condition V+INC, V–INC = 2.4 V to 12.6 V V+INC = 12.7 V, V–INC = 12.6 V V+INC = 0.1 V, V–INC = 0 V V+INC = 12.7 V, V–INC = 12.6 V V+INC = 12.8 V, V–INC = 12.6 V V+INC = 0.1 V, V–INC = 0 V V+INC = 0.2 V, V–INC = 0 V — V+INC, V–INC = 2.4 V to 12.6 V V–INC = 12.6 V AV = 0 dB f = 10 kHz — — VCOUT = 2.5 V VCOUT = 2.5 V Duty cycle = 0 % Duty cycle = 100 % VDTC = 0.4 V VDTC = 2.5 V IDTC = 100 µA VDTC = VREF/1.56 Value Min –2 — –2 2.25 4.5 2.25 4.5 0 60 22.5 — — VCC – 2.0 — — 60 1.2 — –1.0 270 — 43 Typ — 1 –1 2.5 5.0 2.5 5.0 — 90 25 500* 20* VCC – 1.6 50 –7 170 1.3 1.9 –0.2 900 0.15 48 Max 2 2 — 2.75 5.5 2.75 5.5 VCC — 27.5 — — — 200 –2 — — 2.0 — — 0.3 53 Unit mV µA µA V V V V V dB V/V kHz Ω V mV mA µA V V µA µA V % VIO I+INC Input bias current I–INC VO1 VO2 Output voltage Current detector amplifier block (Current Amp.) VO3 VO4 Common mode input voltage range Common mode rejection ratio Voltage gain Frequency bandwidth Output resistance Maximum output voltage width Output source current Output sink current Threshold voltage PWM comparator block (PWM Comp.) Input bias current Latch mode input current Input latch voltage ON duty cycle VCM CMRR AV BW RO VOM+ VOM– I I OM– OM+ VT0 VT100 IDTC IDTC VDTC Dtr (Continued) 7 MB3832A (Continued) (VCC = 16 V, Ta = +25°C) Parameter Output on resistance Output sink current Output voltage Output block (OUT) Control-off output resistance ROUT2 VON VOFF IIH IIL ICCS ICC 19 1 1 17 17 18 18 Symbol Pin no. 19 19 19 19 19 Condition IO = –50 mA R E = 33 Ω IO = –300 mA IO = 300 mA VCTL = 0 V, VREF = 2.5 V, IO = –50 mA VCTL = 0 V, VREF = 0 V, IO = –10 µA IC is active state IC is standby state VCTL = 5 V VCTL = 0 V VCTL = 0 V Output “H” Value Min — 18 12.5 — — Typ 5 30 14 1.2 5 Max 8 42 — 1.8 8 Unit Ω mA V V Ω RON IO VOH VOL ROUT1 70 2.0 0 — –1 — — 100 — — 100 0 — 4.6 130 18 0.8 200 — 10 7.0 kΩ V V µA µA µA mA CTL input condition Control block (CTL) Input current General Standby current Power supply current *: Standard design value 8 MB3832A s TYPICAL CHARACTERISTICS Reference voltage vs. power supply voltage characteristics 5 Reference voltage VREF (V) 4 3 2 1 0 0 5 10 15 Power supply voltage VCC (V) 20 CTL = VCC Ta = +25 °C IREF = 0 mA 5 Reference voltage VREF (V) 4 3 2 1 0 0 10 20 30 40 VREF load current IREF (mA) Reference voltage vs. VREF load current characteristics VCC = 16 V CTL = 5 V Ta = +25 °C Reference voltage vs. temperature characteristics 2.0 Reference voltage ∆VREF (%) 1.5 1.0 0.5 0.0 −0.5 −1.0 −1.5 −2.0 −40 −20 0 20 40 60 80 100 VCC = 16 V CTL = 5 V Temperature Ta (°C) Reference voltage vs. control voltage characteristics 5 Reference voltage VREF (V) 4 3 2 1 0 0 5 10 Control voltage VCTL (V) 15 20 Control current vs. control voltage characteristics 500 Control current ICTL (µA) VCC = 16 V Ta = +25 °C IREF = 0 mA 400 300 200 100 0 0 VCC = 16 V Ta = +25 °C 5 10 Control voltage VCTL (V) 15 20 (Continued) 9 MB3832A Triangular wave oscillation frequency vs. RT resistance characteristics Triangular wave oscillation frequency fOSC (Hz) 1M Triangular wave oscillation frequency fOSC (Hz) VCC = 16 V CTL = 5 V CT = 100 pF 100 k CT = 390 pF 1M VCC = 16 V CTL = 5 V RT = 12 kΩ Triangular wave oscillation frequency vs. CT capacitance characteristics 100 k 10 k CT = 2200 pF 10 k 1k 1k 10 k RT resistance (Ω) 100 k 1k 10 p 100 p 1n CT capacitance (F) 10 n Triangular wave oscillation frequency regulation ∆fOSC (%) 3.0 CTL = VCC 2.0 1.0 0.0 −1.0 −2.0 −3.0 0 2 4 6 8 10 12 14 16 Power supply voltage VCC (V) 18 20 Triangular wave oscillation frequency fOSC (kHz) Triangular wave oscillation frequency regulation vs. power supply voltage characteristics Triangular wave oscillation frequency vs. temperature characteristics 220 215 210 205 200 195 190 185 180 −40 −20 0 20 40 60 Temperature Ta (°C) 80 100 RT = 12 kΩ, CT = 390 pF VCC = 16 V CTL = 5 V RT = 12 kΩ, CT = 390 pF Triangular wave upper and down voltage (V) Triangular wave maximum/minimum voltages vs. triangular wave oscillation frequency characteristics 2.5 VCC = 16 V CTL = 5 V Upper 2.0 1.5 Lower 1.0 0.5 1k 10 k 100 k 1M 10 M Triangular wave oscillation frequency fOSC (Hz) (Continued) 10 MB3832A Error amp. gain, phase vs. frequency characteristics 5V 40 30 gain Av (dB) 20 10 0 −10 −20 −30 −40 100 1k 10 k 100 k 1M AV VCC = 16 V 180 CTL = 5 V Ta = +25 °C 135 90 φ 45 0 −45 −90 −135 −180 10 M 11 kΩ phase φ (deg.) 1 µF IN 7 2.4 kΩ (14) 8 (13) 2.5 V − 6 (15) + Err Amp.1 (Err Amp.2) OUT 240 kΩ 11 kΩ Frequency f (Hz) Current detector amp. gain, phase vs. frequency characteristics 50 40 30 Gain Av (dB) 20 10 0 −10 −20 −30 −40 −50 100 1k 10 k 100 k 1M φ AV 180 135 phase φ (deg.) 90 45 0 −45 −90 −135 −180 10 M 10 IN 0.1 V 12.6 V 9 − + ×2 + − × 12.5 12 OUT Current Amp. Frequency f (Hz) Current detector amp. output voltage vs. input voltage characteristics 3.0 Output voltage VCOUT (V) 2.8 2.6 2.4 2.2 2.0 0 4 8 12 Inverting input voltage (V) 16 VCC = 16 V V+INC = V−INC + 0.1 V Ta = +25 °C (Continued) 11 MB3832A (Continued) Allowable dissipation vs. ambient temperature characteristics 600 Allowable dissipation PD (mW) 540 500 400 300 200 100 0 −40 −20 0 20 40 60 80 100 120 Ambient temperature Ta (°C) 12 MB3832A s FUNCTIONAL DESCRIPTION 1. Switching Regulator Functions (1) Reference voltage circuit (Ref) The reference voltage generator uses the voltage supplied from the VCC terminal (pin 18) to generate a temperature-compensated, stable voltage (about 2.50 V) as the reference supply voltage for the IC’s internal circuitry. The reference voltage can be output, up to 1 mA, to an external device through the VREF terminal (pin 1). (2) Triangular wave oscillator (OSC) The triangular wave oscillator generates a triangular waveform with a timing capacitor and a timing resistor respectively connected to the CT terminal (pin 3) and RT terminal (pin 2). The triangular wave is input to the PWM comparator in the IC while it can also be supplied to an external device through the CT terminal. In addition, the oscillator can be used for external synchronization, where it generates a triangular wave synchronous to the input signal from the SYNC terminal (pin 4). (3) Error amplifiers (Error Amp. 1, 2) The error amplifiers detect the output voltage from the switching regulator and outputs the PWM control signal. It supports a wide range of in-phase inputs from 0 V to “VCC – 0.9 V”. An arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB1 terminal (pin 6) [FB2 terminal (pin 15)] to the –IN1 terminal (pin 7) [–IN2 terminal (pin 14)] of the error amplifier, enabling stable phase compensation to the system. (4) Current detector amplifier (Current Amp.) The current detector amplifier provides 25 × amplification of the voltage drop between the two ends of the output sensor resistor (RS) in the switching regulator, that occurs due to the flow of the charging current. At the same time, the amplifier converts the voltage to the GND-reference voltage level and outputs it to the COUT terminal (pin 12). It can also control the charging current in combination with the error amplifier circuit. (5) Power control circuit (CTL) The power control circuit can control turning on and off the power supply through the CTL terminal (pin 17). (Supply current in standby mode: About 0 µA) Depending on the voltage level of the PWM Comp. input terminal, the OUT terminal (pin 19) may become “L” level during discharging of the VREF voltage after the CTL terminal is turned off with a capacitor connected to the VREF terminal. The power control circuit contains a function for fixing the OUT output terminal to the “H” level when CTL = “L” and VREF = “H”, preventing inadvertent “L” level output after turning the CTL terminal off. (6) PWM comparator circuit (PWM Comp.) The PWM comparator circuit is a voltage-pulse width converter for controlling the output duty of the error amplifiers (Error Amp. 1, 2) depending on their output voltage. The PWM comparator circuit turns on the external output transistor during the interval in which the triangular wave voltage level is lower than the voltage level at both of the error amplifier output terminals (FB1 terminal (pin 6), FB2 terminal (pin 15)) and the DTC terminal (pin 16). (7) Output circuit (Out) The output circuit uses a totem-pole configuration, capable of driving an external P-channel MOS FET and PNP transistor. It can also control the output sink current with a resistor connected between the VE terminal (pin 20) and the GND terminal (pin 11). 13 MB3832A 2. Protection Functions (1) Low input voltage malfunction preventive circuit (ULVO) The transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned on, may cause errors in the control IC, resulting in breakdown or degradation of the system. The low input voltage malfunction preventive circuit detects the internal reference voltage level according to the supply voltage and turn off the external output transistor to make dead time 100%. The circuit restores voltage supply when the supply voltage reaches its threshold voltage. (2) Timer-latch short-circuit protection circuit (SCP Comp., SR Latch) The latch circuit detects the output voltage levels of the error amplifiers. When the output voltage levels of the two error amplifiers reach about 2.1 V at the same time, the timer circuit is actuated to start charging the external capacitor connected to the CSCP terminal (pin 5). If the error amplifier outputs are not restored to the normal voltage range before the capacitor voltage reaches about 0.7 V, the latch circuit is actuated to fix the output terminals (OUT) at the “H” level. To reset the actuated protection circuit, turn the power supply on back. 14 MB3832A s METHOD OF SETTING FOR EXTERNAL SYNCHRONOUS OSCILLATION For external synchronous oscillation, connect a timing capacitor (CT), a timing resistor (RT), and an external sync signal to the CT, RT, and SYNC terminals, respectively. In this case, select the CT and RT so that the oscillation frequency is 5% to 10% lower than the frequency of the external synchronous signal excluding the setting error of the oscillation frequency. The duty cycle (t1/ t) of the external sync signal must be set within a range from 10% to 90%. VREF + 2I* 1.9 V − R CT 3 CT − 1.3 V + Latch1 S Q “H” level: ON 3I* SYNC 4 1.4 V + − Latch2 S Q R 1.9 V VCT 1.3 V 5.0 V VSYNC 1.9 V VCT 1.3 V 5.0 V VSYNC 0V t 0V t1 t t *: | = VRT/RT, VRT (pin voltage at pin 2) = 1.0 V (typical) 15 MB3832A s TREATMENT OF UNUSED CSCP PIN When the timer-latch short-circuit protection circuit is not used, connect the CSCP terminal (pin 5) to the GND at the shortest distance. Treatment of the CSCP terminal when not used 5 CSCP GND 11 s OSCILLATOR FREQUENCY SETTING The oscillator frequency can be set by connecting a timing capacitor (CT) to the CT terminal (pin 3) and a timing resistor (RT) to the RT terminal (pin 2). Oscillator frequency: fosc fosc (kHz) 936000 CT(pF) RT(kΩ) 16 MB3832A s METHODS OF SETTING THE DEAD TIME When the device is set for step-up inverted output based on the flyback method, the output transistor is fixed to a full-ON state (ON duty = 100%) when the power supply is turned on. To prevent this problem, you may determine the voltage at the DTC terminal (pin 16) from the VREF voltage so you can set the output transistor’s dead time (maximum ON-duty period) as shown in Figure a below. When the voltage at the DTC terminal (pin 16) is higher than the triangular wave output voltage from the oscillator, the output transistor is turned off. The dead time calculation formula assuming that triangular wave amplitude . . = 0.6 V and triangular wave minimum voltage . . 1.3 V is given below. = R2 Vdt – 1.3 V Duty (ON) . . × 100 [%], Vdt = × VREF = 0.6 V R1 + R2 When the DTC terminal is not used, connect it directly to the VREF terminal. • Figure a Setting the dead time • Figure b Not setting the dead time 1 VREF R1 16 DTC Vdt R2 1 VREF 16 DTC 17 MB3832A s METHODS OF SETTING THE SOFT START TIME To prevent surge currents when the IC is turned on, you can set a soft start using the DTC terminal (pin 16). When power is switched on, the current begins charging the capacitor (Cdt) connected the DTC terminal. The soft start process operates by comparing the soft start setting voltage, which is proportional to the DTC terminal voltage, with the triangular waveform, and varying the ON-duty of the OUT terminal (pin 19). The soft start time until the ON duty reaches 50 % is determined by the following equation: For figure c Soft start time (time until output ON duty = 50%) ts (s) = Cdt (F) × Rdt (Ω) × ln(1 − 1.6/2.5) For figure d Soft start time (time until output ON duty = 50%) ts (s) = − Cdt (F) × R1 (Ω) × R2 (Ω) R1 (Ω) + R2 (Ω) × ln (1 − 1.6 (R1 (Ω) + R2 (Ω)) ) 2.5R2 (Ω) = 1.022 × Cdt (F) × Rdt (Ω) : • Figure c Setting a soft start • Figure d Setting the dead time and a soft start 1 VREF Rdt 16 DTC Cdt Cdt R2 R1 1 VREF 16 DTC 18 MB3832A s EQUIVALE CIRCUIT (CTL, SYNC terminal) • CTL terminal CTL 17 • SYNC terminal VCC SYNC 4 1.4 V 19 20 Vin COUT 12 9 10 MB3832A 33 kΩ 5.1 kΩ − −INC +INC FB2 15 0.1 µF −IN2 Error Amp.2 − 14 + + 18 Current Amp. ×25 VCC 5.1Ω 19 Out 100 kΩ MTD20P03HDL 18 µH VO (12.6 V) RS 0.033Ω +IN2 PWM Comp. OUT 100 µF 2.2 µF 1V VE SCP Comp. − − + + − 20 13 10 kΩ − + FB1 Error Amp.1 0.1 µF + + + − 20.6 kΩ 0.033 µF −IN1 6 3.9 kΩ 7 5.1 kΩ +IN1 68 µF MBRS130 LT3 8 470 kΩ DTC Comp. 1.9 V 1.3 V bias UVLO 2.5 V 4 2 3 1 11 DTC 16 GND (For load) 0.22 µF 1 µA 2.1 V bias VCC S R Latch OSC Ref CTL 1.1 V s APPLICATION EXAMPLE (Step-down scheme) MTD20P03HDL: Made by Motorola Inc. MBRS130LT3: Made by Motorola Inc. CTL 17 CSCP 5 0.22 µF SYNC RT CT VREF GND *: a: Set the charging current to 3 A. b: Set the charging current to 2 A. c: Set the charging current to 1 A. Charging current setting 5V Synchronous signal 0V a* b* c* 10 kΩ 10 kΩ 10 kΩ 12kΩ 390pF +IN2 0.1 µF GND MB3832A s REFERENCE DATA Output voltage vs. output current characteristics 14 Vin = 16 V Ta = +25°C 12 V+IN2 = VREF/3 (+IN2→c) 10 Output voltage VO (V) V+IN2 = VREF∗2/3 (+IN2→b) V+IN2 = VREF (+IN2→a) 8 6 4 2 0 0 0.5 1 1.5 2 2.5 3 3.5 4 Output current IO (A) Soft start operation waveforms 20 15 100 Vin = 16 V CTL = 5 V RL = 5 Ω(2.52 A) VO(V) 10 5 0 10 90 CTL(V) 5 0 10 0% 0 40 80 120 160 200 t(ms) 21 MB3832A s NOTES ON USE • Take account of common impedance when designing the earth line on a printed wiring board. • Take measures against static electricity. - For semiconductors, use antistatic or conductive containers. - When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container. - The work table, tools and measuring instruments must be grounded. - The worker must put on a grounding device containing 250 kΩ to 1 MΩ resistors in series. • Do not apply a negative voltage - Applying a negative voltage of −0.3 V or less to an LSI may generate a parasitic transistor, resulting in malfunction. s ORDERING INFORMATION Part number MB3832APFV Package 20-pin Plastic SSOP (FPT-20P-M03) Remarks 22 MB3832A s PACKAGE DIMENSION 20-pin Plastic SSOP (FPT-20P-M03) Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max) . Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. 0.17±0.03 (.007±.001) 11 *1 6.50±0.10(.256±.004) 20 INDEX *24.40±0.10 6.40±0.20 (.173±.004) (.252±.008) Details of "A" part 1.25 –0.10 .049 –.004 LEAD No. 1 10 +0.20 +.008 (Mounting height) 0.65(.026) "A" 0.24±0.08 (.009±.003) 0.13(.005) M 0~8˚ 0.10±0.10 (Stand off) (.004±.004) 0.25(.010) 0.10(.004) 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) C 2003 FUJITSU LIMITED F20012S-c-4-6 Dimensions in mm (inches) . Note : The values in parentheses are reference values. 23 MB3832A FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. 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