MB3879PFV

FUJITSU SEMICONDUCTOR DATA SHEET DS04-27708-2E ASSP for Power Supply Application (for secondary battery) DC/DC Converter IC for Parallel Charging of 3/4 cell Li-ion & NiMH Batteries MB3879 s DESCRIPTION The MB3879 is a DC/DC converter IC for parallel charging of 3/4 cell Li-ion & NiMH batteries, which uses the pulse-width modulation (PWM) for controlling output voltages and output currents independently. This IC can dynamically control secondary batterie’s charge current, which detects voltage dropping in an AC adapter in order to keep its power constant (Dynamically controlled charging). This operation allows quick charging by variable charging current in accordance with operating status of a notebook PC. Moreover, the total current of the system current and control IC input current are detected, and control of the secondary battery is enabled. An efficient charge becomes possible because of the charge current comes in changeability according to the operation state of notebook PC by this operation. The IC also allows parallel charging that charges two batteries simultaneously, reducing charging time dramatically. The IC, using a built-in output voltage setting resistor, allows high-precision setting of output voltages. With its output-voltage switching function that is ready for both graphite-type and coke-type Li-ion batteries as well as NiMH battery, the IC is best suited to a built-in charger of a notebook PC. This product is covered by US Patent Number 6,147,477. s FEATURES • Detecting a voltage dropping in the AC adapter, and dynamically controlling the charge current (Dynamicallycontrolled charging) • Detecting total current of system current and control-IC input current (Differential-charging) (Continued) 48-pin plastic LQFP s PACKAGE (FPT-48P-M05) MB3879 (Continued) • Selection of output voltages by 4-bit decoder: 12.3V (3 cells: 4.1V), 12.6V (3 cells: 4.2V), 16.4V (4 cells: 4.1V), 16.8V (4 cells: 4.2V) • High efficiency: 94% (using reverse current preventive diode) • Wide range of power supply voltage: 8 V to 25 V • Setting precision of output voltage (built-in output voltage setting resistor): ± 0.8% (Ta = +25 °C) • Setting precision of charge current: ±5% • Setting of frequency for only external capacitor, using built-in frequency setting resistor. • Oscillation frequency range: 100 kHz to 500 kHz • Built-in current detect amplifier with wide range of in-phase input voltages: 0 V to Vcc • Stand-by current: 0 µA • Built-in load-independent soft-start circuit • Built-in charge mode detection function • Built-in totem-pole outputs supporting Pch MOS FET 2 MB3879 s PIN ASSIGNMENT (TOP VIEW) OUTC1 +INC1 +INE1 +INE2 -INC1 -INE1 -INE2 GND 38 DTC FB1 FB2 48 47 46 45 44 43 42 41 40 39 37 CT VCC D0 D1 D2 D3 VSS CTL VDD VB OUT-EV OUT-EC OUT-EA2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 36 35 34 33 32 31 30 29 28 27 26 25 IN2 +INC3 FB4 OUTC3 -INE4 +INE4 FB5 -INE5 TEST GNDO VH VCCO OUT-EA1 IN1 +INC2 FB3 OUTC2 -INE3 +INE3 FB6 -INE6 CS2 CS1 (FPT-48P- 05) OUT 3 MB3879 s PIN DESCRIPTION Pin No. 1 2 3 4 5 6 7 8 9 Symbol VCC D0 D1 D2 D3 VSS CTL VDD VB I/O  I I I I  I  O Power supply terminal VDD logic input terminal VDD logic input terminal VDD logic input terminal VDD logic input terminal VDD logic ground terminal Power supply control terminal. Setting “L” level on CTL terminal places the IC in standby mode. VDD logic power supply terminal Reference voltage output terminal Constant-voltage charging distinction signal output terminal H level: Dynamically-controlled charging, Differential charging, or Constant-voltage charging mode L level: BATT1 or BATT2 Constant-voltage charging mode Constant-current charge distinction signal output terminal H level: Dynamically-controlled charging, Differential charging, or Constant-voltage charging mode L level: BATT1 or BATT2 Constant-current charging mode Differential-charging distinction signal output terminal H level: Dynamically-controlled-charging, Constant-voltaging, or Constant-current charging mode L level: Differential-charging mode Dynamically-controlled charging distinction signal output terminal H level: Dynamically-controlled charging, Constant-voltage charging, or Constant-current charging mode L level: Dynamically-controlled charging mode Current detection amplifier (Current Amp2) input terminal Output voltage feedback input terminal Current detection amplifier (Current Amp2) input terminal Error amplifier (Error Amp3) output terminal Current detection amplifier (Current Amp2) output terminal Error amplifier (Error Amp3) inverted input terminal Error amplifier (Error Amp3) non-inverted input terminal Error amplifier (Error Amp6) output terminal Error amplifier (Error Amp6) inverted input terminal Soft-start capacitor connection terminal Soft-start capacitor connection terminal External FET gate driving terminal Driver block power supply terminal Descriptions 10 OUT-EV O 11 OUT-EC O 12 OUT-EA2 O 13 OUT-EA1 O 14 15 16 17 18 19 20 21 22 23 24 25 IN1 +INC2 FB3 OUTC2 −INE3 +INE3 FB6 −INE6 CS2 CS1 OUT VCCO I I O O I I O I   O  (Continued) 4 MB3879 (Continued) Pin No. 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Symbol VH GND0 TEST −INE5 FB5 +INE4 −INE4 OUTC3 FB4 +INC3 IN2 CT GND DTC +INE2 −INE2 FB2 +INE1 −INE1 OUTC1 FB1 −INC1 +INC1 I/O O  O I O I I O O I I   I I I O I I O O I I Ground terminal Descriptions FET driver circuit power supply terminal (VH = VCC−6V) Internal reference voltage for setting charge voltage Error amplifier (Error Amp5) inverted input terminal Error amplifier (Error Amp5) output terminal Error amplifier (Error Amp4) non-inverted input terminal Error amplifier (Error Amp4) inverted input terminal Current detection amplifier (Current Amp3) output terminal Error amplifier (Error Amp4) output terminal Current detection amplifier (Current Amp3) input terminal Current detection amplifier (Current Amp3) input terminal Output voltage feedback input terminal Triangular wave oscillation frequency setting capacitor connection terminal Ground terminal External duty control input terminal Error amplifier (Error Amp2) non-inverted input terminal Error amplifier (Error Amp2) inverted input terminal Error amplifier (Error Amp2) output terminal Error amplifier (Error Amp1) non-inverted input terminal Error amplifier (Error Amp1) inverted input terminal Current detection amplifier (Current Amp2) output terminal Error amplifier (Error Amp1) output terminal Current detection amplifier (Current Amp1) input terminal Current detection amplifier (Current Amp1) input terminal 5 MB3879 s BLOCK DIAGRAM VCC 1 −INE OUTC1 +INC1 −INC1 +INE1 44 45 48 47 43 46 42 + Amp1> ×25 − ×25 − ×25 − cells 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 12.3 12.6 12.3 12.3 12.3 12.3 16.4 16.8 12.3 12.3 12.3 12.3 12.3 Not controlled 12.3 12.3 Li-ion Li-ion none none none none Li-ion Li-ion none none none none none NiMH none none 3 3 none none none none 4 4 none none none none none 10 to 12 none none Charge mode symbol Li3C41 Li3C42     Li4C41 Li4C42      NiMH   Charge voltage (V) 4.1 4.2 none none none none 4.1 4.2 none none none none none  none none < Functions of bits > D0 : Selecting BATT type (Li-ion or NiMH) D1 and D2 : Selecting the number of cells (3 Cell or 4 Cell) D3 : Selecting charge voltage (4.1 V or 4.2 V) 24 MB3879 s SETTING SOFT-START TIME 1. Setting Soft-start Time in Constant-current Mode To prevent surge currents when the IC is turned on, you can set a soft-start by connecting a soft-start capacitor (Cs1) to the CS1 terminal (pin 23). Setting CTL terminal (pin 7) voltage to "H" level to activate the IC (Vcc ≥ UVLO threshold voltage), Q2 is turned off and charging starts on soft-start capacitor (Cs1) connected to the CS1 terminal at 10 µA. The error amplifier output (FB3 terminal (pin 16) or FB4 terminal (pin 34)) is determined by comparison between the lower one of the potentials at two non-inverted input terminals (+INE3 terminal (pin 19) voltage (+INE4 terminal (pin 31) voltage, and CS1 terminal voltage). The FB3 (FB4) terminal voltage during the soft-start period (CS1 terminal voltage < +INE3 (+INE4)) is therefore determined by comparison between the -INE3 (-INE4) terminal and CS1 terminal voltages. The DC/DC converter output voltage rises in proportion to the CS1 terminal voltage as the soft-start capacitor connected to the CS1 terminal is charged. The soft-start time is obtained from the following equation: Soft-start time : ts (time to output 100%) ts (s) = +INE3 (+INE4) / 10 (µA) × CS1 (µF) : = 5.5 V = +INE3 V (+INE4) CS1 terminal voltage Error Amp block Comparison voltage to -INE3 (-INE4) voltage =0V Soft-start time ts VB 10 µA 10 µA FB3 FB4 −INE3 −INE4 CS1 +INE3 CS1 +INE4 16 34 18 32 23 19 31 Q2 UVLO − + + Error Amp 25 MB3879 2. Setting Soft-start Time in Constant-voltage Mode To prevent surge currents when the IC is turned on, you can set a soft-start by connecting a soft-start capacitor (CS2) to the CS2 terminal (pin 22). Setting CTL terminal (pin 7) voltage to "H" level to activate the IC (Vcc ≥ UVLO threshold voltage), Q2 is turned off and charging starts on soft-start capacitor (CS2) connected to the CS2 terminal at 10 µA. The error amplifier output (FB5 terminal (pin 30) or FB6 terminal (pin 20)) is determined by comparison between the lower one of the potentials at two noninverting input terminals (TEST terminal (pin 28) voltage and CS2 terminal voltage). The FB5 (FB6) terminal voltage during the soft-start period (CS2 terminal voltage < TEST) is therefore determined by comparison between the -INE5 (-INE6) terminal and CS2 terminal voltages. The DC/DC converter output voltage rises in proportion to the CS2 terminal voltage as the soft-start capacitor connected to the CS2 terminal is charged. The soft-start time is obtained from the following equation: Soft-start time : ts (time to output 100%) ts (s) = TEST / 10 (µA) × CS2 (µF) : = 5.5 V = TEST CS2 terminal voltage Error Amp block Comparison voltage to -INE5 (-INE6) voltage =0V Soft-start time ts VB 10 µA 10 µA FB5 FB6 −INE5 −INE6 CS2 TEST CS2 30 20 29 21 22 28 Q2 UVLO − + + Error Amp 26 MB3879 s USING WITH SHORT-CIRCUIT CS1 AND CS2 TERMINAL By making a short circuit CS1 terminal (pin 23) and CS2 terminal (pin 22), the start-up of constant current charging mode and constant voltage charging mode is allowed at the same time. A capacitor to be connected must have a charging current at 20 µA. s TREATMENT WITHOUT USING THE CSCP TERMINAL If the soft-start function is not used, open CS1 terminal (pin 23) and CS2 terminal (pin 22). “Open” 22 CS2 “Open” 23 CS1 27 MB3879 s OPERATING SEQUENCE 1. Sequence of Normal Power Supply Startup and Charge Startup Completion *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 VIN VCC VDD Battery1 (Insert) (Remove) Battery2 (Insert) (Remove) CTL BATT1 voltage BATT2 voltage tDS Data Data Set tD0 Reset microprocessor tRCTL D0-D3 Decoder output Data FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined *1 :Insert Battery 1 *2 :VDD rises. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level *3 :CTL signal is “L” level after resetting microprocessor (CTL = “HiZ” until microprocessor is reset) . *4 :VIN and VCC rises by connecting AC adapter. *5 :Charge voltage data is set by microprocessor. *6 :CTL signal is turned on after data setup time (tDS) . *7 :Upon detecting CTL signal at “H” level, decoder data is set after data output delay time (tD0) . *8 :Shift to constant current mode. OUT-EA1, OUT-EA2, and OUT-EV = “H” level. *9 :Shift from constant current charge control to constant voltage change control. OUT-EC = “H”level, OUT-EV = “L”level. *10:With CTL signal “L” level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC=“L” level. *11:Data set after turning off CTL signal. *12:After CTL signal set at “L” level, CTL signal reactivation time (tRCTL=2 ms (Min)) or longer time is required. 28 MB3879 2. Sequence that Limitation (Differential Control) Activates by Input Current during Constant Current Charging on BATT1 *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 *13 VIN VCC VDD Battery1 Battery2 CTL BATT1 voltage BATT2 voltage tDS Data Data Set Data (Insert) (Remove) (Insert) (Remove) tD0 Reset microprocessor tRCTL D0-D3 Decoder output FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined *1:Insert Battery 1 *2:VDD rises. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level *3:CTL signal is “L” level after resetting microprocessor (CTL = “HiZ”until microprocessor is reset) . *4:VIN and VCC rises by connecting AC adapter. *5:Charge voltage data is set by microprocessor. *6:CTL signal is turned on after data setup time (tDS) . *7:Upon detecting CTL signal at “H” level, decoder data is set after data output delay time (tD0) . *8:Shift to constant current mode. OUT-EA1, OUT-EA2, and OUT-EV = “H”level. *9:Shift from constant current charge control to differential charge control by exceeding input current. OUT-EA1 = “L” level, OUT-EC = “H” level. *10:Returning to input current level within allowable range, shift to constant current charge control. OUT-EA1 = “H” level, OUTEC = “L” level. *11:After CTL signal set at “L” level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level. *12:Data set after turning off CTL signal. *13:After CTL signal set at "L" level, CTL signal reactivation time (tRCTL = 2 ms (Min) ) or longer time is required. 29 MB3879 3. Sequence that Limitation (Differential Control) Activates by Input Current during Constant Voltage Charging on BATT1 *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 *13 *14 VIN VCC VDD Battery1 Battery2 CTL BATT1 voltage BATT2 voltage D0-D3 Decoder output FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV (Insert) (Remove) (Insert) (Remove) tD0 Reset microprocessor tRCTL tDS Data Data Set Data OUT-EC : Undefined *1:Insert Battery 1 *2:VDD rises. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L”level *3:CTL signal is “L”level after resetting microprocessor (CTL = “HiZ” until microprocessor is reset) . *4:VIN and VCC rises by connecting AC adapter. *5:Charge voltage data is set by microprocessor. *6:CTL signal is turned on after data setup time (tDS) . *7:Upon detecting CTL signal at “H” level, decoder data is set after data output delay time (tD0) . *8:Shift to constant current mode. OUT-EA1, OUT-EA2, and OUT-EV = “H”level. *9:Shift from constant current charge control to constant voltage charge control. OUT-EC = “H”level, OUT-EV = “L”level. *10:Shift to differential charge control by exceeding input current. OUT-EA1 = “L” level, OUT-EV = “H” level. *11:Returning to input current level within allowable range, shift to constant voltage charge control. OUT-EA1 = “H”level, OUT-EV = “L”level *12:After CTL signal set at“L” level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level. *13:Data set after turning off CTL signal. *14:After CTL signal set at“L” level, CTL signal reactivation time (tRCTL = 2 ms (Min) ) or longer time is required. 30 MB3879 4. Sequence that Limitation (Dynamically-controlled Charging) Activates by Dropping Input Current during Constant Current Charging on BATT1 *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 *13 VIN VCC VDD Battery1 Battery2 CTL BATT1 voltage BATT2 voltage D0-D3 Decoder output FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined tDS Data Data Set Data (Insert) (Remove) (Insert) (Remove) tD0 Reset microprocessor tRCTL *1:Insert Battery 1 *2:VDD rises. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level *3:CTL signal is “L” level after resetting microprocessor (CTL = “HiZ” until microprocessor is reset) . *4:VIN and VCC rises by connecting AC adapter. *5:Charging voltage data is set by microprocessor. *6:CTL signal is turned on after data setup time (tDS) . *7:Upon detecting CTL signal at “H” level, decoder data is set after data output delay time (tD0) . *8:Shift to constant current mode. OUT-EA1, OUT-EA2, and OUT-EV = “H” level. *9:Shift from constant current charge control to dynamically-controlled charge control due to dropping input voltage. OUT-EA2 = “L” level, OUT-EC = “L” level *10:Returning to input voltage level within allowable range, shift to constant current charge control. OUT-EA2 = “H” level, OUT-EC = “L” level. *11:After CTL signal set at “L” level. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level. *12:Data set after turning off CTL signal. *13:After CTL signal set at “L” level, CTL signal reactivation time (tRCTL = 2 ms (Min) ) or longer time is required. 31 MB3879 5. Sequence that Limitation (Dynamically-controlled Charging) Activates by Dropping Input Voltage during Constant Voltage Charging on BATT1 *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 *13 *14 VIN VCC VDD Battery1 Battery2 CTL BATT1 voltage BATT2 voltage D0-D3 Decoder output Data Set tDS Data Data (Insert) (Remove) (Insert) (Remove) tD0 tRCTL Reset microprocessor FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined *2:VDD rises. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level *3:CTL signal is “L” level after resetting microprocessor (CTL = “HiZ” until microprocessor is reset) . *4:VIN and VCC rises by connecting AC adapter. *5:Charge voltage data is set by microprocessor. *6:CTL signal is turned on after data setup time (tDS) . *7:Upon detecting CTL signal at “H” level, decoder data is set after data output delay time (tD0) . *8:Shift to constant current mode. OUT-EA1, OUT-EA2, and OUT-EV = “H” level. *9:Shift from constant current mode to constant voltage charge control. OUT-EC = “H” level, OUT-EV = “L” level. *10:Shift to dynamically-controlled charge control due to dropping input voltage. OUT-EA2 = “L” level, OUT-EV = “H” level. *11:Returning to input voltage level within allowable range, shift to constant voltage charge control. OUT-EA2 = “H” level, OUT-EV = “L”level *12:After CTL signal set at “L” level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level *13:Data set after turning off CTL signal. *14:After CTL signal set at “L” level, CTL signal reactivation time (tRCTL = 2 ms (Min) ) or longer time is required. *1:Insert Battery 1 32 MB3879 6. Sequence of Normal Power Supply Startup and Charge Startup Completion *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 VIN VCC VDD Battery1 Battery2 tD0 tRCTL (Insert) (Remove) (Insert) (Remove) CTL BATT1 voltage BATT2 voltage D0-D3 Decoder output FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC Reset microprocessor tDS Data Data Set Data : Undefined *1:VIN and VCC rises by connecting AC adapter. *2:VDD rises. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level. *3:CTL signal is “L” level after resetting microprocessor (CTL = “HiZ” until microprocessor is reset) . *4:Insert Battery 1 *5:Charging voltage data is set by microprocessor. *6:CTL signal is turned on after data setup time (tDS) . *7:Upon detecting CTL signal at “H” level, decoder data is set after data output delay time (tD0) *8:Shift to constant current mode. OUT-EA1, OUT-EA2, and OUT-EV = “H” level. *9:Shift from constant current charge control to constant voltage change control. OUT-EC = “H” level, OUT-EV = “L”level. *10:With CTL signal“L” level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level. *11:Data set after turning off CTL signal. *12:After CTL signal set at “L” level, CTL signal reactivation time (tRCTL = 2 ms (Min) ) or longer time is required. 33 MB3879 7. Sequence when Battery 2 (almost empty) is inserted during BATT1 is being charged constant voltage , and shifting to constant current charge mode *1 *2 *3 *4 *5 *6 *7 *8 *9 *10 *11 *12 *13 VIN VCC VDD Battery1 Battery2 tD0 (Insert) (Remove) (Insert) (Remove) tRCTL CTL BATT1 voltage BATT2 voltage D0-D3 Decoder output FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC Reset microprocessor tDS Data Data Set Data : Undefined *1:Insert Battery 1. *2:VDD rises. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level. *3:CTL signal is “L” level after resetting microprocessor (CTL = “HiZ” until microprocessor is reset) . *4:VIN and VCC rises by connecting AC adapter. *5:Charging voltage data is set by microprocessor. *6:CTL signal is turned on after data setup time (tDS) . *7:Upon detecting CTL signal at “H” level, decoder data is set after data output delay time (tD0) . *8:Shift to constant current mode. OUT-EA1, OUT-EA2, and OUT-EV = “H” level. *9:Shift from BATT1 constant current charge control to constant voltage change control. OUT-EC = “H” level, OUT-EV = “L” level. *10:Battery2 (almost empty) is inserted. Controlled by FB4 (BATT2 constant current charge) . OUT-EC = “L” level. *11:With CTL signal “L” level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level. *12:Data set after turning off CTL signal. *13:After CTL signal set at “L” level, CTL signal reactivation time (tRCTL = 2 ms (Min) ) or longer time is required. 34 MB3879 8. Sequence of Normal Power Supply Shutoff and Completion of Charging *1 VIN VCC VDD Battery1 Battery2 CTL BATT1 voltage BATT2 voltage D0-D3 Decoder output FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC Data Set (Insert) (Remove) (Insert) (Remove) *2 *3 *4 : Undefined *1:With CTL signal “L” level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level. *2:Voltages of BATT1 and BATT2 fall by removing Battery 1. *3:VIN and VCC power supply falls by removing AC adapter. *4:VDD falls. CTL, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = HiZ 35 MB3879 9. Sequence of Normal Power Supply Shutoff and Completion of Charging < AC adapter is removed and then Battery 1 is removed.> VIN VCC VDD Battery1 Battery2 CTL BATT1 voltage BATT2 voltage D0-D3 Decoder output FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 OUT-EV OUT-EC : Undefined Data Set (Insert) (Remove) (Insert) (Remove) *1 *2 *3 *4 *1:With CTL signal “L” level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level. *2:VIN and VCC power falls by removing AC adapter. *3:Voltages of BATT1 and BATT2 falls by removing Battery 1. *4:VDD falls. CTL, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = HiZ 36 MB3879 10. Sequence of Normal Power Supply Shutoff and Completion of Charging < Battery 1 and 2 are removed during charge operation.> *1 VIN VCC VDD Battery1 Battery2 CTL BATT1 voltage BATT2 voltage D0-D3 Decoder output FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 Data Set (Insert) (Remove) (Insert) (Remove) *2 *3 OUT-EV OUT-EC : Undefined *1:Stopping charge operation by removing Battery 1. *2:With CTL signal “L” level, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC=“L” level. *3:VDD falls. CTL, OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC =HiZ 37 MB3879 11. Sequence of Normal Power Supply Shutoff and Completion of Charging VIN VCC VDD Battery1 Battery2 CTL BATT1 voltage BATT2 voltage D0-D3 Decoder output FB1 (Differential-charging) CT FB2 (Dynamically-controlled charging) CT FB6 (BATT1 constant voltage) CT FB3 (BATT1 constant current) CT FB5 (BATT2 constant voltage) CT FB4 (BATT2 constant current) CT OUT-EA2 OUT-EA1 Data set (Insert) (Remove) (Insert) (Remove) *1 *2 OUT-EV OUT-EC : Undefined *1:Fall of VIN and VCC voltages due to removal of AC adapter. OUT-EA1, OUT-EA2, OUT-EV, and OUT-EC = “L” level. *2:CTL signal is “L” level. 38 MB3879 s EQUIVALENT CIRCUIT DIAGRAM FOR CTL, D0 to D3, OUT-EA1, EA2, EV, EC TERMINALS • CTL terminal CTL 50 kΩ Q1 D1 50 kΩ • D0 to D3 terminals VDD D1 Q1 D0 to D3 100 kΩ D2 Q2 VSS • OUT-EA1 to OUT-EC terminal VDD Q1 D1 OUT-EA1 OUT-EA2 Q2 D2 OUT-EV OUT-EC VSS 39 MB3879 s EQUIVALENT CIRCUIT DIAGRAM FOR DECODER BLOCK VDD D Q D0 DD0 CK XQ R D1 D Q DD1 Decode output CK XQ R Decoder DD2 D2 D Q CK XQ R D3 D Q DD3 CK XQ R VDD a point CTL VDD Charging start signal Power tDS tD0 tRCTL D0-D3 CTL DD0-DD3 Data1 Data2 Data1 Set Data2 Set a point Charging start signal Power Data1 Load Data2 Load 40 MB3879 s NOTES ON USING REVERSE CURRENT PROTECTION DIODE • If charging currents (I1 and I2) are imbalance under constant voltage control, voltages are controlled on the basis of a lower battery voltage. Therefore, battery voltage on either side is higher for the potential occurring on reverse current protection diodes (D1 and D2) and sense resistors (RS2 and RS3). • Take notes and voltage and current characteristics of reverse current protection diodes (D1 and D2) so that the voltage will not exceed overcharge halt voltage. VCCO 25 DC-IN A OUT 24 I1 RS2 B D1 VH 26 Battery 1 C D I2 RS3 D2 Battery 2 41 MB3879 s APPLICATION CIRCUIT EXAMPLE RS1 10 mΩ VCC 1 C20 0.1 µF R10 150 kΩ R11 30 kΩ R2 0Ω (30 kΩ) R3 100 kΩ R4 51 kΩ R22 100 kΩ R19 30 kΩ R21 2.7 kΩ Q3 SW2 R18 100 kΩ R15 30 kΩ R17 2.7 kΩ Q2 SW1 R25 −INE1 100 kΩ 44 OUTC1 45 +INC1 48 −INC1 C12 47 3300 +INE1 pF 43 R26 51 kΩ FB1 46 FB2 42 R24 47 kΩ C11 6800 pF −INE2 41 R23 15 kΩ +INE2 40 DTC 39 R28 100 kΩ −INE3 18 OUTC2 C16 17 3300 pF +INC2 A 15 R29 IN1 51 B 14 kΩ +INE3 19 FB3 R20 16 30 kΩ −INE4 R13 100 kΩ 32 OUTC3 C6 33 3300 pF +INC3 35 C R12 IN2 51 36 D kΩ +INE4 31 FB4 R16 34 30 kΩ + Amp1> ×25 −