MB3887PFV

FUJITSU SEMICONDUCTOR DATA SHEET DS04-27709-6E ASSP For Power Supply Applications (Secondary battery) DC/DC Converter IC for Charging Li-ion battery MB3887 ■ DESCRIPTION The MB3887 is a DC/DC converter IC suitable for down-conversion, using pulse-width (PWM) charging and enabling output voltage to be set to any desired level from one cell to four cells. These ICs can dynamically control the secondary battery’s charge current by detecting a voltage drop in an AC adapter in order to keep its power constant (dynamically-controlled charging) . The charging method enables quick charging, for example, with the AC adapter during operation of a notebook PC. The MB3887 provides a broad power supply voltage range and low standby current as well as high efficiency, making it ideal for use as a built-in charging device in products such as notebook PC. This product is covered by US Patent Number 6,147,477. ■ FEATURES • Detecting a voltage drop in the AC adapter and dynamically controlling the charge current (Dynamically-controlled charging) • Output voltage setting using external resistor : 1 cell to 4 cells • High efficiency : 96% (VIN = 19 V, Vo = 16.8 V) • Wide range of operating supply voltages : 8 V to 25 V • Output voltage setting accuracy : 4.2 V ± 0.74% (Ta = −10 °C to +85 °C , per cell) • Charging current accuracy : ±5% • Built-in frequency setting capacitor enables frequency setting using external resistor only • Oscillation frequency range : 100 kHz to 500 kHz • Built-in current detection amplifier with wide in-phase input voltage range : 0 V to VCC • In standby mode, leave output voltage setting resistor open to prevent inefficient current loss • Built-in standby current function : 0 µA (standard) • Built-in soft-start function independent of loads • Built-in totem-pole output stage supporting P-channel MOS FET devices • One type of package (SSOP-24pin : 1 type) ■ Application • Notebook PC Copyright©2001-2006 FUJITSU LIMITED All rights reserved MB3887 ■ PIN ASSIGNMENT (TOP VIEW) −INC2 : 1 OUTC2 : 2 +INE2 : 3 −INE2 : 4 FB2 : 5 VREF : 6 FB1 : 7 −INE1 : 8 +INE1 : 9 OUTC1 : 10 OUTD : 11 −INC1 : 12 24 : +INC2 23 : GND 22 : CS 21 : VCC (O) 20 : OUT 19 : VH 18 : VCC 17 : RT 16 : −INE3 15 : FB3 14 : CTL 13 : +INC1 (FPT-24P-M03) 2 MB3887 ■ PIN DESCRIPTION Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Symbol −INC2 OUTC2 +INE2 −INE2 FB2 VREF FB1 −INE1 +INE1 OUTC1 OUTD −INC1 +INC1 CTL FB3 −INE3 RT VCC VH OUT VCC (O) CS GND +INC2 I/O I O I I O O O I I O O I I I O I ⎯ ⎯ O O ⎯ ⎯ ⎯ I Descriptions Current detection amplifier (Current Amp2) input terminal. Current detection amplifier (Current Amp2) output terminal. Error amplifier (Error Amp2) non-inverted input terminal. Error amplifier (Error Amp2) inverted input terminal. Error amplifier (Error Amp2) output terminal. Reference voltage output terminal. Error amplifier (Error Amp1) output terminal. Error amplifier (Error Amp1) inverted input terminal Error amplifier (Error Amp1) non-inverted input terminal. Current detection amplifier (Current Amp1) output terminal. With IC in standby mode, this terminal is set to “Hi-Z” to prevent loss of current through output voltage setting resistance. Set CTL terminal to “H” level to output “L” level. Current detection amplifier (Current Amp1) input terminal. Current detection amplifier (Current Amp1) input terminal. Power supply control terminal. Setting the CTL terminal at “L” level places the IC in the standby mode. Error amplifier (Error Amp3) output terminal. Error amplifier (Error Amp3) inverted input terminal. Triangular-wave oscillation frequency setting resistor connection terminal. Power supply terminal for reference power supply and control circuit. Power supply terminal for FET drive circuit (VH = VCC − 6 V) . External FET gate drive terminal. Output circuit power supply terminal. Soft-start capacitor connection terminal. Ground terminal. Current detection amplifier (Current Amp2) input terminal. 3 MB3887 ■ BLOCK DIAGRAM −INE1 8 OUTC1 10 + × 20 − −INC1 12 +INE1 9 FB1 7 −INE2 4 OUTC2 2 + +INC2 24 × 20 − −INC2 1 +INE2 3 FB2 5 VREF −INE3 16 OUTD 11 − + + +INC1 13 VREF − + + + + Drive − VREF − + Bias Voltage 2.5 V 1.5 V 19 VH (VCC − 6 V) 21 VCC (O) 20 OUT VCC VCC (VCC UVLO) 215 kΩ + − 35 kΩ 4.2 V 0.91 V (0.77 V) VREF UVLO VCC 4.2 V 45 pF bias 17 RT VREF 5.0 V 6 VREF 23 GND 18 VCC 14 CTL FB3 15 VREF 10 µA CS 22 4 MB3887 ■ ABSOLUTE MAXIMUM RATINGS Rating Min ⎯ ⎯ ⎯ ⎯ −55 Max 28 60 700 740*1 +125 Parameter Power supply voltage Output current Peak output current Power dissipation Storage temperature Symbol VCC IOUT IOUT PD TSTG Conditions VCC, VCC (O) terminal*2 ⎯ Duty ≤ 5 % (t = 1 / fOSC × Duty) Ta ≤ +25 °C ⎯ Unit V mA mA mW °C *1 : The package is mounted on the dual-sided epoxy board (10 cm × 10 cm) . *2 : For details, refer to “■ THE SEQUENCE OF THE START-UP AND OFF OF THE POWER SUPPLY”. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. 5 MB3887 ■ RECOMMENDED OPERATING CONDITIONS Value Min 8 −1 0 0 0 0 0 0 −45 −600 100 27 ⎯ ⎯ ⎯ −30 Typ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 290 47 0.022 0.1 0.1 +25 Max 25 0 30 VCC − 1.8 VCC 17 2 25 +45 +600 500 130 1.0 1.0 1.0 +85 Parameter Power supply voltage Reference voltage output current VH terminal output current Symbol VCC IREF IVH VINE Conditions VCC, VCC (O) terminal* ⎯ ⎯ Unit V mA mA V V V mA V mA mA kHz kΩ µF µF µF °C Input voltage VINC OUTD terminal output voltage OUTD terminal output current CTL terminal input voltage Output current Peak output current Oscillation frequency Timing resistor Soft-start capacitor VH terminal capacitor Reference voltage output capacitor Operating ambient temperature VOUTD IOUTD VCTL IOUT IOUT fOSC RT CS CVH CREF Ta −INE1 to −INE3, +INE1, +INE2 terminal +INC1, +INC2, −INC1, −INC2 terminal ⎯ ⎯ ⎯ ⎯ Duty ≤ 5 % (t = 1 / fosc × Duty) ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ * : For details, refer to “■ THE SEQUENCE OF THE START-UP AND OFF OF THE POWER SUPPLY”. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 6 MB3887 ■ ELECTRICAL CHARACTERISTICS (Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA) Parameter Output voltage 1. Reference voltage block [REF] Input stability Load stability Short-circuit output current Symbol VREF1 VREF2 Line Load Ios VTLH Threshold voltage 2. Under voltage lockout protecHysteresis width tion circuit block Threshold voltage [UVLO] Hysteresis width 3. Soft-start block Charge current [SOFT] 4. Triangular waveform oscillator circuit block [OSC] Oscillation frequency Frequency temperature stability Input offset voltage Input bias current In-phase input voltage range VTHL VH VTLH VTHL VH ICS Pin No. 6 6 6 6 6 18 18 18 6 6 6 22 Conditions Ta = +25 °C Ta = −10 °C to +85 °C VCC = 8 V to 25 V VREF = 0 mA to −1 mA VREF = 1 V VCC = VCC (O) , VCC = VCC = VCC (O) , VCC = VCC = VCC (O) VREF = VREF = ⎯ ⎯ RT = 47 kΩ Value Min 4.967 4.95 ⎯ ⎯ −50 6.2 5.2 ⎯ 2.6 2.4 ⎯ −14 260 Typ 5.000 5.00 3 1 −25 6.4 5.4 1.0* 2.8 2.6 0.2 −10 290 Max 5.041 5.05 10 10 −12 6.6 5.6 ⎯ 3.0 2.8 ⎯ −6 320 Unit V V mV mV mA V V V V V V µA kHz fOSC 20 ∆f/fdt 20 Ta = −30 °C to +85 °C ⎯ 1* ⎯ % VIO IB VCM AV BW VFBH VFBL 3, 4, FB1 = FB2 = 2 V 8, 9 3, 4, 8, 9 3, 4, 8, 9 5, 7 DC 5, 7 AV = 0 dB 5, 7 5, 7 ⎯ ⎯ ⎯ ⎯ ⎯ −100 0 ⎯ ⎯ 4.7 ⎯ ⎯ 150 1 −30 ⎯ 100* 2* 4.9 20 −2 300 5 ⎯ VCC − 1.8 ⎯ ⎯ ⎯ 200 −1 ⎯ mV nA V dB MHz V mV mA µA 5-1. Error amplifier Voltage gain block Frequency [Error Amp1, bandwidth Error Amp2] Output voltage Output source current Output sink current * : Standard design value. ISOURCE 5, 7 FB1 = FB2 = 2 V ISINK 5, 7 FB1 = FB2 = 2 V (Continued) 7 MB3887 (Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA) Parameter Symbol VTH1 Threshold voltage Input current Voltage gain 5-2. Error amplifier block [Error Amp3] Frequency bandwidth Output voltage Output source current Output sink current OUTD terminal output leak current OUTD terminal output ON resistor VTH2 IINE3 AV BW VFBH VFBL ISOURCE ISINK ILEAK RON Pin No. 16 16 16 15 15 15 15 15 15 11 11 1, 12, 13, 24 13, 24 FB3 = 2 V FB3 = 2 V OUTD = 17 V OUTD = 1 mA +INC1 = +INC2 = −INC1 = −INC2 = 3 V to VCC +INC1 = +INC2 = 3 V to VCC, ∆VIN = −100 mV Conditions FB3 = 2 V, Ta = +25 °C FB3 = 2 V, Ta = −10 °C to +85 °C −INE3 = 0 V DC AV = 0 dB ⎯ ⎯ Value Min 4.183 4.169 −100 ⎯ ⎯ 4.7 ⎯ ⎯ 150 ⎯ ⎯ Typ 4.200 4.200 −30 100* 2* 4.9 20 −2 300 0 35 Max 4.225 4.231 ⎯ ⎯ ⎯ ⎯ 200 −1 ⎯ 1 50 Unit V V nA dB MHz V mV mA µA µA Ω Input offset voltage VIO −3 ⎯ +3 mV 6. Current detection amplifier block [Current Amp1, Current Amp2] Input current I+INCH ⎯ 20 30 µA I−INCH +INC1 = +INC2 = 1, 12 3 V to VCC, ∆Vin = −100 mV 13, 24 1, 12 +INC1 = +INC2 = 0 V, ∆Vin = −100 mV +INC1 = +INC2 = 0 V, ∆Vin = −100 mV ⎯ −180 −195 0.1 −120 −130 0.2 ⎯ ⎯ µA µA µA I+INCL I−INCL * : Standard design value (Continued) 8 MB3887 (Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA) Parameter Symbol Pin No. Conditions Value Min 1.9 Typ 2.0 Max 2.1 Unit +INC1 = +INC2 = VOUTC1 2, 10 3 V to VCC, ∆Vin = −100 mV +INC1 = +INC2 = VOUTC2 2, 10 3 V to VCC, ∆Vin = −20 mV +INC1 = +INC2 = VOUTC3 2, 10 0 V to 3 V, ∆Vin = −100 mV +INC1 = +INC2 = VOUTC4 2, 10 0 V to 3 V, ∆Vin = −20 mV VCM 1, 12, 13, 24 ⎯ V 0.34 0.40 0.46 V Current detection voltage 1.8 2.0 2.2 V 0.2 0.4 0.6 V 6. Current detection In-phase input amplifier block voltage range [Current Amp1, Current Amp2] Voltage gain Frequency bandwidth Output voltage Output source current Output sink current 7. PWM comparator block [PWM Comp.] 0 ⎯ VCC V AV +INC1 = +INC2 = 2, 10 3 V to VCC, ∆Vin = −100 mV 2, 10 AV = 0 dB ⎯ ⎯ 19 ⎯ 4.7 ⎯ ⎯ 150 1.4 ⎯ 20 21 ⎯ ⎯ 200 −1 ⎯ ⎯ 2.6 V/V BW 2* 4.9 20 −2 300 1.5 2.5 MHz V mV mA µA V V VOUTCH 2, 10 VOUTCL 2, 10 ISOURCE 2, 10 OUTC1 = OUTC2 = 2 V ISINK VTL 2, 10 OUTC1 = OUTC2 = 2 V 5, 7, Duty cycle = 0 % 15 5, 7, Duty cycle = 100 % 15 Threshold voltage VTH * : Standard design value (Continued) 9 MB3887 (Continued) Symbol ISOURCE ISINK ROH ROL tr1 tf1 VON VOFF ICTLH ICTLL Pin No. 20 20 20 20 20 20 14 14 14 14 (Ta = +25 °C, VCC = 19 V, VCC (O) = 19 V, VREF = 0 mA) Parameter Output source current Output sink current 8. Output block [OUT] Output ON resistor Rise time Fall time 9. Power supply control block [CTL] 10. Bias voltage block [VH] 11. General CTL input voltage Input current Conditions OUT = 13 V, Duty ≤ 5 % (t = 1 / fOSC × Duty) OUT = 19 V, Duty ≤ 5 % (t = 1 / fOSC × Duty) OUT = −45 mA OUT = 45 mA OUT = 3300 pF (Si4435 × 1) OUT = 3300 pF (Si4435 × 1) IC Active mode IC Standby mode CTL = 5 V CTL = 0 V VCC = VCC (O) = 8 V to 25 V, VH = 0 to 30 mA VCC = VCC (O) , CTL = 0 V VCC = VCC (O) , CTL = 5 V Value Min ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 2 0 ⎯ ⎯ Typ −400* 400* 6.5 5.0 50* 50* ⎯ ⎯ 100 0 Max ⎯ ⎯ 9.8 7.5 ⎯ ⎯ 25 0.8 150 1 Unit mA mA Ω Ω ns ns V V µA µA V Output voltage VH 19 VCC − 6.5 VCC − 6.0 VCC − 5.5 Standby current Power supply current ICCS ICC 18 18 ⎯ ⎯ 0 8 10 12 µA mA * : Standard design value 10 MB3887 ■ TYPICAL CHARACTERISTICS Power supply current vs. Power supply voltage Power supply current ICC (mA) 6 5 4 3 2 1 0 Ta = +25 °C CTL = 5 V Reference voltage vs. Power supply voltage 6 Reference voltage VREF (V) 5 4 3 2 1 0 Ta = +25 °C CTL = 5 V VREF = 0 mA 0 5 10 15 20 25 0 5 10 15 20 25 Power supply voltage VCC (V) Reference voltage vs. Reference voltage output current 6 Power supply voltage VCC (V) Reference voltage vs. Ambient temperature 5.08 Reference voltage VREF (V) Reference voltage VREF (V) 5 4 3 2 1 0 0 5 10 15 20 Ta = +25 °C VCC = 19 V CTL = 5 V 5.06 5.04 5.02 5.00 4.98 4.96 4.94 4.92 −40 −20 +20 +40 VCC = 19 V CTL = 5 V 25 30 0 +60 +80 +100 Reference voltage output current IREF (mA) CTL terminal current, Reference voltage vs. CTL terminal voltage CTL terminal current ICTL (µA) 1000 900 800 700 600 500 400 300 200 100 0 0 5 10 15 20 25 ICTL VREF Ta = +25 °C VCC = 19 V 10 9 8 7 6 5 4 3 2 1 0 Ambient temperature Ta ( °C) CTL terminal voltage VCTL (V) (Continued) 11 Reference voltage VREF (V) MB3887 Triangular wave oscillation frequency vs. Timing resistor 1M Triangular wave oscillation frequency vs. Power supply voltage 340 Ta = +25 °C CTL = 5 V RT = 47 kΩ Triangular wave oscillation frequency fOSC (Hz) Triangular wave oscillation frequency fOSC (kHz) Ta = +25 °C VCC = 19 V CTL = 5 V 330 320 310 300 290 280 270 260 0 5 10 15 100 k 10 k 10 100 1000 20 25 Timing resistor RT (kΩ) Power supply voltage VCC (V) Triangular wave oscillation frequency vs. Ambient temperature 320 315 310 305 300 295 290 285 280 275 270 265 260 −40 VCC = 19 V CTL = 5 V RT = 47 kΩ 4.25 2.24 Error amplifier threshold voltage vs. Ambient temperature VCC = 19 V CTL = 5 V Triangular wave oscillation frequency fOSC (kHz) Error amplifier threshold voltage VTH (V) +100 4.23 2.22 4.21 4.20 4.19 4.18 4.17 4.16 4.15 −40 −20 0 +20 +40 −20 0 +20 +40 +60 +80 +60 +80 +100 Ambient temperature Ta ( °C) Ambient temperature Ta ( °C) (Continued) 12 MB3887 Error amplifier gain and phase vs. Frequency 40 AV φ Ta = +25 °C 180 4.2 V VCC = 19 V 240 kΩ 10 kΩ 2.4 kΩ 8 (4) 9 (3) − + 7 (5) Error Amp1 (Error Amp2) OUT Phase φ (deg) 20 90 Gain AV (dB) 10 kΩ 1 µF IN + 0 0 −20 −40 1k 10 k 100 k 1M −90 10 kΩ −180 10 M 10 kΩ Frequency f (Hz) Error amplifier gain and phase vs. Frequency 40 AV φ Ta = +25 °C 180 10 kΩ 4.2 V 10 kΩ VCC = 19 V 240 kΩ Phase φ (deg) Gain AV (dB) 20 90 1 µF IN + 0 0 2.4 kΩ 16 22 − + + 15 OUT −20 −40 1k 10 k 100 k 1M −90 10 kΩ 10 kΩ Error Amp3 4.2 V −180 10 M Frequency f (Hz) Current detection amplifier gain and phase vs. Frequency Ta = +25 °C 40 AV φ 180 VCC = 19 V 13 + (24) ×20 10 (2) 12 − (1) Current Amp1 (Current Amp2) 12.6 V 12.55 V Phase φ (deg) Gain AV (dB) 20 90 OUT 0 0 −20 −40 1k 10 k 100 k 1M −90 −180 10 M Frequency f (Hz) (Continued) 13 MB3887 (Continued) Power dissipation vs. Ambient temperature Power dissipation PD (mW) 800 740 700 600 500 400 300 200 100 0 −40 −20 0 +20 +40 +60 +80 +100 Ambient temperature Ta ( °C) 14 MB3887 ■ FUNCTIONAL DESCRIPTION 1. DC/DC Converter Unit (1) Reference voltage block (Ref) The reference voltage generator uses the voltage supplied from the VCC terminal (pin 18) to generate a temperature-compensated, stable voltage (5.0 V Typ) used as the reference supply voltage for the IC’s internal circuitry. This terminal can also be used to obtain a load current to a maximum of 1mA from the reference voltage VREF terminal (pin 6) . (2) Triangular wave oscillator block (OSC) The triangular wave oscillator builds the capacitor for frequency setting into, and generates the triangular wave oscillation waveform by connecting the frequency setting resistor with the RT terminal (pin 17) . The triangular wave is input to the PWM comparator on the IC. (3) Error amplifier block (Error Amp1) This amplifier detects the output signal from the current detection amplifier (Current amp1) , compares this to the +INE1 terminal (pin 9) , and outputs a PWM control signal to be used in controlling the charging current. In addition, an arbitrary loop gain can be set up by connecting a feedback resistor and capacitor between the FB1 terminal (pin 7) and -INE1 terminal (pin 8) , providing stable phase compensation to the system. (4) Error amplifier block (Error Amp2) This amplifier (Error Amp2) detects voltage drop of the AC adapter and outputs a PWM control signal. In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB2 terminal (pin 5) to the −INE2 terminal (pin 4) of the error amplifier, enabling stable phase compensation to the system. (5) Error amplifier block (Error Amp3) This error amplifier (Error Amp3) detects the output voltage from the DC/DC converter and outputs the PWM control signal. External output voltage setting resistors can be connected to the error amplifier inverted input terminal to set the desired level of output voltage from 1 cell to 4 cells. In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the FB3 terminal (pin 15) to the −INE3 terminal (pin 16) of the error amplifier, enabling stable phase compensation to the system. Connecting a soft-start capacitor to the CS terminal (pin 22) prevents rush currents when the IC is turned on. Using an error amplifier for soft-start detection makes the soft-start time constant, independent of the output load. (6) Current detection amplifier block (Current Amp1) The current detection amplifier (Current Amp1) detects a voltage drop which occurs between both ends of the output sense resistor (RS) due to the flow of the charge current, using the +INC1 terminal (pin 13) and −INC1 terminal (pin 12) . Then it outputs the signal amplified by 20 times to the error amplifier (Error Amp1) at the next stage. 15 MB3887 (7) PWM comparator block (PWM Comp.) The PWM comparator circuit is a voltage-pulse width converter for controlling the output duty of the error amplifiers (Error Amp1 to Error Amp3) depending on their output voltage. The PWM comparator circuit compares the triangular wave generated by the triangular wave oscillator to the error amplifier output voltage and turns on the external output transistor during the interval in which the triangular wave voltage is lower than the error amplifier output voltage. (8) Output block (OUT) The output circuit uses a totem-pole configuration capable of driving an external P-channel MOS FET. The output “L” level sets the output amplitude to 6 V (Typ) using the voltage generated by the bias voltage block (VH) . This results in increasing conversion efficiency and suppressing the withstand voltage of the connected external transistor in a wide range of input voltages. (9) Control block (CTL) Setting the CTL terminal (pin 14) low places the IC in the standby mode. (The supply current is 10 µA at maximum in the standby mode.) CTL function table CTL L H (10) Bias voltage block (VH) The bias voltage circuit outputs VCC −6 V (Typ) as the minimum potential of the output circuit. In the standby mode, this circuit outputs the potential equal to VCC. Power OFF (Standby) ON (Active) OUTD Hi-Z L 2. Protection Functions Under voltage lockout protection circuit (UVLO) The transient state or a momentary decrease in supply voltage or internal reference voltage (VREF) , which occurs when the power supply (VCC) is turned on, may cause malfunctions in the control IC, resulting in breakdown or degradation of the system. To prevent such malfunction, the under voltage lockout protection circuit detects a supply voltage or internal reference voltage drop and fixes the OUT terminal (pin 20) to the “H” level. The system restores voltage supply when the supply voltage or internal reference voltage reaches the threshold voltage of the under voltage lockout protection circuit. Protection circuit (UVLO) operation function table When UVLO is operating (VCC or VREF voltage is lower than UVLO threshold voltage.) OUTD OUT CS Hi-Z H L 16 MB3887 3. Soft-Start Function Soft-start block (SOFT) Connecting a capacitor to the CS terminal (pin 22) prevents rush currents when the IC is turned on. Using an error amplifier for soft-start detection makes the soft-start time constant, being independent of the output load of the DC/DC converter. ■ SETTING THE CHARGING VOLTAGE The charging voltage (DC/DC output voltage) can be set by connecting external voltage setting resistors (R3, R4) to the −INE3 terminal (pin 16) . Be sure to select a resistor value that allows you to ignore the on-resistor (35 Ω, 1mA) of the internal FET connected to the OUTD terminal (pin 11) . In standby mode, the charging voltage is applied to OUTD termial. Therefore, output voltage must be adjusted so that voltage applied to OUTD terminal (pin 11) is 17 V or less. Battery charging voltage : VO VO (V) = (R3 + R4) / R4 × 4.2 (V) B VO R3 −INE3 16 − + + 4.2 V R4 11 OUTD 22 CS ■ METHOD OF SETTING THE CHARGING CURRENT The charge current (output limit current) value can be set with the voltage at the +INE1 terminal (pin 9) . If a current exceeding the set value attempts to flow, the charge voltage drops according to the set current value. Battery charge current setting voltage : +INE1 +INE1 (V) = 20 × I1 (A) × RS (Ω) ■ METHOD OF SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY The triangular wave oscillation frequency can be set by the timing resistor (RT) connected the RT terminal (pin 17) . Triangular wave oscillation frequency : fOSC fOSC (kHz) = 13630 / RT (kΩ) : 17 MB3887 ■ METHOD OF SETTING THE SOFT-START TIME For preventing rush current upon activation of IC, the IC allows soft-start using the capacitor (Cs) connected to the CS terminal (pin 22) . When CTL terminal (pin 14) is placed under “H” level and IC is activated (VCC ≥ UVLO threshold voltage) , Q2 is turned off and the external soft-start capacitor (Cs) connected to the CS terminal is charged at 10 µA. Error Amp output (FB3 terminal (pin 15) ) is determined by comparison between the lower voltage of the two non-reverse input terminals (4.2 V and CS terminal voltage) and reverse input terminal voltage (−INE3 terminal (pin 16) voltage) . Within the soft-start period (CS terminal voltage < 4.2 V) , FB3 is determined by comparison between −INE3 terminal voltage and CS terminal voltage, and DC/DC converter output voltage goes up proportionately with the increase of CS terminal voltage caused by charging on the soft-start capacitor. Soft-start time is found by the following formula : Soft-start time : ts (time to output 100 %) tS (s) = 0.42 × CS (µF) : = 4.9 V = 4.2 V CS terminal voltage Comparison with Error Amp block − INE3 voltage. =0V Soft-start time: ts VREF 10 µA 10 µA FB3 15 − + + 4.2 V Error Amp3 −INE3 16 CS 22 CS Q2 UVLO Soft-start circuit 18 MB3887 ■ AC ADAPTOR VOLTAGE DETECTION • With an external resistor connected to the +INE2 terminal (pin 3) , the IC enters the dynamically-controlled charging mode to reduce the charge current to keep AC adapter power constant when the partial potential point A of the AC adapter voltage (VCC) becomes lower than the voltage at the −INE2 terminal. AC adapter detection voltage setting : Vth Vth (V) = (R1 + R2) / R2 × −INE2 −INE2 A R1 R2 +INE2 4 3 − + VCC ■ OPERATION TIMING DIAGRAM Error Amp2 FB2 Error Amp1 FB1 2.5 V Error Amp2 FB3 1.5 V OUT Constant voltage control Constant current control AC adapter dynamicallycontrolled charging 19 MB3887 ■ PROCESSING WITHOUT USING THE CURRENT AMP When Current Amp is not used, connect the +INC1 terminal (pin 13) , +INC2 terminal (pin 24) , −INC1 terminal (pin 12) , and −INC2 terminal (pin 1) to VREF, and then leave OUTC1 terminal (pin 10) and OUTC2 terminal (pin 2) open. 12 1 −INC1 −INC2 +INC1 13 +INC2 24 “Open” 10 2 OUTC1 OUTC2 6 VREF Connection when Current Amp is not used 20 MB3887 ■ PROCESSING WITHOUT USING OF THE ERROR AMP When Error Amp is not used, leave FB1 terminal (pin 7) , FB2 terminal (pin 5) open and connect the −INE1 terminal (pin 8) and −INE2 terminal (pin 4) to GND and connect +INE1 terminal (pin 9) , and +INE2 terminal (pin 3) , to VREF. 9 3 8 4 +INE1 +INE2 −INE1 −INE2 FB1 FB2 VREF GND 23 “Open” 7 5 6 Connection when Error Amp is not used 21 MB3887 ■ PROCESSING WITHOUT USING OF THE CS TERMINAL When soft-start function is not used, leave the CS terminal (pin 22) open. “Open” CS 22 Connection when soft-start time is not specified ■ NOTE ON AN EXTERNAL REVERSE-CURRENT PREVENTIVE DIODE • Insert a reverse-current preventive diode at one of the three locations marked * to prevent reverse current from the battery. • When selecting the reverse current prevention diode, be sure to consider the reverse voltage (VR) and reverse current (IR) of the diode. 21 VCC(O) VIN ∗ A 20 OUT B ∗ I1 RS BATT ∗ VH 19 Battery 22 MB3887 ■ THE SEQUENCE OF THE START-UP AND OFF OF THE POWER SUPPLY Please start up and off the VCC terminal (pin 18) and VCC(O) terminal (pin 21) of the power supply terminal at the same time. No do occurrence of the bias from the VH terminal (pin 19) , when there is a period of 8 V or less in the VCC voltage after previously starting up VCC(O). At this time, there is a possibility of leading to permanent destruction of the device when the voltage of 17 V or more is impressed to the VCC(O) terminal (pin 21) . Moreover, when earliness VCC falls more than VCC(O) when falling, it is similar. 23 24 MB3887 VREF − + + C1 22 µF A Q1 L1 22 µH VH 19 (VCC − 6 V) D1 C2 100 µF + + C3 100 µF I1 R1 0.033 Ω Battery B IIN VCC (O) 21 C5 0.1 µF OUT VIN = 13.93 V to 25 V (at 3 cell) VIN = 17.65 V to 25 V (at 4 cell) R14 1 kΩ AC Adaptor R16 R15 200 kΩ 120 Ω −INE2 4 20 + + + Drive − ■ APPLICATION EXAMPLE Q2 R8 100 kΩ −INE1 8 OUTC1 10 C10 5600 pF +INC1 A + 13 R9 × 20 −INC1 10 kΩ − B 12 R12 30 kΩ +INE1 9 R13 20 kΩ FB1 7 SW VREF VCC − + Bias Voltage 2.5 V 1.5 V (VCC UVLO) 215 kΩ + − 35 kΩ 0.91 V (0.77 V) VREF UVLO VCC 4.2 V 45 pF bias 17 RT R2 47 kΩ 6 VREF VREF 5.0 V 23 GND C9 0.1 µF 18 VCC 14 CTL OUTC2 2 +INC2 + 24 × 20 − 1 −INC2 3 +INE2 FB2 5 VREF 16 − + + C8 10000 pF R7 R4 22 kΩ 82 kΩ VO R10 30 kΩ R5 330 kΩ R6 68 kΩ VCC R11 30 kΩ −INE3 11 OUTD 4.2 V FB3 15 VREF 10 µA C6 1500 pF R19 100 kΩ R18 200 kΩ Output voltage (Battery voltage) is adjustable R3 330 kΩ R17 100 kΩ Note: Set output voltage so that voltage applied to OUTD terminal is 17 V or less. CS 22 C4 0.022 µF C7 0.1 µF MB3887 ■ PARTS LIST COMPONENT Q1 Q2 D1 L1 C1 C2, C3 C4 C5 C6 C7 C8 C9 C10 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 to R12 R13 R14 R15 R16, R18 R17, R19 ITEM P-ch FET N-ch FET Diode Inductor OS-CONTM Electrolytic Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor SPECIFICATION VENDOR PARTS No. Si4435DY 2N7002E RB053L-30 SLF12565T220M3R5 25SL22M 25CV100AX C1608JB1H223K CM21W5R104K16 GRM39B152K10 GRM39F104KZ25 GRM39B103K10 CM21W5R104K16 GRM39B562K10 RK73Z1J-0D RK73G1J-473D RK73G1J-334D RK73G1J-823D RK73G1J-334D RK73G1J-683D RK73G1J-223D RK73G1J-104D CR21-103-F RK73G1J-303D RK73G1J-203D RK73G1J-102D RR0816P121D RK73G1J-204D RK73G1J-104D VDS = −30 V, ID = ±8 A (Max) VISHAY SILICONIX VDS = 60 V, ID = 0.115 A VISHAY SILICONIX (Max) VF = 0.42 V (Max) , IF = 3 A 22 µH 22 µF 100 µF 0.022 µF 0.1 µF 1500 pF 0.1 µF 10000 pF 0.1 µF 5600 pF 0.033 Ω 47 kΩ 330 kΩ 82 kΩ 330 kΩ 68 kΩ 22 kΩ 100 kΩ 10 kΩ 30 kΩ 20 kΩ 1 kΩ 120 Ω 200 kΩ 100 kΩ 3.5 A, 31.6 mΩ 25 V (10 %) 25 V (10 %) 50 V 16 V 10 V 25 V 10 V 16 V 10 V 1.0 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 1.0 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % 0.5 % ROHM TDK SANYO SANYO TDK KYOCERA MURATA MURATA MURATA KYOCERA MURATA SEIDEN TECHNO KOA KOA KOA KOA KOA KOA KOA KYOCERA KOA KOA KOA ssm KOA KOA Note : VISHAY SILICONIX : VISHAY Intertechnology, Inc. ROHM : ROHM CO., LTD. TDK : TDK Corporation SANYO : SANYO Electric Co., Ltd. KYOCERA : Kyocera Corporation MURATA : Murata Manufacturing Co., Ltd. SEIDEN TECHNO : SEIDEN TECHNO CO., LTD. KOA : KOA Corporation ssm : SUSUMU Co., Ltd. OS-CON is a trademark of SANYO Electric Co., Ltd. 25 MB3887 ■ REFERENCE DATA Conversion efficiency vs. BATT charge current (Constant voltage mode) 100 Conversion efficiency vs. BATT charge voltage (Constant current mode) 100 Conversion efficiency η (%) 1 10 Conversion efficiency η (%) 98 96 94 92 90 88 86 84 82 Ta = +25 °C VIN = 19 V BATT charge voltage = set at 12.6 V SW = ON Efficiency η (%) = (VBATT × IBATT) / (VIN × IIN) × 100 98 96 94 92 90 88 86 84 82 80 0 Ta = +25 °C VIN = 19 V BATT charge voltage = set at 12.6 V SW = ON Efficiency η (%) = (VBATT × IBATT) / (VIN × IIN) × 100 80 10 m 100 m 2 4 6 8 10 12 14 16 BATT charge current IBATT (A) BATT charge voltage VBATT (V) Conversion efficiency vs. BATT charge current (Constant voltage mode) 100 Conversion efficiency vs. BATT charge voltage (Constant current mode) 100 Conversion efficiency η (%) 98 96 94 92 90 88 86 84 82 80 10 m 100 m Ta = +25 °C VIN = 19 V BATT charge voltage = set at 16.8 V SW = ON Efficiency η (%) = (VBATT × IBATT) / (VIN × IIN) × 100 1 10 Conversion efficiency η (%) 98 96 94 92 90 88 86 84 82 80 0 2 4 6 8 10 Ta = +25 °C VIN = 19 V BATT charge voltage = set at 16.8 V SW = ON Efficiency η (%) = (VBATT × IBATT) / (VIN × IIN) × 100 12 14 16 18 20 BATT charge current IBATT (A) BATT charge voltage VBATT (V) (Continued) 26 MB3887 Conversion efficiency vs. BATT charge current (Constant voltage mode) 100 Conversion efficiency vs. BATT charge voltage (Constant current mode) 100 Conversion efficiency η (%) 98 96 94 92 90 88 86 84 82 80 10 m 100 m Ta = +25 °C VIN = 19 V BATT charge voltage = set at 16.8 V SW = ON Efficiency η (%) = (VBATT × IBATT) / (VIN × IIN) × 100 1 10 Conversion efficiency η (%) 98 96 94 92 90 88 86 84 82 80 0 2 4 6 8 10 Ta = +25 °C VIN = 19 V BATT charge voltage = set at 16.8 V SW = ON Efficiency η (%) = (VBATT × IBATT) / (VIN × IIN) × 100 12 14 16 18 20 BATT charge current IBATT (A) BATT charge voltage VBATT (V) BATT voltage vs. BATT charge current (set at 12.6 V) 18 16 Ta = +25 °C VIN = 19 V BATT : Electronic load, (Product of KIKUSUI PLZ-150W) 20 18 BATT voltage vs. BATT charge current (set at 16.8 V) BATT : Electronic load, (Product of KIKUSUI PLZ-150W) Ta = +25 °C VIN = 19 V Dead Battery MODE DCC MODE BATT voltage VBATT (V) BATT voltage VBATT (V) 14 12 10 8 6 4 2 0 0 0.5 1 1.5 16 14 12 10 8 6 4 2 0 0 0.5 1 1.5 Dead Battery MODE DCC MODE DCC : Dynamically-Controlled 2 2.5 3 3.5 4 4.5 5 DCC : Dynamically-Controlled 2 2.5 3 3.5 4 4.5 5 BATT charge current IBATT (A) BATT charge current IBATT (A) (Continued) 27 MB3887 Switching waveform constant voltage mode (set at 12.6 V) VBATT (mV) 100 0 −100 VD (V) 15 10 5 0 VD Ta = +25 °C VIN = 19 V BATT = 1.5 A Switching waveform constant current mode (set at 12.6 V, with 10 V) VBATT (mV) Ta = +25 °C VIN = 19 V 100 BATT = 3.0 A 0 −100 VD (V) 15 10 5 0 VD 98 mVp-p 98 mVp-p VBATT VBATT 0 1 2 3 4 5 6 7 8 9 10 (µs) 0 1 2 3 4 5 6 7 8 9 10 (µs) Switching waveform constant voltage mode (set at 16.8 V) + VBATT (mV) Ta = = 25 °C VIN 19 V 100 BATT = 1.5 A Switching waveform constant current mode (set at 16.8 V, with 10 V) VBATT (mV) 100 0 Ta = +25 °C VIN = 19 V BATT = 3.0 A 58 mVp-p VBATT VD 96 mVp-p VBATT VD 0 −100 VD (V) 15 10 5 0 −100 VD (V) 15 10 5 0 0 1 2 3 4 5 6 7 8 9 10 (µs) 0 1 2 3 4 5 6 7 8 9 10 (µs) (Continued) 28 MB3887 (Continued) Soft-start operating waveform constant voltage mode (set at 12.6 V) VBATT (V) 20 10 0 VCS (V) 4 2 0 VCTL (V) 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) VCTL Ta = +25 °C, VIN = 19 V BATT = 12 Ω ts = 10.4 ms VBATT 10 VBATT VCS 0 VCS (V) 4 2 VCS 0 VCTL (V) 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) VCTL Ta = +25 °C VIN = 19 V BATT = 12 Ω Discharge operating waveform constant voltage mode (set at 12.6 V) VBATT (V) 20 Soft-start operating waveform constant voltage mode (set at 16.8 V) VBATT (V) 20 10 0 VCS (V) 4 2 0 VCTL (V) 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) VCTL Ta = +25 °C, VIN = 19 V BATT = 12 Ω ts = 10.4 ms VCS VBATT Discharge operating waveform constant voltage mode (set at 16.8 V) VBATT (V) 20 10 VBATT 0 VCS (V) 4 2 VCS 0 VCTL (V) 5 0 0 2 4 6 8 10 12 14 16 18 20 (ms) VCTL Ta = +25 °C VIN = 19 V BATT = 12 Ω 29 MB3887 ■ USAGE PRECAUTIONS • Printed circuit board ground lines should be set up with consideration for common impedance. • Take appropriate static electricity measures. • Containers for semiconductor materials should have anti-static protection or be made of conductive material. • After mounting, printed circuit boards should be stored and shipped in conductive bags or containers. • Work platforms, tools, and instruments should be properly grounded. • Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground. • Do not apply negative voltages. • The use of negative voltages below −0.3 V may create parasitic transistors on LSI lines, which can cause malfunction. ■ ORDERING INFORMATION Part number MB3887PFV-❏❏❏ MB3887PFV-❏❏❏E1 Package 24-pin plastic SSOP (FPT-24P-M03) 24-pin plastic SSOP (FPT-24P-M03) Remarks Conventional version Lead Free version ■ RoHS Compliance Information of Lead (Pb) Free version The LSI products of Fujitsu with “E1” are compliant with RoHS Directive , and has observed the standard of lead, cadmium, mercury, Hexavalent chromium, polybrominated biphenyls (PBB) , and polybrominated diphenyl ethers (PBDE) . The product that conforms to this standard is added “E1” at the end of the part number. ■ MARKING FORMAT (Lead Free version) 3887 XXXX XXX E1 INDEX Lead Free version 30 MB3887 ■ LABELING SAMPLE (Lead free version) lead-free mark JEITA logo JEDEC logo MB123456P - 789 - GE1 (3N) 1MB123456P-789-GE1 1000 G Pb (3N)2 1561190005 107210 QC PASS PCS 1,000 MB123456P - 789 - GE1 2006/03/01 ASSEMBLED IN JAPAN 1/1 MB123456P - 789 - GE1 0605 - Z01A 1000 1561190005 Lead Free version 31 MB3887 ■ MB3887PFV-❏❏❏E1 Recommended Conditions of Moisture Sensitivity Level Item Mounting Method Mounting times Before opening Storage period From opening to the 2nd reflow When the storage period after opening was exceeded Storage conditions Condition IR (infrared reflow) , Manual soldering (partial heating method) 2 times Please use it within two years after Manufacture. Less than 8 days Please processes within 8 days after baking (125 °C, 24H) 5 °C to 30 °C, 70%RH or less (the lowest possible humidity) [Temperature Profile for FJ Standard IR Reflow] (1) IR (infrared reflow) H rank : 260 °C Max 260 °C 255 °C 170 °C to 190 °C RT (b) (c) (d) (e) (a) (d') (a) Temperature Increase gradient (b) Preliminary heating (c) Temperature Increase gradient (d) Actual heating (d’) (e) Cooling : Average 1 °C/s to 4 °C/s : Temperature 170 °C to 190 °C, 60s to 180s : Average 1 °C/s to 4 °C/s : Temperature 260 °C Max; 255 °C or more, 10s or less : Temperature 230 °C or more, 40s or less or Temperature 225 °C or more, 60s or less or Temperature 220 °C or more, 80s or less : Natural cooling or forced cooling Note : Temperature : the top of the package body (2) Manual soldering (partial heating method) Conditions : Temperature 400 °C Max Times 32 : 5 s max/pin MB3887 ■ PACKAGE DIMENSION 24-pin plastic SSOP Lead pitch Package width × package length Lead shape Sealing method Mounting height Weight 0.65 mm 5.6 × 7.75 mm Gullwing Plastic mold 1.45 mm MAX 0.12 g P-SSOP24-5.6×7.75-0.65 (FPT-24P-M03) Code (Reference) 24-pin plastic SSOP (FPT-24P-M03) *17.75±0.10(.305±.004) 24 13 Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max). Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. 0.17±0.03 (.007±.001) *2 5.60±0.10 INDEX 7.60±0.20 (.220±.004) (.299±.008) Details of "A" part 1.25 –0.10 .049 –.004 +0.20 +.008 (Mounting height) 0.25(.010) 0~8˚ 1 12 "A" M 0.65(.026) 0.24 –0.07 .009 –.003 +0.08 +.003 0.13(.005) 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.10±0.10 (.004±.004) (Stand off) 0.10(.004) C 2003 FUJITSU LIMITED F24018S-c-4-5 Dimensions in mm (inches). Note: The values in parentheses are reference values. 33 MB3887 FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party’s intellectual property right or other right by using such information. Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. Edited Business Promotion Dept. F0605