MB39A110

FUJITSU SEMICONDUCTOR DATA SHEET DS04-27236-3E ASSP For Power Supply Applications (DC/DC Converter for DSC/Camcorder) 4-ch DC/DC Converter IC with Synchronous Rectification MB39A110 ■ DESCRIPTION The MB39A110 is a 4-channel DC/DC converter IC using pulse width modulation (PWM). This IC is ideal for up conversion, down conversion, and up/down conversion. This is built-in 4 ch in TSSOP-38P package and operates at 2 MHz Max. Each channel can be controlled, and soft-start. This is an ideal power supply for high-performance portable devices such as digital still cameras. This product is covered by US Patent Number 6,147,477. ■ FEATURES • • • • • • • • • • • • Supports for down-conversion and up/down Zeta conversion (CH1 to CH3) Supports for up-conversion and up/down Sepic conversion (CH4) For synchronous rectification (CH1, CH2) Power supply voltage range : 2.5 V to 11 V Reference voltage : 2.0 V ± 1 % Error amplifier threshold voltage : 1.23 V ± 1% High-frequency operation capability: 2 MHz (Max) Standby current : 0 µA (Typ) Built-in soft-start circuit independent of loads Built-in totem-pole type output for MOS FET Short-circuit detection capability by external signal (−INS terminal) One type of package (TSSOP-38 pin : 1 type) ■ APPLICATIONS • Digital still camera(DSC) • Digital video camera(DVC) • Surveillance camera etc. Copyright©2002-2006 FUJITSU LIMITED All rights reserved MB39A110 ■ PIN ASSIGNMENT (TOP VIEW) CS2 −INE2 FB2 DTC2 VCC CTL CTL1 CTL2 CTL3 CTL4 VREF RT CT GND CSCP DTC3 FB3 −INE3 CS3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 CS1 −INE1 FB1 DTC1 VCCO-P OUT1-1 OUT1-2 OUT2-1 OUT2-2 GNDO1 GNDO2 OUT3 OUT4 VCCO-N −INS DTC4 FB4 −INE4 CS4 (FPT-38P-M03) 2 MB39A110 ■ PIN DESCRIPTION Block Pin No. 35 36 37 CH1 38 33 32 4 3 2 CH2 1 31 30 16 17 CH3 18 19 27 23 22 CH4 21 20 26 13 OSC 12 RT ⎯ Symbol DTC1 FB1 −INE1 CS1 OUT1-1 OUT1-2 DTC2 FB2 −INE2 CS2 OUT2-1 OUT2-2 DTC3 FB3 −INE3 CS3 OUT3 DTC4 FB4 −INE4 CS4 OUT4 CT I/O I O I ⎯ O O I O I ⎯ O O I O I ⎯ O I O I ⎯ O ⎯ Descriptions Dead time control terminal Error amplifier output terminal Error amplifier inverted input terminal Soft-start setting capacitor connection terminal P-ch drive output block ground terminal (External main side FET gate driving) N-ch drive output block ground terminal (External synchronous rectification side FET gate driving) Dead time control terminal Error amplifier output terminal Error amplifier inverted input terminal Soft-start setting capacitor connection terminal P-ch drive output block ground terminal (External main side FET gate driving) N-ch drive output block ground terminal (External synchronous rectification side FET gate driving) Dead time control terminal Error amplifier output terminal Error amplifier inverted input terminal Soft-start setting capacitor connection terminal P-ch drive output terminal Dead time control terminal Error amplifier output terminal Error amplifier inverted input terminal Soft-start setting capacitor connection terminal N-ch drive output terminal Triangular wave frequency setting capacitor connection terminal Triangular wave frequency setting resistor connection terminal (Continued) 3 MB39A110 (Continued) Block Pin No. 6 7 8 9 Control 10 15 24 34 25 5 Power 11 29 28 14 Symbol CTL CTL1 CTL2 CTL3 CTL4 CSCP −INS VCCO-P VCCO-N VCC VREF GNDO1 GNDO2 GND I/O I I I I I ⎯ I ⎯ ⎯ ⎯ O ⎯ ⎯ ⎯ Control terminal Control terminal Control terminal Control terminal Descriptions Power supply control terminal Short-circuit detection circuit capacitor connection terminal Short-circuit detection comparator inverted input terminal P-ch drive output block power supply terminal N-ch drive output block power supply terminal Power supply terminal Reference voltage output terminal Drive output block ground terminal Drive output block ground terminal Ground terminal 4 MB39A110 ■ BLOCK DIAGRAM −INE1 37 1.23 V FB1 36 DTC1 35 Threshold voltage (1.23 V ± 1 %) Dead Time (td = 50 ns) Dead Time VREF priority Error Amp1 1 µA − + CS1 38 + L L priority + + − PWM Comp.1 IO = 300 mA CH1 at VCCO = 7 V Drive1-1 P-ch 34 VCCO-P 33 OUT1-1 25 VCCO-N 32 OUT1-2 Drive1-2 N-ch IO = 300 mA at VCCO = 7 V −INE2 2 1.23 V FB2 3 DTC2 4 Threshold voltage (1.23 V ± 1 %) Dead Time (td = 50 ns) Dead Time VREF priority Error Amp2 1 µA − + 1 CS2 + L IO = 300 mA CH2 L priority at VCCO = 7 V PWM Drive2-1 Comp.2 + + − P-ch 31 OUT2-1 Drive2-2 N-ch 30 OUT2-2 IO = 300 mA at VCCO = 7 V −INE3 18 VREF priority Error Amp3 1 µA − + CS3 19 + 1.23 V L L priority IO = 300 mA CH3 PWM at VCCO = 7 V Comp.3 Drive3 + + − P-ch 27 OUT3 FB3 17 DTC3 16 −INE4 21 Threshold voltage (1.23 V ± 1 %) L L priority IO = 300 mA CH4 PWM at VCCO = 7 V Comp.4 Drive4 VREF priority Error Amp4 1 µA − + CS4 20 + 1.23 V + + − N-ch 26 OUT4 29 GNDO1 28 GNDO2 FB4 22 DTC4 23 −INS 24 Short detection signal (L: at short) CSCP 15 CTL1 CTL2 CTL3 CTL4 7 8 9 10 Threshold voltage (1.23 V ± 1 %) VREF 100 kΩ SCP − Comp. H : SCP + 1V 0.9 V 0.4 V CH CTL OSC SCP H : release UVLO ErrorAmp power supply SCPComp. power supply bias UVLO ErrorAmp reference 1.23 V 5 VCC VREF 2.0 V 11 VREF VR Power ON/OFF CTL 6 CTL 12 13 RT CT 14 GND 5 MB39A110 ■ ABSOLUTE MAXIMUM RATINGS Parameter Power supply voltage Output current Peak output current Power dissipation Storage temperature Symbol VCC IO IOP PD TSTG Condition VCC, VCCO terminal OUT1 to OUT4 terminal OUT1 to OUT4 terminal, Duty ≤ 5% (t = 1 / fOSC×Duty) Ta ≤ +25 °C ⎯ Rating Min ⎯ ⎯ ⎯ ⎯ −55 Max 12 20 400 1680* +125 Unit V mA mA mW °C * : The packages are mounted on the epoxy board (10 cm × 10 cm). WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. ■ RECOMMENDED OPERATING CONDITIONS Parameter Power supply voltage Reference voltage output current Input voltage Control input voltage Output current Oscillation frequency Timing capacitor Timing resistor Soft-start capacitor Short-circuit detection capacitor Reference voltage output capacitor Operating ambient temperature Symbol VCC IREF VINE VDTC VCTL IO fOSC CT RT CS CSCP CREF Ta Condition VCC, VCCO terminal VREF terminal −INE1 to −INE4 terminal −INS terminal DTC1 to DTC4 terminal CTL terminal OUT1 to OUT4 terminal ⎯ ⎯ ⎯ CS1 to CS4 terminal ⎯ ⎯ ⎯ Min 2.5 −1 0 0 0 0 −15 0.2 27 3.0 ⎯ ⎯ ⎯ −30 Value Typ 7 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 1.02 100 6.8 0.1 0.1 0.1 +25 Unit Max 11 V 0 mA V VCC − 0.9 V VREF VREF V 11 V +15 mA 2.0 kHz 680 pF 39 kΩ 1.0 µF 1.0 µF 1.0 +85 µF °C WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 6 MB39A110 ■ ELECTRICAL CHARACTERISTICS Symbol VREF1 Output voltage 1. Reference voltage block [VREF] Input stability Load stability Temperature stability Output current at short-circuit 3. Short-circuit 2. Under voltage detection block lockout protection [SCP] circuit block [UVLO] Threshold voltage Hysteresis width Reset voltage Threshold voltage Input source current VREF2 VREF3 Line Load ∆VREF /VREF IOS VTH VH VRST VTH (VCC = VCCO = 7 V, Ta = +25 °C) Value Conditions Unit Min Typ Max VREF = 0 mA VCC = 2.5 V to 11 V VREF = 0 mA to −1 mA VCC = 2.5 V to 11 V VREF = 0 mA to −1 mA Ta = 0 °C to +85 °C VREF = 0 V VCC = ⎯ VREF = ⎯ ⎯ 1.98 2.00 2.02 V V V mV mV % mA V V V V µA 1.975 2.000 2.025 1.975 2.000 2.025 ⎯ ⎯ ⎯ ⎯ 1.7 0.05 1.5 0.65 −1.4 2* 2* 0.20* −300* 1.8 0.1 1.7 0.70 −1.0 ⎯ ⎯ ⎯ ⎯ 1.9 ⎯ 1.85 0.75 −0.6 Parameter Pin No 11 11 11 11 11 11 11 33 33 33 15 ICSCP 15 4. Triangular wave oscillator block [OSC] Oscillation frequency Frequency input stability Frequency temperature stability fOSC1 fOSC2 ∆fOSC/ fOSC ∆fOSC/ fOSC 26, 27, 30 to 33 CT = 100 pF, RT = 6.8 kΩ 26, 27, 30 to 33 26, 27, 30 to 33 CT = 100 pF, RT = 6.8 kΩ, VCC = 2.5 V to 11 V CT = 100 pF, RT = 6.8 kΩ, VCC = 2.5 V to 11 V CT = 100 pF, RT = 6.8 kΩ, Ta = 0 °C to +85 °C 0.97 0.964 ⎯ ⎯ 1.02 1.02 1.0* 1.07 MHz 1.076 MHz ⎯ ⎯ % % 26, 27, 30 to 33 1.0* 5. Softstart block [CS1 to CS4] Charge current ICS 1, 19, 20, 38 CS1 to CS4 = 0 V −1.4 −1.0 −0.6 µA * : Standard design value (Continued) 7 MB39A110 (VCC = VCCO = 7 V, Ta = +25 °C) Value Conditions Unit Min Typ Max VCC = 2.5 V to 11 V, Ta = +25 °C VCC = 2.5 V to 11 V, Ta = 0 °C to +85 °C Ta = 0 °C to +85 °C −INE1 to −INE4 = 0 V DC A V = 0 dB ⎯ ⎯ FB1 to FB4 = 0.65 V FB1 to FB4 = 0.65 V 1.217 1.230 1.243 1.215 1.230 1.245 ⎯ −120 ⎯ ⎯ 1.7 ⎯ ⎯ 150 0.3 0.85 −2.0 ⎯ 0.1* −30 100* 1.4* 1.9 40 −2 200 0.4 0.90 −0.6 −300* ⎯ ⎯ ⎯ ⎯ ⎯ 200 −1 ⎯ ⎯ 0.95 ⎯ ⎯ V V % nA dB MHz V mV mA µA V V µA mA Parameter Symbol VTH1 VTH2 ∆VTH/ VTH ΙB AV BW VOH Pin No 2, 18, 21, 37 2, 18, 21, 37 2, 18, 21, 37 2, 18, 21, 37 3, 17, 22, 36 3, 17, 22, 36 3, 17, 22, 36 3, 17, 22, 36 3, 17, 22, 36 3, 17, 22, 36 Threshold voltage Temperature stability 6. Error amplifier block [Error Amp1 to Error Amp4] Input bias current Voltage gain Frequency bandwidth Output voltage VOL Output source current Output sink current 7. PWM comparator block [PWM Comp.1 to PWM Comp.4] Threshold voltage ISOURCE ISINK VT0 VT100 IDTC 26, 27, 30 to 33 Duty cycle = 0% 26, 27, 30 to 33 Duty cycle = 100% 4, 16, 23, 35 DTC = 0.4 V Input current Output source current 8. Output block [Drive1 to Drive4] Duty ≤ 5% ISOURCE 26, 27, 30 to 33 (t = 1 / fOSC × Duty) , OUT1 to OUT4 = 0 V ISINK ROH ROL tD1 tD2 VTH Duty ≤ 5% 26, 27, 30 to 33 (t = 1 / fOSC × Duty) , OUT1 to OUT4 = 7 V 26, 27, 30 to 33 OUT1 to OUT4 = −15 mA 26, 27, 30 to 33 OUT1 to OUT4 = 15 mA 30 to 33 30 to 33 33 OUT2 OUT1 −OUT1 −OUT2 ⎯ Output sink current Output ON resistor Dead time ⎯ ⎯ ⎯ ⎯ ⎯ 0.97 300* 9 9 50* 50* 1.00 ⎯ 14 14 ⎯ ⎯ 1.03 mA Ω Ω ns ns V 9. Short-circuit detection comparator block [SCP Comp.] Threshold voltage Input bias current IB 24 −INS = 0 V −25 −20 −17 µA *: Standard design value (Continued) 8 MB39A110 (Continued) Parameter Output ON conditions Output OFF conditions Input current ICTLL Standby current Power supply current ICCS ICCSO ICC 6, 7 to 10 5 25, 34 5 Symbol VIH VIL ICTLH Pin No 6, 7 to 10 6, 7 to 10 6, 7 to 10 (VCC = VCCO = 7 V, Ta = +25 °C) Value Conditions Unit Min Typ Max CTL, CTL1 to CTL4 CTL, CTL1 to CTL4 CTL, CTL1 to CTL4 = 3 V CTL, CTL1 to CTL4 = 0 V CTL, CTL1 to CTL4 = 0 V CTL = 0 V CTL = 3 V 2 0 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 30 ⎯ 0 0 3 11 0.8 60 1 2 1 4.5 V V µA µA µA µA mA *: Standard design value 11. General 10. Control block [CTL, CHCTL] 9 MB39A110 ■ TYPICAL CHARACTERISTICS Power Supply Current vs. Power Supply Voltage 5 Reference Voltage vs. Power Supply Voltage 5 Power supply current ICC (mA) 4 3 2 1 0 0 2 4 6 8 10 12 Reference voltage VREF (V) Ta = +25 °C CTL = 3 V 4 3 2 1 0 0 2 4 6 8 Ta = +25 °C CTL = 3 V VREF= 0 mA 10 12 Power supply voltage VCC (V) Power supply voltage VCC (V) Reference Voltage vs. Ambient Temperature 2.05 2.04 VCC = 7 V CTL = 3 V VREF= 0 mA Reference voltage VREF (V) 2.03 2.02 2.01 2.00 1.99 1.98 1.97 1.96 1.95 −40 −20 0 +20 +40 +60 +80 +100 Ambient temperature Ta (°C) Reference Voltage vs. CTL terminal Voltage 5 CTL terminal Current vs. CTL terminal Voltage 200 CTL terminal current ICTL (µA) Reference voltage VREF (V) 4 3 2 1 0 0 2 4 6 8 Ta = +25 °C VCC = 7 V VREF= 0 mA CTL = 3 V 180 160 140 120 100 80 60 40 20 0 0 2 4 6 8 Ta = +25 °C VCC = 7 V 10 12 10 12 CTL terminal voltage VCTL (V) CTL terminal voltage VCTL (V) (Continued) 10 MB39A110 Triangular Wave Oscillation Frequency vs. Timing Resistor 10000 Triangular Wave Oscillation Frequency vs. Timing Capacitor 10000 Triangular wave oscillation frequency fOSC (kHz) Triangular wave oscillation frequency fOSC (kHz) Ta = +25 °C VCC = 7 V CTL = 3 V Ta = +25 °C VCC = 7 V CTL = 3 V 1000 CT = 27 pF CT = 680 pF CT = 230 pF CT = 100 pF 1000 RT = 3 kΩ 100 RT = 39 kΩ RT = 15 kΩ RT = 6.8 kΩ 100 10 1 10 100 1000 10 10 100 1000 10000 Timing resistor RT (kΩ) Timing capacitor CT (pF) Triangular Wave Upper and Lower Limit Voltage vs. Triangular Wave Oscillation Frequency 1.20 Triangular Wave Upper and Lower Limit Voltage vs. Ambient Temperature 1.20 Triangular wave upper and lower limit voltage VCT (V) 1.10 1.00 0.90 0.80 0.70 0.60 0.50 0.40 0.30 0.20 0 Upper Triangular wave upper and lower limit voltage VCT (V) Ta = +25 °C VCC = 7 V CTL = 3 V RT = 6.8 kΩ VCC = 7 V 1.10 CTL = 3 V 1.00 RT = 6.8 kΩ CT = 100 pF 0.90 0.80 0.70 0.60 0.50 0.40 0.30 0.20 −40 −20 0 +20 +40 +60 Upper Lower 400 800 1200 1600 2000 Lower Ambient temperature Ta (°C) +80 +100 Triangular wave oscillation frequency fOSC (kHz) Triangular Wave Oscillation Frequency vs. Ambient Temperature Triangular wave oscillation frequency fOSC (kHz) 1100 1080 1060 1040 1020 1000 980 960 940 920 900 −40 −20 0 +20 +40 +60 +80 +100 VCC = 7 V CTL = 3 V RT = 6.8 kΩ CT = 100 pF Ambient temperature Ta (°C) (Continued) 11 MB39A110 (Continued) Error Amplifier Gain, Phase vs. Frequency 40 30 20 10 0 −10 −20 −30 −40 1k 10 k 100 k 1M −180 10 M −90 0 φ AV Ta = +25 °C 180 VCC = 7 V 90 10 kΩ 1 µF + 2.46 V 240 kΩ Phase φ (deg) Gain AV (dB) IN 10 kΩ 2.4 kΩ 37 38 − + + 1.23 V 36 OUT 1.5 V Error Amp1 the same as other channels Frequency f (Hz) Power Dissipation vs. Ambient Temperature 2000 Power dissipation PD (mW) 1800 1680 1600 1400 1200 1000 800 600 400 200 0 −40 −20 0 +20 +40 +60 +80 +100 Ambient temperature Ta (°C) 12 MB39A110 ■ FUNCTION DESCRIPTION 1. DC/DC Converter Functions (1) Reference Voltage Block (VREF) The reference voltage circuit generates a temperature-compensated reference voltage (2.0 V Typ) from the voltage supplied from the power supply terminal (pin 5). The voltage is used as the reference voltage for the IC’s internal circuit. The reference voltage can supply a load current of up to 1 mA to an external device through the VREF terminal (pin 11). (2) Triangular-wave Oscillator Block (OSC) The triangular wave oscillator incorporates a timing capacitor and a timing resistor connected respectively to the CT terminal (pin 13) and RT terminal (pin 12) to generate triangular oscillation waveform amplitude of 0.4 V to 0.9 V. The triangular waveforms are input to the PWM comparator in the IC. (3) Error Amplifier Block (Error Amp1 to Error Amp4) The error amplifier detects the DC/DC converter output voltage and outputs PWM control signals. In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output terminal to inverted input terminal of the error amplifier, enabling stable phase compensation to the system. Also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the CS1 terminal (pin 38) to CS4 terminal (pin 20) which are the non-inverted input terminal for Error Amp. The use of Error Amp for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is independent of the output load on the DC/DC converter. (4) PWM Comparator Block (PWM Comp.1 to PWM Comp.4) The PWM comparator is a voltage-to-pulse width modulator that controls the output duty depending on the input/ output voltage. The output transistor turns on while the error amplifier output voltage and DTC voltage remain higher than the triangular wave voltage. (5) Output Block (Drive1 to Drive 4) The output block is in the totem pole type, capable of driving an external P-ch MOS FET (channel 1 and 2 main side and channel 3), and N-ch MOS FET (channel 1 and 2 synchronous rectification side and channel 4). 13 MB39A110 2. Channel Control Function The main or each channel is turned on and off depending on the voltage levels at the CTL terminal (pin 6), CS1 terminal (pin 38), CS2 terminal (pin 1), CS3 terminal (pin 19), and CS4 terminal (pin 20). Channel On/Off Setting Conditions CTL CTL1 CTL2 CTL3 CTL4 Power CH1 CH2 CH3 CH4 L H H H H H H * : Undefined Note : Note that current over stand-by current flows into VCC terminal when the CTL terminal is in “L” level and one of terminals between CTL1 and CTL4 is set to “H” level. (Refer to “■ I/O EQUIVALENT CIRCUIT”.) ⎯* L H L L L H ⎯* L L H L L H ⎯* L L L H L H ⎯* L L L L H H OFF ON ON ON ON ON ON OFF OFF ON OFF OFF OFF ON OFF OFF OFF ON OFF OFF ON OFF OFF OFF OFF ON OFF ON OFF OFF OFF OFF OFF ON ON 3. Protective Functions (1) Timer-latch short-circuit protection circuit (SCP, SCP Comp.) The short-circuit detection comparator (SCP) detects the output voltage level of each channel, and if any channel output voltage becomes the short-circuit detection voltage or less, the timer circuits are actuated to start charging the external capacitor CSCP connected to the CSCP terminal (pin 15). When the capacitor (CSCP) voltage reaches about 0.7 V, the circuit is turned off the output transistor and sets the dead time to 100 %. In addition, the short-circuit detection from external input is capable by using −INS terminal (pin 24) on shortcircuit detection comparator (SCP Comp.) . To release the actuated protection circuit, either turn the power supply off and on again or set the CTL terminal (pin 6) to the “L” level to lower the VREF terminal (pin 11) voltage to 1.5 V (Min) or less. (Refer to “■SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT”.) (2) Under voltage lockout protection circuit (UVLO) The transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned on, may cause the IC to malfunction, resulting in breakdown or degradation of the system. To prevent such malfunctions, under voltage lockout protection circuit detects a decrease in internal reference voltage with respect to the power supply voltage, turn off the output transistor, and set the dead time to 100% while holding the CSCP terminal (pin 15) at the “L” level. The circuit restores the output transistor to normal when the supply voltage reaches the threshold voltage of the undervoltage lockout protection circuit. ■ PROTECTION CIRCUIT OPERATING FUNCTION TABLE This table refers to output condition when protection circuit is operating. Operating circuit OUT1-1 OUT1-2 OUT2-1 Short-circuit protection circuit Under voltage lockout protection circuit 14 H H L L H H OUT2-2 L L OUT3 H H OUT4 L L MB39A110 ■ SETTING THE OUTPUT VOLTAGE • CH1 to CH4 VO R1 − −INEX R2 + + 1.23 V CSX Error Amp VO (V) = 1.23 R2 (R1 + R2) X: Each channel No. ■ SETTING THE TRIANGULAR OSCILLATION FREQUENCY The triangular oscillation frequency is determined by the timing resistor (RT) connected to the RT terminal (pin 12), and the timing capacitor (CT) connected to the CT terminal (pin 13). Triangular oscillation frequency : fOSC fOSC (kHz) = : 693600 CT (pF) × RT (kΩ) 15 MB39A110 ■ SETTING THE SOFT-START TIME To prevent rush currents when the IC is turned on, you can set a soft-start by connecting soft-start capacitors (CS1 to CS4) to the CS1 terminal (pin 38) to the CS4 terminal (pin 20), respectively. Setting each CTLX from “L” to “H” switches to charge the external soft-start capacitors (CS1 to CS4) connected to the CS1 to CS4 terminals at 1 µA. The error amplifier output (FB1 to FB4) is determined by comparison between the lower one of the potentials at two non-inverted input terminals (1.23 V, CS terminal voltages) and the inverted input terminal voltage (−INE1 to −INE4). The FB terminal voltage during the soft-start period (CS terminal voltage < 1.23 V) is therefore determined by comparison between the −INE terminal and CS terminal voltages. The DC/DC converter output voltage rises in proportion to the CS terminal voltage as the soft-start capacitor connected to the CS terminal is charged. The soft-start time is obtained from the following formula: Soft-start time: ts (time to output 100%) ts (s) = 1.23 × CSX (µF) : • Soft-Start Circuit VO VREF R1 −INEX 1 µA R2 L priority Error Amp − CSX + + 1.23 V CSX FBX CTLX CHCTL X: Each channel No. 16 MB39A110 ■ TREATMENT WITHOUT USING CS TERMINAL When not using the soft-start function, open the CS1 terminal (pin 38), the CS2 terminal (pin 1), the CS3 terminal (pin 19), the CS4 terminal (pin 20). • Without Setting Soft-Start Time “OPEN” 1 CS2 CS1 38 “OPEN” “OPEN” 19 CS3 CS4 20 “OPEN” 17 MB39A110 ■ SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT Each channel uses the short-circuit detection comparator (SCP) to always compare the error amplifier′s output level to the reference voltage. While DC/DC converter load conditions are stable on all channels, the short-circuit detection comparator output remains at “L” level, and the CSCP terminal (pin 15) is held at “L” level. If the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage to drop, the output of the short-circuit detection comparator on that channel goes to “H” level. This causes the external short-circuit protection capacitor CSCP connected to the CSCP terminal to be charged at 1 µA. Short-circuit detection time : tCSCP tCSCP (s) = 0.70 × CSCP (µF) : When the capacitor CSCP is charged to the threshold voltage (VTH = 0.70 V), the latch is set and the external : FET is turned off (dead time is set to 100%). At this time, the latch input is closed and the CSCP terminal (pin 15) is held at “L” level. In addition, the short-circuit detection from external input is capable by using −INS terminal (pin 24) on the short-circuit detection comparator (SCP Comp.). The short-circuit detection operation starts when −INS terminal voltage is less than threshold voltage (VTH = 1 V). : When the power supply is turn off and on again or VREF terminal (pin 11) voltage is less than 1.5 V (Min) by setting CTL terminal (pin 6) to “L” level, the latch is released. • Timer-latch short-circuit protection circuit VO FBX R1 − + 1.23 V Error Amp −INEX R2 SCP Comp. + + − 1 µA 1.1 V To each channel Drives CSCP 15 CTL VREF S R UVLO Latch X: Each channel No. 18 MB39A110 ■ TREATMENT WITHOUT USING CSCP TERMINAL When not using the timer-latch short-circuit protection circuit, connect the CSCP terminal (pin 15) to GND with the shortest distance. • Treatment without using CSCP terminal 14 15 GND CSCP 19 MB39A110 ■ SETTING THE DEAD TIME When the device is set for step-up or inverted output based on the step-up or step-up/down Zeta conversion, step-up/down Sepic conversion or flyback conversion, the FB terminal voltage may reach and exceed the triangular wave voltage due to load fluctuation. If this case happens, the output transistor is fixed to a full-ON state (ON duty = 100 %). To prevent this, set the maximum duty of the output transistor. To set it, set the voltage at the DTC terminal by applying a resistive voltage divider to the VREF voltage as shown below. When the DTC terminal voltage is higher than the triangular wave voltage, the output transistor is turned on. The maximum duty calculation formula assuming that triangular wave amplitude = 0.5 V and triangular wave lower voltage = = 0.4 V is given below. : DUTY (ON) Max = Vdt − 0.4 V × 100 (%) , Vdt = 0.5 V Rb Ra + Rb × VREF When the DTC terminal is not used, connect it directly to the VREF terminal (pin 11) as shown below (when no dead time is set). • When using DTC to set dead time Ra DTCX Rb 11 VREF Vdt X: Each channel No. • When no dead time is set DTCX 11 VREF X: Each channel No. 20 MB39A110 ■ I/O EQUIVALENT CIRCUIT 〈〈Reference voltage block〉〉 VCC 5 1.23 V + − 〈〈Control block〉〉 ESD Protection Element 〈〈Channel control block〉〉 CTL 6 67 kΩ CTLX 76 kΩ ESD Protection Element GND 14 79 kΩ 124 kΩ 11 VREF ESD Protection Element 104 kΩ GND GND 76 kΩ 〈〈Short-start block〉〉 VREF (2.0 V) 〈〈Triangular wave oscillator block (RT) 〉〉 VREF (2.0 V) 〈〈Triangular wave oscillator block (CT)〉〉 VREF (2.0 V) CSX 0.7 V + − 12 RT CT 13 GND GND GND 〈〈Error amplifier block (CH1 to CH4) 〉〉 VCC VREF (2.0 V) −INEX 〈〈Short-circuit detection block〉〉 〈〈Short-circuit detection comparator block〉〉 VCC 100 kΩ (1 V) VREF (2.0 V) CSX FBX 1.23 V GND 2 kΩ 15 CSCP VREF (2.0 V) −INS 24 GND GND 〈〈PWM comparator block〉〉 VCC 〈〈Output block P-ch (CH1 to CH3) 〉〉 〈〈Output block N-ch (CH1, CH2, CH4) 〉〉 VCCO-P 34 VCCO-N 25 FB1 to FB4 DTCX CT OUT1-X OUTX OUT2-X OUTX GNDO1 29 GND GNDO2 28 GNDO1 GNDO2 X: Each channel No. 21 MB39A110 ■ APPLICATION EXAMPLE VIN (5.5 V to 8.5 V) R24 R25 0.2 kΩ 9.1 kΩ −INE1 A 37 R26 20 kΩ CS1 38 R27 C20 1 kΩ 0.15 µF FB1 36 C19 0.1 µF 35 DTC1 R9 R10 3.3 kΩ 22 kΩ −INE2 2 B R11 15 kΩ CS2 1 R12 C10 1 kΩ 0.15 µF FB2 3 C11 0.1 µF 4 DTC2 R14 R15 3 kΩ 43 kΩ −INE3 18 C R16 15 kΩ CS3 19 R17 C16 1 kΩ 0.15 µF FB3 17 C15 0.1 µF 16 R18 R19 DTC3 12 kΩ 100 kΩ −INE4 21 D R20 10 kΩ CS4 20 R21 C17 1 kΩ 0.15 µF FB4 22 R22 C18 33 kΩ 0.1 µF 23 DTC4 R23 20 kΩ −INS Short-circuit 24 detection signal (L : at short-circuit) CSCP 15 C14 2200 pF CTL1 7 CTL2 8 CTL3 9 CTL4 10 12 13 RT R13 6.8 kΩ CT C13 100 pF VCCO-P 34 C22 0.1 µF Q1 CH1 33 OUT1-1 C1 1 µF Q2 A L1 6.8 µH D1 VCCO-N 25 C23 0.1 µF 32 OUT1-2 Stepdown VO1 (1.8 V) IO1 = 550 mA C2 2.2 µF B Q3 31 OUT2-1 C3 1 µF OUT2-2 30 C Q5 C5 1 µF L3 10 µH D3 D D4 C7 1 µF OUT4 CH4 26 GNDO1 29 GNDO2 28 Q6 T1 Q4 L2 6.8 µH D2 CH2 Stepdown VO2 (3.3 V) IO2 = 600 mA C4 2.2 µF OUT3 CH3 27 Stepdown VO3 (5.0 V) IO3 = 250 mA C6 2.2 µF Transformer VO4-1 (15 V) IO4-1 = 40 mA VO4-2 (−15 V) IO4-2 = −10 mA D5 C8 C9 2.2 µF 2.2 µF VCC 5 C21 0.1 µF 6 CTL 11 VREF C12 0.1 µF 14 GND 22 MB39A110 ■ PARTS LIST COMPONENT Q1, Q3, Q5 Q2, Q4 Q6 D1 to D3 D4, D5 L1, L2 L3 T1 C1, C3, C5, C7 C2, C4, C6, C8 C9, C11 C10, C16, C17 C11, C12, C15 C13 C14 C18, C19 C20 C21 to C23 R9 R10 R11, R16 R12, R17, R21 R13 R14 R15 R18 R19 R20 R22 R23, R26 R24 R25 R27 ITEM P-ch FET N-ch FET N-ch FET Diode Diode Inductor Inductor Transformer Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor SPECIFICATION VDS = −20 V, ID = −1.0 A VDS = 20 V, ID = 1.8 A VDS = 30 V, ID = 1.4 A VF = 0.4 V (Max) , IF = 1 A VF = 0.55 V (Max) , IF = 0.5 A 6.8 µH 10 µH ⎯ 1 µF 2.2 µF 2.2 µF 0.15 µF 0.1 µF 100 pF 2200 pF 0.1 µF 0.15 µF 0.1 µF 3.3 kΩ 22 kΩ 15 kΩ 1 kΩ 6.8 kΩ 3 kΩ 43 kΩ 12 kΩ 100 kΩ 10 kΩ 33 kΩ 20 kΩ 200 Ω 9.1 kΩ 1 kΩ 1.1 A, 47 mΩ 0.94 A, 56 mΩ ⎯ 25 V 25 V 25 V 16 V 50 V 50 V 50 V 50 V 16 V 50 V 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% VENDOR SANYO SANYO SANYO SANYO SANYO TDK TDK SUMIDA TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm PARTS No. MCH3307 MCH3405 MCH3408 SBS004 SB05-05CP RLF5018T6R8M1R1 RLF5018T100MR94 CLQ52 5388-T139 C3216JB1E105K C3216JB1E225K C3216JB1E225K C1608JB1C154M C1608JB1H104K C1608CH1H101J C1608JB1H222K C1608JB1H104K C1608JB1C154M C1608JB1H104K RR0816P-332-D RR0816P-223-D RR0816P-153-D RR0816P-102-D RR0816P-682-D RR0816P-302-D RR0816P-433-D RR0816P-123-D RR0816P-104-D RR0816P-103-D RR0816P-333-D RR0816P-203-D RR0816P-201-D RR0816P-912-D RR0816P-102-D Note : SANYO : SANYO Electric Co., Ltd. TDK : TDK Corporation SUMIDA : SUMIDA Electric Co., Ltd. ssm : SUSUMU Co., Ltd. 23 MB39A110 ■ REFERENCE DATA TOTAL Efficiency vs. Input Voltage 100 TOTAL efficiency η (%) 95 90 85 Ta = +25 °C VO1 = 1.8 V, 550 mA VO2 = 3.3 V, 600 mA VO3 = 5 V, 250 mA VO4-1 = 15 V, 40 mA VO4-2 = −15 V, −10 mA fOSC = 1 MHz setting 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 80 75 70 5.0 Input voltage VIN (V) Each CH Efficiency vs. Input Voltage 100 95 Each CH efficiency η (%) CH3 90 CH2 85 Ta = +25 °C VO1 = 1.8 V, 550 mA VO2 = 3.3 V, 600 mA VO3 = 5 V, 250 mA VO4-1 = 15 V, 40 mA VO4-2 = −15 V, −10 mA fOSC = 1 MHz setting 7.5 8.0 CH1 CH4 80 75 Note: Only concerned CH is ON. Include external SW Tr operating current. 5.5 6.0 6.5 7.0 70 5.0 8.5 9.0 Input voltage VIN (V) (Continued) 24 MB39A110 Conversion Efficiency vs. Load Current (CH1, CH2, CH3) 100 Ta = +25 °C VIN = 7.2 V Conversion efficiency η (%) 95 CH3 90 CH2 85 CH1 80 75 IO2 ≤ 120 mA: discontinuance mode 0 100 200 300 400 Note: Only concerned CH is ON. Include external SW Tr operating current. 600 700 800 900 1000 70 500 Load current IO (mA) Conversion Efficiency vs. Load Current (CH4) 100 Conversion efficiency η (%) 95 90 Notes : • Only feedback controlling output is get by using transformer channel. VO4-2: IO = −10 mA fixed • Only concerned CH is ON. Include external SW Tr operating current. Ta = +25 °C VIN = 7.2 V CH4 85 80 75 IO4−1 ≤ 30 mA: discontinuance mode 70 0 10 20 30 40 50 60 Load current lO (mA) (Continued) 25 MB39A110 Switching Wave Form OUT1-1 (V) 10 5 0 8 VD (V) 6 4 2 0 t (µs) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 OUT1-2 (V) 10 5 CH1 VIN = 7.2 V VO1 = 1.8 V IO1 = 550 mA OUT2-1 (V) 10 5 0 8 VD (V) 6 4 2 0 t (µs) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 OUT2-2 (V) 10 5 CH2 VIN = 7.2 V VO2 = 3.3 V IO2 = 600 mA OUT3 (V) 10 5 0 8 VD (V) 6 4 2 0 t (µs) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 CH3 VIN = 7.2 V VO3 = 5 V IO3 = 250 mA (Continued) 26 MB39A110 (Continued) CH4 VIN = 7.2 V VO4-1 = 15 V IO4-1 = 40 mA VO4-2 = −15 V IO4-1 = −10 mA OUT4 (V) 10 5 0 8 VD (V) 6 4 2 0 t (µs) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 27 MB39A110 ■ USAGE PRECAUTIONS • Printed circuit board ground lines should be set up with consideration for common impedance. • Take appropriate static electricity measures. • Containers for semiconductor materials should have anti-static protection or be made of conductive material. • After mounting, printed circuit boards should be stored and shipped in conductive bags or containers. • Work platforms, tools, and instruments should be properly grounded. • Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground. • Do not apply negative voltages. • The use of negative voltages below −0.3 V may create parasitic transistors on LSI lines, which can cause malfunction. ■ ORDERING INFORMATION Part number MB39A110PFT-❏❏❏E1 Package 38-pin plastic TSSOP (FPT-38P-M03) Remarks Lead Free version ■ EV BOARD ORDERING INFORMATION EV board part No. MB39A110EVB EV board version No. Board Rev. 1.0 Remarks TSSOP-38P ■ RoHS COMPLIANCE INFORMATION OF LEAD (Pb) FREE VERSION The LSI products of Fujitsu with “E1” are compliant with RoHS Directive , and has observed the standard of lead, cadmium, mercury, Hexavalent chromium, polybrominated biphenyls (PBB) , and polybrominated diphenyl ethers (PBDE) . The product that conforms to this standard is added “E1” at the end of the part number. ■ MARKING FORMAT (LEAD FREE VERSION) MB39A110 XXXX XXX E1 INDEX Lead Free version 28 MB39A110 ■ LABELING SAMPLE (LEAD FREE VERSION) lead-free mark JEITA logo JEDEC logo MB123456P - 789 - GE1 (3N) 1MB123456P-789-GE1 1000 G Pb (3N)2 1561190005 107210 QC PASS PCS 1,000 MB123456P - 789 - GE1 2006/03/01 ASSEMBLED IN JAPAN 1/1 MB123456P - 789 - GE1 0605 - Z01A 1000 1561190005 Lead Free version 29 MB39A110 ■ MB39A110PFT-❏❏❏E1 RECOMMENDED CONDITIONS OF MOISTURE SENSITIVITY LEVEL Item Mounting Method Mounting times Before opening Storage period From opening to the 2nd reflow When the storage period after opening was exceeded Storage conditions Condition IR (infrared reflow) , Manual soldering (partial heating method) 2 times Please use it within two years after Manufacture. Less than 8 days Please processes within 8 days after baking (125 °C, 24H) 5 °C to 30 °C, 70%RH or less (the lowest possible humidity) [Temperature Profile for FJ Standard IR Reflow] (1) IR (infrared reflow) H rank : 260 °C Max 260 °C 255 °C 170 °C to 190 °C RT (b) (c) (d) (e) (a) (d') (a) Temperature Increase gradient (b) Preliminary heating (c) Temperature Increase gradient (d) Actual heating (d’) (e) Cooling : Average 1 °C/s to 4 °C/s : Temperature 170 °C to 190 °C, 60 s to 180 s : Average 1 °C/s to 4 °C/s : Temperature 260 °C Max; 255 °C or more, 10 s or less : Temperature 230 °C or more, 40 s or less or Temperature 225 °C or more, 60 s or less or Temperature 220 °C or more, 80 s or less : Natural cooling or forced cooling Note : Temperature : the top of the package body (2) Manual soldering (partial heating method) Conditions : Temperature 400 °C Max Times : 5 s max/pin 30 MB39A110 ■ PACKAGE DIMENSION 38-pin plastic TSSOP Lead pitch Package width × package length Lead shape Sealing method Mounting height 0.50 mm 4.40 × 9.70 mm Gullwing Plastic mold 1.10 mm MAX (FPT-38P-M03) 38-pin plastic TSSOP (FPT-38P-M03) 9.70±0.10(.382±.004) 1.10(.043) MAX 0~8˚ 0.60±0.10 (.024±.004) 0.25(.010) INDEX 4.40±0.10 6.40±0.10 (.173±.004) (.252±.004) 0.10±0.10 (.004±.004) 0.50(.020) 0.90±0.05 (.035±.002) 0.127±0.05 (.005±.002) 0.10(.004) 9.00(.354) C 2002 FUJITSU LIMITED F38003Sc-1-1 Dimensions in mm (inches). Note: The values in parentheses are reference values. 31 MB39A110 FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party’s intellectual property right or other right by using such information. Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. Edited Business Promotion Dept. F0608