MB85R1002A_1107

FUJITSU SEMICONDUCTOR DATA SHEET DS501-00004-1v0-E Memory FRAM 1 M Bit (64 K × 16) MB85R1002A ■ DESCRIPTIONS The MB85R1002A is an FRAM (Ferroelectric Random Access Memory) chip consisting of 65,536 words × 16 bits of nonvolatile memory cells fabricated using ferroelectric process and silicon gate CMOS process technologies. The MB85R1002A is able to retain data without using a back-up battery, as is needed for SRAM. The memory cells used in the MB85R1002A can be used for 1010 read/write operations, which is a significant improvement over the number of read and write operations supported by Flash memory and E2PROM. The MB85R1002A uses a pseudo-SRAM interface that is compatible with conventional asynchronous SRAM. ■ FEATURES • • • • • • • Bit configuration Read/write endurance Operating power supply voltage Operating temperature range Data retention LB and UB data byte control Package : 65,536 words × 16 bits : 1010 times : 3.0 V to 3.6 V : − 40 °C to + 85 °C : 10 years ( + 55 °C) : 48-pin plastic TSOP (1) Copyright©2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2011.7 MB85R1002A ■ PIN ASSIGNMENTS (TOP VIEW) A15 A14 A13 A12 A11 A10 A9 A8 NC NC WE CE2 VSS UB LB VDD NC A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 NC NC VSS I/O16 I/O8 I/O15 I/O7 I/O14 I/O6 I/O13 I/O5 VDD I/O12 I/O4 I/O11 I/O3 I/O10 I/O2 I/O9 I/O1 OE VSS CE1 A0 (FPT-48P-M48) ■ PIN DESCRIPTIONS Pin Number 1 to 8, 18 to 25 29 to 36, 38 to 45 26 12 11 28 14, 15 16, 37 13, 27, 46 9, 10, 17, 47, 48 Pin Name A0 to A15 I/O1 to I/O16 CE1 CE2 WE OE LB, UB VDD VSS NC Functional Description Address Input pins Data Input/Output pins Chip Enable 1 Input pin Chip Enable 2 Input pin Write Enable Input pin Output Enable Input pin Data Byte Control Input pins Supply Voltage pins Connect all two pins to the power supply. Ground pins Connect all three pins to ground. No Connect pins 2 DS501-00004-1v0-E MB85R1002A ■ BLOCK DIAGRAM Address Latch Row Decoder A0 FRAM Array 65,536 × 16 A15 Column Decoder S/A intWE intOE CE2 CE1 WE OE LB UB I/O1 to I/O8 I/O9 to I/O16 I/O16 I/O9 I/O8 I/O1 DS501-00004-1v0-E 3 MB85R1002A ■ FUNCTIONAL TRUTH TABLE Mode CE1 CE2 WE OE LB UB I/O1 to I/O8 I/O9 to I/O16 Supply Current H Standby Precharge X X X X L X X H X X H X H X X H X L X X X H L L H L X X X H L H L L H L L H L L H L L H L L H L Data Output Data Output Hi-Z Data Output Data Output Hi-Z Data Output Data Output Hi-Z Data Input Data Input Hi-Z Data Input Data Input Hi-Z Data Input Data Input Hi-Z Data Output Hi-Z Data Output Data Output Hi-Z Data Output Data Output Hi-Z Data Output Data Input Hi-Z Data Input Data Input Hi-Z Data Input Data Input Hi-Z Data Input Operation (ICC) Hi-Z Hi-Z Standby (ISB) Read L H L L H L Read (Pseudo-SRAM, OE control*1) L H H L H L H Write L L H L H L L H L H L Write (Pseudo-SRAM, WE control*2) L H H L H Note: L = VIL, H = VIH, X can be either VIL or VIH, Hi-Z = High Impedance : Latch address and latch data at falling edge, : Latch address and latch data at rising edge *1 : OE control of the Pseudo-SRAM means the valid address at the falling edge of OE to read. *2 : WE control of the Pseudo-SRAM means the valid address and data at the falling edge of WE to write. 4 DS501-00004-1v0-E MB85R1002A ■ ABSOLUTE MAXIMUM RATINGS Parameter Power Supply Voltage* Input Pin Voltage* Output Pin Voltage* Operating Temperature Storage Temperature * : All voltages are referenced to VSS = 0 V. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. Symbol VCC VIN VOUT TA TSTG Rating Min −0.5 −0.5 −0.5 −40 −40 Max +4.0 VCC + 0.5 ( ≤ 4.0) VCC + 0.5 ( ≤ 4.0) +85 +125 Unit V V V o o C C ■ RECOMMENDED OPERATING CONDITIONS Parameter Power Supply Voltage* High Level Input Voltage* Low Level Input Voltage* Operating Temperature Symbol VCC VIH VIL TA Value Min 3.0 VCC × 0.8 −0.5 − 40 Typ 3.3 ⎯ ⎯ ⎯ Max 3.6 VCC + 0.5 ( ≤ 4.0) +0.6 +85 Unit V V V o C * : All voltages are referenced to VSS = 0 V. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. DS501-00004-1v0-E 5 MB85R1002A ■ ELECTRICAL CHARACTERISTICS 1. DC Characteristics Parameter Input Leakage Current Output Leakage Current Operating Power Supply Current Symbol |ILI| |ILO| Condition VIN = 0 V to VCC VOUT = 0 V to VCC, CE1 = VIH or OE = VIH CE1 = 0.2 V, CE2 = VCC − 0.2 V, Iout = 0 mA*1 CE1 ≥ VCC − 0.2 V CE2 ≤ 0.2 V*2 Standby Current ISB OE ≥ VCC − 0.2 V, WE ≥ VCC − 0.2 V*2 LB ≥ VCC − 0.2 V, UB ≥ VCC − 0.2 V*2 High Level Output Voltage Low Level Output Voltage VOH VOL IOH = − 1.0 mA IOL = 2.0 mA VCC × 0.8 ⎯ ⎯ ⎯ ⎯ 0.4 V V ⎯ 10 50 μA (within recommended operating conditions) Value Unit Min Typ Max ⎯ ⎯ ⎯ ⎯ ⎯ 10 10 10 μA μA mA ICC 15 *1 : During the measurement of ICC , the Address, Data In were taken to only change once per active cycle. Iout : output current *2 : All pins other than setting pins should be input at the CMOS level voltages such as H ≥ VCC − 0.2 V, L ≤ 0.2 V. 6 DS501-00004-1v0-E MB85R1002A 2. AC Characteristics • AC Test Conditions Supply Voltage Operating Temperature Input Voltage Amplitude Input Rising Time Input Falling Time Input Evaluation Level Output Evaluation Level Output Impedance (1) Read Cycle Parameter Read Cycle time CE1 Active Time CE2 Active Time OE Active Time LB, UB Active Time Precharge Time Address Setup Time Address Hold Time OE Setup Time LB, UB Setup Time Output Data Hold time Output Set Time CE1 Access Time CE2 Access Time OE Access Time Output Floating Time Symbol tRC tCA1 tCA2 tRP tBP tPC tAS tAH tES tBS tOH tLZ tCE1 tCE2 tOE tOHZ : 3.0 V to 3.6 V : −40 oC to +85 oC : 0.3 V to 2.7 V : 5 ns : 5 ns : 2.0 V / 0.8 V : 2.0 V / 0.8 V : 50 pF (within recommended operating conditions) Value Min 150 120 120 120 120 20 0 50 0 5 0 30 ⎯ ⎯ ⎯ ⎯ Max ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 100 100 100 20 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns DS501-00004-1v0-E 7 MB85R1002A (2) Write Cycle (within recommended operating conditions) Parameter Write Cycle Time CE1 Active Time CE2 Active Time LB, UB Active Time Precharge Time Address Setup Time Address Hold Time LB, UB Setup Time Write Pulse Width Data Setup Time Data Hold Time Write Setup Time Symbol tWC tCA1 tCA2 tBP tPC tAS tAH tBS tWP tDS tDH tWS Value Min 150 120 120 120 20 0 50 5 120 0 50 0 Max ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Unit ns ns ns ns ns ns ns ns ns ns ns ns 3. Pin Capacitance Parameter Input Capacitance Output Capacitance Symbol CIN COUT Condition VIN = VOUT = 0 V, f = 1 MHz, TA = + 25 oC Value Min ⎯ ⎯ Typ ⎯ ⎯ Max 10 10 Unit pF pF 8 DS501-00004-1v0-E MB85R1002A ■ TIMING DIAGRAMS 1. Read Cycle Timing (CE1, CE2 Control) tRC tCA1 CE1 tPC CE2 tBS LB, UB tAS A0 to A15 Valid tES OE tCE1, tCE2 I/O1 to I/O16 tLZ tAH tCA2 tBP H or L tRP tOHZ Hi-Z Invalid tOH Valid Invalid 2. Read Cycle Timing (OE Control) tCA1 CE1 CE2 tBS LB, UB tAS A0 to A15 Valid tAH tCA2 tBP H or L tRC OE tRP tPC tOE tLZ I/O1 to I/O16 Invalid tOH Valid tOHZ Hi-Z Invalid DS501-00004-1v0-E 9 MB85R1002A 3. Write Cycle Timing (CE1, CE2 Control) tWC CE1 tCA1 tPC CE2 tBS LB, UB tAS A0 to A15 Valid tAH tCA2 tBP H or L tWS WE tWP tDS tDH Hi-Z Data In Valid H or L 4. Write Cycle Timing (WE Control) tCA1 CE1 CE2 tBS LB, UB tAS A0 to A15 Valid tAH tCA2 tBP H or L tWC tWP tPC WE tDS tDH Hi-Z Data In Valid H or L 10 DS501-00004-1v0-E MB85R1002A ■ POWER ON/OFF SEQUENCE tPD tR tPU VCC CE2 3.0 V VIH (Min) VCC CE2 3.0 V VIH (Min) 1.0 V 1.0 V VIL (Max) VIL (Max) 0V CE2 ≤ 0.2 V 0V CE1 > VCC × 0.8* CE1 : Don't Care CE1 > VCC × 0.8* CE1 CE1 * : CE1 (Max) < VCC + 0.5 V Notes: • Use either of CE1 or CE2, or both for disable control of the device. • Because turning the power on from an intermediate level may cause malfunctions, when the power is turned on, VCC is required to be started from 0 V. • If the device does not operate within the specified conditions of read cycle, write cycle, power on/off sequence, memory data can not be guaranteed. • When turning the power on or off, it is recommended that CE2 is connected to ground to prevent unexpected writing. (within recommended operating conditions) Parameter CE1 LEVEL hold time for Power OFF CE1 LEVEL hold time for Power ON Power supply rising time Symbol tPD tPU tR Value Min 85 85 0.05 Typ ⎯ ⎯ ⎯ Max ⎯ ⎯ 200 Unit ns ns ms ■ NOTES ON USE After the IR reflow completed, it is not guaranteed to hold the data written prior to the IR reflow. DS501-00004-1v0-E 11 MB85R1002A ■ ORDERING INFOMATION Part number MB85R1002ANC-GE1 Package 48-pin plastic TSOP(1) (FPT-48P-M48) 12 DS501-00004-1v0-E MB85R1002A ■ PACKAGE DIMENSIONS 48-pin plastic TSOP Lead pitch Package width × package length Lead shape Sealing method Mounting height Weight 0.50 mm 12.00 mm × 12.40 mm Gullwing Plastic mold 1.20 mm MAX 0.36 g (FPT-48P-M48) 48-pin plastic TSOP (FPT-48P-M48) Note 1) # : Resin protrusion. (Each side : +0.15 (.006) Max). Note 2) * : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. 0.10±0.05 (.004±.002) (STAND OFF) 1 48 INDEX 0.50(.020) #12.00±0.10 (.472±.004) 0.22 –0.04 (.009 +.002 ) –.002 +0.05 0.10(.004) M 24 25 1.13±0.07 (.044±.003) (MOUNTING HEIGHT) 14.00±0.20(.551±.008) *12.40±0.10(.488±.004) Details of A part 0.25(.010) 0.145 –0.03 (.006 +.002 ) –.001 +0.05 0.08(.003) A 0.60±0.15 (.024±.006) 0~8 C 2010 FUJITSU SEMICONDUCTOR LIMITED F48048Sc-1-1 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ DS501-00004-1v0-E 13 MB85R1002A MEMO 14 DS501-00004-1v0-E MB85R1002A MEMO DS501-00004-1v0-E 15 MB85R1002A FUJITSU SEMICONDUCTOR LIMITED Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome, Kohoku-ku Yokohama Kanagawa 222-0033, Japan Tel: +81-45-415-5858 http://jp.fujitsu.com/fsl/en/ For further information please contact: North and South America FUJITSU SEMICONDUCTOR AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. 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