MB88152A-101

FUJITSU SEMICONDUCTOR DATA SHEET DS04-29125-2E Spread Spectrum Clock Generator MB88152A MB88152A-100/101/102/110/111/112 ■ DESCRIPTION MB88152A is a clock generator for EMI (Electro Magnetic Interference) reduction. The peak of unnecessary radiation noise (EMI) can be attenuated by making the oscillation frequency slightly modulate periodically with the internal modulator. It corresponds to both of the center spread which modulates input frequency as Middle Centered and down spread which modulates so as not to exceed input frequency. ■ FEATURES • • • • • • • • • • Input frequency : 16.6 MHz to 134 MHz Output frequency : 16.6 MHz to 134 MHz Modulation rate : ± 0.5%, ± 1.5% (Center spread), − 1.0%, − 3.0% (Down spread) Equipped with oscillation circuit: Range of oscillation 16.6 MHz to 48 MHz Modulation clock output Duty : 40% to 60% Modulation clock Cycle-Cycle Jitter : Less than 100 ps Low current consumption by CMOS process : 5.0 mA (24 MHz : Typ-sample, no load) Power supply voltage : 3.3 V ± 0.3 V Operating temperature : − 40 °C to +85 °C Package : SOP 8-pin Copyright©2006-2007 FUJITSU LIMITED All rights reserved MB88152A ■ PRODUCT LINE-UP MB88152A has three kinds of input frequency, and two kinds of modulation type (center/down spread), total six lineups. Product Input/Output Frequency Modulation type Modulation enable pin MB88152A-100 MB88152A-101 MB88152A-102 MB88152A-110 MB88152A-111 MB88152A-112 16.6 MHz to 134 MHz 16.6 MHz to 67 MHz 40 MHz to 134 MHz 16.6 MHz to 134 MHz 16.6 MHz to 67 MHz 40 MHz to 134 MHz Center spread Down spread No Yes No Yes ■ PIN ASSIGNMENT TOP VIEW XIN 1 8 XENS XIN 1 XOUT 2 MB88152A-100 VSS 8 FREQ1 7 FREQ0 6 VDD 5 CKOUT MB88152A-101 XOUT 2 MB88152A-102 7 FREQ MB88152A-111 VSS 3 6 VDD MB88152A-112 SEL 4 5 CKOUT MB88152A-110 3 SEL 4 FPT-8P-M02 FPT-8P-M02 ■ PIN DESCRIPTION Pin name XIN XOUT VSS SEL CKOUT VDD FREQ/FREQ0 XENS/FREQ1 I/O I O ⎯ I O ⎯ I I Pin no. 1 2 3 4 5 6 7 8 Description Crystal resonator connection pin/clock input pin Crystal resonator connection pin GND pin Modulation rate setting pin Modulated clock output pin Power supply voltage pin Frequency setting pin Modulation enable setting pin/frequency setting pin 2 MB88152A ■ I/O CIRCUIT TYPE Pin Circuit type Remarks CMOS hysteresis input SEL FREQ FREQ0 FREQ1 XENS • CMOS output • IOL = 4 mA CKOUT Note : For XIN and XOUT pins, refer to “■OSCILLATION CIRCUIT”. 3 MB88152A ■ HANDLING DEVICES Preventing Latch-up A latch-up can occur if, on this device, (a) a voltage higher than VDD or a voltage lower than VSS is applied to an input or output pin or (b) a voltage higher than the rating is applied between VDD and VSS pins. The latch-up, if it occurs, significantly increases the power supply current and may cause thermal destruction of an element. When you use this device, be very careful not to exceed the maximum rating. Handling unused pins Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or pull-down resistor. Unused output pin should be opened. The attention when the external clock is used Input the clock to XIN pin, and XOUT pin should be opened when you use the external clock. Please pay attention so that an overshoot and an undershoot do not occur to an input clock of XIN pin. Power supply pins Please design connecting the power supply pin of this device by as low impedance as possible from the current supply source. We recommend connecting electrolytic capacitor (about 10 µF) and the ceramic capacitor (about 0.01 µF) in parallel between VSS and VDD pins near the device, as a bypass capacitor. Oscillation Circuit Noise near the XIN and XOUT pins may cause the device to malfunction. Design printed circuit boards so that electric wiring of XIN or XOUT pin and resonator (or ceramic oscillator) do not intersect other wiring. Design the printed circuit board that surrounds the XIN and XOUT pins with ground. 4 MB88152A ■ BLOCK DIAGRAM VDD SEL Modulation rate setting Frequency setting FREQ/FREQ0 XENS/FREQ1 Modulation enable / Frequency setting PLL block Clock output CKOUT XOUT Reference clock XIN Rf = 1 MΩ VSS 1 − M Phase compare Charge pump V/I conversion IDAC ICO Reference clock 1 − N Loop filter Modulation clock output 1 − L Modulation logic MB88152A PLL block Modulation rate setting/ Modulation enable setting A glitchless IDAC (current output D/A converter) provides precise modulation, thereby dramatically reducing EMI. 5 MB88152A ■ PIN SETTING When changing the pin setting, the stabilization wait time for the modulation clock is required. The stabilization wait time for the modulation clock takes the maximum value of Lock-Up time in “■ ELECTRICAL CHARACTERISTICS • AC characteristics Lock-Up time”. Modulation enable setting XENS L H Modulation No modulation Modulation MB88152A-101, MB88152A-102, MB88152A-111, MB88152A-112 Note : MB88152A-100 and MB88152A-110 do not have XENS pin. SEL modulation rate setting SEL ± 0.5% L − 1.0% Modulation rate MB88152A-110, MB88152A-111, MB88152A-112 MB88152A-100, MB88152A-101, MB88152A-102 MB88152A-110, MB88152A-111, MB88152A-112 MB88152A-100, MB88152A-101, MB88152A-102 Remarks Center spread Down spread ± 1.5% H − 3.0% Center spread Down spread Note : The modulation rate can be changed at the level of the terminal. Frequency setting FREQ L H 16.6 MHz to 40 MHz 40 MHz to 80 MHz 33 MHz to 67 MHz 66 MHz to 134 MHz Frequency MB88152A-101, MB88152A-111 MB88152A-102, MB88152A-112 MB88152A-101, MB88152A-111 MB88152A-102, MB88152A-112 Note : MB88152A-100 and MB88152A-110 do not have FREQ pin. Frequency setting FREQ1 L L H H FREQ0 L H L H 16.6 MHz to 40 MHz 33 MHz to 67 MHz 40 MHz to 80 MHz 66 MHz to 134 MHz MB88152A-100, MB88152A-110 Frequency Note : MB88152A-101, MB88152A-111, MB88152A-102 and MB88152A-112 have neither FREQ0 pin nor FREQ1 pin. 6 MB88152A • Center spread Spectrum is spread (modulated) by centering on the input frequency. 3.0% modulation width Radiation level −1.5% +1.5% Frequency Input frequency Center spread example of ± 1.5% Modulation rate • Down spread Spectrum is spread (modulated) below the input frequency. 3.0% modulation width Radiation level −3.0% Frequency Input frequency Down spread example of − 3.0% Modulation rate 7 MB88152A ■ ABSOLUTE MAXIMUM RATINGS Parameter Power supply voltage* Input voltage* Output voltage* Storage temperature Operation junction temperature Output current Overshoot Undershoot Symbol VDD VI VO TST TJ IO VIOVER VIUNDER Rating Min − 0.5 VSS − 0.5 VSS − 0.5 − 55 − 40 − 14 ⎯ VSS − 1.0 (tUNDER ≤ 50 ns) Max + 4.0 VDD + 0.5 VDD + 0.5 + 125 + 125 + 14 VDD + 1.0 (tOVER ≤ 50 ns) ⎯ Unit V V V °C °C mA V V * : The parameter is based on VSS = 0.0 V. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. Overshoot/Undershoot tUNDER ≤ 50 ns VIOVER ≤ VDD + 1.0 V VDD Input pin VSS tOVER ≤ 50 ns VIUNDER ≤ VSS − 1.0 V 8 MB88152A ■ RECOMMENDED OPERATING CONDITIONS (VSS = 0.0 V) Parameter Power supply voltage Symbol VDD Pin VDD SEL, FREQ/FREQ0, XENS/FREQ1 “H” level input voltage VIH XIN Conditions ⎯ ⎯ Input through rate 3 V / ns 16.6 MHz to 100 MHz Input through rate 3 V / ns 100 MHz to 134 MHz ⎯ Input through rate 3 V / ns 16.6 MHz to 100 MHz Input through rate 3 V / ns 100 MHz to 134 MHz 16.6 MHz to 100 MHz 100 MHz to 134 MHz ⎯ Value Min 3.0 VDD × 0.8 Typ 3.3 ⎯ Max 3.6 VDD + 0.3 Unit V V VDD × 0.8 ⎯ VDD + 0.3 V VDD × 0.9 ⎯ VDD + 0.3 V SEL, FREQ/FREQ0, XENS/FREQ1 “L” level input voltage VIL XIN VSS ⎯ VDD × 0.2 V VSS ⎯ VDD × 0.2 V VSS 40 45 −40 ⎯ 50 50 ⎯ VDD × 0.1 60 55 + 85 V Input clock duty cycle Operating temperature tDCI Ta XIN ⎯ % °C WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. Input clock duty cycle (tDCI = tb/ta) ta tb XIN 1.5 V 9 MB88152A ■ ELECTRICAL CHARACTERISTICS • DC Characteristics (Ta = −40 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V) Parameter Power supply current Symbol ICC VOH Output voltage VOL Output impedance ZO CKOUT XIN, SEL, FREQ/ FREQ0, XENS/ FREQ1 CKOUT CKOUT Pin VDD Conditions 24 MHz output No load capacitance “H” level output IOH = − 4 mA “L” level output IOL = 4 mA 16.6 MHz to 134 MHz Ta = + 25 °C VDD = VI = 0.0 V f = 1 MHz 16.6 MHz to 67 MHz Load capacitance CL 67 MHz to 100 MHz 100 MHz to 134 MHz Value Min ⎯ VDD − 0.5 VSS ⎯ Typ 5.0 ⎯ ⎯ 45 Max 7.0 VDD 0.4 ⎯ Unit mA V V Ω Input capacitance CIN ⎯ ⎯ 16 pF ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ 15 10 7 pF 10 MB88152A • AC Characteristics (Ta = −40 °C to + 85 °C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V) Parameter Oscillation frequency Symbol fx Pin XIN, XOUT Conditions Fundamental oscillation 3rd over tone MB88152A-100/110 Input frequency fin XIN MB88152A-101/111 MB88152A-102/112 MB88152A-100/110 Output frequency fOUT CKOUT MB88152A-101/111 MB88152A-102/112 Output slew rate Output clock duty cycle SR tDCC CKOUT CKOUT 0.4 V to 2.4 V Load capacitance 15 pF 1.5 V MB88152A-100/110 FRRQ[1 : 0] = (00) MB88152A-100/110 FRRQ[1 : 0] = (01) MB88152A-100/110 FRRQ[1 : 0] = (10) Modulation frequency (Number of input clocks per modulation) fMOD (nMOD) MB88152A-100/110 FRRQ[1 : 0] = (11) MB88152A-101/111 FRRQ = 0 MB88152A-101/111 FRRQ = 1 MB88152A-102/112 FRRQ = 0 MB88152A-102/112 FRRQ = 1 Lock-Up time tLK CKOUT 16.6 MHz to 80 MHz 80 MHz to 134 MHz No load capacitance, Ta = + 25 °C, VDD = 3.3 V Value Min 16.6 40 16.6 16.6 40 16.6 16.6 40 0.4 40 fin/2640 (2640) fin/4400 (4400) fin/5280 (5280) fin/8800 (8800) fin/2640 (2640) fin/4400 (4400) fin/5280 (5280) fin/8800 (8800) ⎯ ⎯ ⎯ Typ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ fin/2280 (2280) fin/3800 (3800) fin/4560 (4560) fin/7600 (7600) fin/2280 (2280) fin/3800 (3800) fin/4560 (4560) fin/7600 (7600) 2 3 ⎯ Max 40 48 134 67 134 134 67 134 4.0 60 fin/1920 (1920) fin/3200 (3200) fin/3840 (3840) kHz (clks) fin/1920 (1920) fin/3200 (3200) fin/3840 (3840) fin/6400 (6400) 5 8 100 ms psrms fin/6400 (6400) V/ns % MHz MHz Unit MHz CKOUT Cycle-cycle jitter tJC CKOUT 11 MB88152A f (Output frequency) Modulation wave form t fMOD (Min) fMOD (Max) Clock count nMOD (Max) Clock count nMOD (Min) t MB88152A contains the modulation period to realize the efficient EMI reduction. The modulation period fMOD depends on the input frequency and changes between fMOD (Min) and fMOD (Max) . Furthermore, the average value of fMOD equals the typical value of the electrical characteristics. 12 MB88152A ■ OUTPUT CLOCK DUTY CYCLE (tDCC = tb/ta) ta tb 1.5 V CKOUT ■ INPUT FREQUENCY (fin = 1/tin) tin 0.8 VDD XIN ■ OUTPUT SLEW RATE (SR) 2.4 V CKOUT tr 0.4 V tf Note : SR = (2.4−0.4) /tr, SR = (2.4−0.4) /tf ■ CYCLE-CYCLE JITTER (tJC = | tn − tn + 1 |) CKOUT tn tn+1 Note : Cycle-cycle jitter is defined the difference between a certain cycle and immediately after (or, immediately before) . 13 MB88152A ■ MODULATION WAVEFORM • ±1.5% modulation rate, Example of center spread CKOUT output frequency + 1.5 % Frequency at modulation OFF Time − 1.5 % fMOD • −1.0% modulation rate, Example of down spread CKOUT output frequency Frequency at modulation OFF Time − 0.5 % − 1.0 % fMOD 14 MB88152A ■ LOCK-UP TIME VDD 3.0 V Internal clock stabilization wait time XIN Setting pin SEL FREQ1/XENS FREQ0/FREQ CKOUT VIH tLK (lock-up time ) If the setting pin is fixed at the “H” or “L” level, the maximum time after the power is turned on until the set clock signal is output from CKOUT pin is (the stabilization wait time of input clock to XIN pin) + (the lock-up time “tLK”). For the input clock stabilization time, check the characteristics of the resonator or oscillator used. XIN VIH XENS CKOUT tLK (lock-up time ) VIL tLK (lock-up time ) For modulation enable control using the XENS pin during normal operation, the set clock signal is output from CKOUT pin at most the lock-up time (tLK) after the level at the XENS pin is determined. Note : When the pin setting is changed, the CKOUT pin output clock stabilization time is required. Until the output clock signal becomes stable, the output frequency, output clock duty cycle, modulation period, and cyclecycle jitter cannot be guaranteed. It is therefore advisable to perform processing such as cancelling a reset of the device at the succeeding stage after the lock-up time. 15 MB88152A ■ OSCILLATION CIRCUIT The left side of figures below shows the connection example about general resonator. The oscillation circuit has the built-in feedback resistance (1 MΩ). The value of capacity (C1 and C2) is required adjusting to the most suitable value of an individual resonator. The right side of figures below shows the example of connecting for the 3rd over-tone resonator. The value of capacity (C1, C2 and C3) and inductance (L1) is needed adjusting to the most suitable value of an individual resonator. The most suitable value is different by individual resonator. Please refer to the resonator manufacturer which you use for the most suitable value. When an external clock is used (the resonator is not used), input the clock to XIN pin and do not connect anything with XOUT pin. • When using the resonator MB88152A Internal Rf (1 MΩ) XIN Pin XOUT Pin XIN Pin Rf (1 MΩ) XOUT Pin MB88152A External L1 C1 C2 C1 C2 C3 Fundamental resonator 3rd over tone resonator • When using an external clock MB88152A LSI Internal Rf (1 MΩ) XIN Pin XOUT Pin MB88152A LSI External External clock OPEN Note : Note that a jitter characteristic of an input clock may cause an affect a cycle-cycle jitter characteristic. 16 MB88152A ■ INTERCONNECTION CIRCUIT EXAMPLE XENS/FREQ1 1 2 MB88152A 3 C1 C2 4 6 5 C4 + C3 R1 8 7 FREQ/FREQ0 SEL C1, C2 : Oscillation stabilization capacitance (refer to "■ OSCILLATION CIRCUIT”.) C3 : Capacitor of 10 µF or higher C4 : Capacitor about 0.01 µF (connect a capacitor of good high frequency property (ex. laminated ceramic capacitor) to close to this device.) R1 : Impedance matching resistor for board pattern 17 MB88152A ■ EXAMPLE CHARACTERISTICS The condition of the examples of the characteristics is shown as follows : Input frequency = 20 MHz (Output frequency = 20 MHz : Use for MB88152A-111) Power-supply voltage = 3.3 V, None load capacity, Modulation rate = ±1.5% (center spread) . Spectrum analyzer HP4396B is connected with CKOUT. The result of the measurement with, RBW = 1 kHz (ATT use for −6 dB) . CH B Spectrum 10 dB /REF 0 dBm No modulation −7.44 dBm Avg 4 ±1.5% modulation −25.75 dBm RBW# 1 kHZ VBW 1 kHZ CENTER 20 MHZ ATT 6 dB SWP 2.505 s SPAN 4 MHZ 18 MB88152A ■ ORDERING INFORMATION Part number MB88152APNF-G-100-JNE1 MB88152APNF-G-101-JNE1 MB88152APNF-G-102-JNE1 MB88152APNF-G-110-JNE1 MB88152APNF-G-111-JNE1 MB88152APNF-G-112-JNE1 MB88152APNF-G-101-JNEFE1 MB88152APNF-G-102-JNEFE1 MB88152APNF-G-111-JNEFE1 MB88152APNF-G-112-JNEFE1 MB88152APNF-G-101-JNERE1 MB88152APNF-G-102-JNERE1 MB88152APNF-G-111-JNERE1 MB88152APNF-G-112-JNERE1 Input/Output Frequency Modulation type Modulation enable pin No Yes Yes No Yes Yes No Yes Yes No Yes Yes No Yes Yes No Yes Yes 8-pin plastic Emboss SOP taping (FPT-8P-M02) (ER type) 8-pin plastic SOP (FPT-8P-M02) Emboss taping (EF type) 8-pin plastic SOP (FPT-8P-M02) Package Remarks 16.6 MHz to 134 MHz Down spread 16.6 MHz to 67 MHz Down spread 40 MHz to 134 MHz Down spread 16.6 MHz to 134 MHz Center spread 16.6 MHz to 67 MHz Center spread 40 MHz to 134 MHz Center spread 16.6 MHz to 67 MHz Down spread 40 MHz to 134 MHz Down spread MB88152APNF-G-100-JNEFE1 16.6 MHz to 134 MHz Down spread MB88152APNF-G-110-JNEFE1 16.6 MHz to 134 MHz Center spread 16.6 MHz to 67 MHz Center spread 40 MHz to 134 MHz Center spread 16.6 MHz to 67 MHz Down spread 40 MHz to 134 MHz Down spread MB88152APNF-G-100-JNERE1 16.6 MHz to 134 MHz Down spread MB88152APNF-G-110-JNERE1 16.6 MHz to 134 MHz Center spread 16.6 MHz to 67 MHz Center spread 40 MHz to 134 MHz Center spread 19 MB88152A ■ PACKAGE DIMENSION 8-pin plastic SOP Lead pitch Package width × package length Lead shape Sealing method Mounting height Weight 1.27 mm 3.9 × 5.05 mm Gullwing Plastic mold 1.75 mm MAX 0.06 g (FPT-8P-M02) 8-pin plastic SOP (FPT-8P-M02) Note 1) *1 : These dimensions include resin protrusion. Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. +.010 *1 5.05 –0.20 .199 –.008 8 +0.25 0.22 –0.07 .009 –.003 5 +0.03 +.001 *2 3.90±0.30 6.00±0.40 (.154±.012) (.236±.016) Details of "A" part 45˚ 1.55±0.20 (Mounting height) (.061±.008) 0.25(.010) 0.40(.016) 1 4 "A" 0~8˚ 1.27(.050) 0.44±0.08 (.017±.003) 0.13(.005) M 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.15±0.10 (.006±.004) (Stand off) 0.10(.004) C 2002 FUJITSU LIMITED F08004S-c-4-7 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/fj/DATASHEET/ef-ovpklv.html 20 MB88152A FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. 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