MB88346LPFV

FUJITSU SEMICONDUCTOR DATA SHEET DS04-13511-3E Linear IC Converter CMOS D/A Converter for Digital Tuning (12-channel, 8-bit, on-chip OP amp, low-voltage) MB88346L ■ DESCRIPTION The Fujitsu MB88346L is a 12-channel 8-bit D/A converter capable of low-voltage operation that has amplifiers built into each of the 12 analog output lines to deliver heavy-current drive capability. The use of serial data input means that only three control lines are required, and enables cascade connection of multiple MB88346L chips. The MB88346L is suitable for applications such as electronic volume controls and replacing trimmer potentiometers in tuning systems. In addition, the MB88346L is both function-compatible and pin-compatible the currently used MB88346B, making it easy to reduce the voltage level of a system by simply replacing the MB88346B with the MB88346L. ■ FEATURES Low voltage operation (VCC/VDD : 2.7 V to 3.6 V) Ultra-low power consumption (0.5 mW/ch at VCC = 3 V) Ultra-compact space-saving package lineup (SSOP-20) Contains 12-channel R-2R type 8-bit D/A converter On-chip analog output amps (sink current max. 1.0 mA, source current max. 1.0 mA) Analog output range from 0 to VCC Two separate power supply/ground lines for MCU interface block/operational amplifier output buffer block and D/A converter block • Serial data input : maximum operating speed 2.5 MHz (maximum operating speed in cascade connection is 1.5 MHz) • CMOS process • Package lineup includes DIP 20-pin, SSOP 20-pin • • • • • • • Copyright©2000-2006 FUJITSU LIMITED All rights reserved MB88346L ■ PIN ASSIGNMENT (Top view) VSS AO3 AO4 AO5 AO6 AO7 AO8 AO9 AO10 VDD 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 GND AO2 AO1 DI CLK LD DO AO12 AO11 VCC (DIP-20P-M02) (FPT-20P-M03) 2 MB88346L ■ PIN DESCRIPTION Pin No. Symbol I/O Function Serial address/data input to the internal 12-bit shift register : The address/data format is that upper 4 bits (D11 to D8) indicate an address and lower 8 bits (D7 to D0) indicate data. The D11 (MSB) is the firstin bit and D0 (LSB) is the last-in bit. Outputs MSB bit data from 12-bit shift register. Shift clock input to the internal 12-bit shift register : At the rising edge of CLK data on the DI pin is shifted into the LSB of the shift register and contents of the shift register are shifted right (to the MSB) . Load strobe input for a 12-bit address/data : A high level on the LD pin latches a 4-bit address (upper 4 bits : D11 to D8) of the internal 12-bit shift register into the internal address decoder, and writes 8-bit data (lower 8 bits : D7 to D0) of the shift register into an internal data latch selected by the latched address. 17 DI I 14 16 DO CLK O I 15 LD I 18 19 2 3 4 5 6 7 8 9 12 13 11 20 10 1 AO1 AO2 AO3 AO4 AO5 AO6 AO7 AO8 AO9 AO10 AO11 AO12 VCC GND VDD VSS O 8-bit D/A output pins with OP amps. ⎯ ⎯ ⎯ ⎯ MCU interface and OP amp power supply pin. MCU interface and OP amp ground pin. D/A converter power supply pin. D/A converter ground pin. 3 MB88346L ■ BLOCK DIAGRAM DI CLK 12-bit shift register D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 DO Address decoder 8 12 1234 12 LD D0 D7 D0 D7 1 8-bit latch 12 8-bit latch 8-bit R-2R D/A converter 8-bit R-2R D/A converter + – + – VCC GND AO1 AO12 VDD VSS 4 MB88346L ■ DATA CONFIGURATION The MB88346L has a 12-bit shift register for controlling the chip. The data passed to the 12-bit shift register needs to be supplied in the following format. The data structure consists of a total of 12 bits, four for address selection and eight for D/A data output. 1. Shift Register Control Data Configuration Last LSB D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 First MSB D11 D/A data output Address selection 2. D/A Converter Control Signals D0 0 1 0 • • • D1 0 0 1 • • • D2 0 0 0 • • • D3 0 0 0 • • • D4 0 0 0 • • • D5 0 0 0 • • • D6 0 0 0 • • • D7 0 0 0 • • • D/A data output = VSS : = VLB + VSS : = VLB × 2 + VSS : • • • 0 1 1 1 1 1 1 1 1 1 1 1 1 1 = VLB × 254 + VSS : = VDD : 1 1 VLB = (VDD − VSS) /255 5 MB88346L 3. Address Selection Signals D8 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D9 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D10 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D11 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Don’t Care AO1 selection AO2 selection AO3 selection AO4 selection AO5 selection AO6 selection AO7 selection AO8 selection AO9 selection AO10 selection AO11 selection AO12 selection Don’t Care Don’t Care Don’t Care Address selection 6 MB88346L ■ OPERATING DESCRIPTION 1. Timing Chart for Data Condition Setup MSB LSB D10 D9 D8 D2 D1 D0 DI D11 CLK LD D/A data output 2. Analog Output Voltage Range R-2R ladder output VDD OP amp output VCC VAOH (V CC) D/A output range (linear range) VAOL (GND) VSS GND VCC = VDD GND = VSS 7 MB88346L ■ ABSOLUTE MAXIMUM RATINGS Parameter Power supply voltage Input voltage Output voltage Power consumption Operating temperature Storage temperature * : VCC ≥ VDD WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. Symbol VCC VDD* VIN VOUT PD Ta Tstg ⎯ ⎯ ⎯ GND used as reference, Ta = + 25 °C Condition Rating Min − 0.3 − 0.3 − 0.3 − 0.3 ⎯ − 20 − 55 Max + 7.0 + 7.0 VCC + 0.3 VCC + 0.3 250 + 85 + 150 Unit V V V V mW °C °C ■ RECOMMENDED OPERATING CONDITIONS Parameter Power supply voltage 1 Power supply voltage 2 Analog output source current Analog output sink current Oscillator limiting output capacity Digital data value range Operating temperature Symbol VCC GND VDD VSS IAL IAH CAL ⎯ Ta Condition ⎯ ⎯ VDD − VSS ≥ 2.0 V VCC = 3.0 V VCC = 3.0 V ⎯ ⎯ ⎯ Value Min 2.7 ⎯ 2.0 GND ⎯ ⎯ ⎯ #00 − 20 Typ ⎯ 0 ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Max 3.6 ⎯ VCC VCC − 2.0 1.0 1.0 0.1 #FF + 85 Unit V V V V mA mA µF ⎯ °C WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 8 MB88346L ■ ELECTRICAL CHARACTERISTICS 1. DC Characteristics (1) Digital Block (VDD, VCC = 2.7 V to 3.6 V (VCC ≥ VDD) , GND = VSS = 0 V, Ta = −20 °C to +85 °C) Parameter Power supply voltage Power supply current 1 Input leak current L level input voltage H level input voltage L level output voltage H level output voltage (2) Analog Block 1 (VDD, VCC = 2.7 V to 3.6 V (VCC ≥ VDD) , GND = VS = 0 V, Ta = –20 °C to +85 °C) Parameter Power consumption Analog voltage Resolution Monotonic increase Nonlinearity error Differential linearity error Symbol IDD VDD VSS Res Rem LE DLE Pin VDD VDD VSS Condition Maximum setting value from #00 to #FF VDD – VSS ≥ 2.0 ⎯ AO1 to AO12 VDD ≤ VCC − 0.1 V, VSS ≥ 0.1 V, no load Value Min ⎯ 2.0 GND ⎯ ⎯ − 1.5 − 1.0 Typ 0.6 ⎯ ⎯ 8 8 ⎯ ⎯ Max 1.5 VCC VCC − 2.0 ⎯ ⎯ + 1.5 + 1.0 Unit mA V V bit bit LSB LSB Symbol VCC ICC IILK VIL VIH VOL VOH DO CLK, DI, LD VCC Pin Condition ⎯ Stationary (CLK signal stopped) , no load VIN = 0 to VCC ⎯ ⎯ IOL = 2.5 mA IOH = − 400 µA Value Min 2.7 ⎯ − 10 ⎯ 0.8 VCC ⎯ VCC − 0.4 Typ 3.0 1.2 ⎯ ⎯ ⎯ ⎯ ⎯ Max 3.6 3.0 + 10 0.2 VCC ⎯ 0.4 ⎯ Unit V mA µA V V V V Nonlinearity error : Deviation (error) in input/output curves with respect to an ideal straight line connecting output voltage at “00” and output voltage at “FF.” Differential linearity error : Deviation (error) in amplification with respect to theoretical increase in amplification per 1-bit increase in digital value. Ideal straight line Analog output VAOH Non linearity error VAOL Digital setting #00 #FF Note : The value of VAOH and VDD, and the value of VAOL and VSS are not necessarily equivalent. 9 MB88346L (3) Analog Block 2 (VDD, VCC = 2.7 V to 3.6 V (VCC ≥ VDD) , GND = VSS = 0 V, Ta = −20 °C to +85 °C) Parameter Symbol Pin Condition VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAL = 0 µA Digital data = #00 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAL = 500 µA Digital data = #00 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAH = 500 µA Digital data = #00 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAL = 1.0 mA Digital data = #00 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAH = 1.0 mA Digital data = #00 VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAL = 0 µA Digital data = #FF VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAL = 500 µA Digital data = #FF VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAH = 500 µA Digital data = #FF VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAL = 1.0 mA Digital data = #FF VDD = VCC = 3.0 V, VSS = GND = 0.0 V, IAH = 1.0 mA Digital data = #FF Value Min Typ ⎯ Max VSS + 0.1 Unit Output minimum voltage 1 VAOL1 VSS V Output minimum voltage 2 VAOL2 VSS − 0.2 VSS VSS + 0.2 V Output minimum voltage 3 VAOL3 VSS ⎯ VSS + 0.2 V Output minimum voltage 4 VAOL4 VSS − 0.3 VSS VSS + 0.3 V Output minimum voltage 5 VAOL5 AO1 to AO12 VSS ⎯ VSS + 0.3 V Output maximum voltage 1 VAOH1 VDD − 0.1 ⎯ VDD V Output maximum voltage 2 VAOH2 VDD − 0.2 ⎯ VDD V Output maximum voltage 3 VAOH3 VDD − 0.2 VDD VDD + 0.2 V Output maximum voltage 4 VAOH4 VDD − 0.3 ⎯ VDD V Output maximum voltage 5 VAOH5 VDD − 0.3 VDD VDD + 0.3 V 10 MB88346L 2. AC Characteristics (VDD, VCC = 2.7 V to 3.6 V (VCC ≥ VDD) , GND = VSS = 0 V, Ta = − 20 °C to +85 °C) Parameter Clock L level pulse width Clock H level pulse width Clock rise time Clock fall time Data setup time Data hold time Load setup time Load hold time Load H level pulse width Data output delay time D/A output settling time Symbol tCKL tCKH tCr tCf tDCH tCHD tCHL tLDC tLDH tDO tLDD Condition ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ ⎯ Refer to “• Load condition 1” Refer to “• Load condition 2” Value Min 200 200 ⎯ 30 60 200 100 100 70 ⎯ Max ⎯ ⎯ 200 ⎯ ⎯ ⎯ ⎯ ⎯ 600 300 Unit ns ns ns ns ns ns ns ns ns µs • Load condition 1 Measurement point CL = 20 pF to 100 pF • Load condition 2 Measurement point R AL = 10 kΩ CAL = 50 pF 11 MB88346L • Input/output timing tCr tCKH tCf CLK tCKL DI tLDH tDCH tCHD tCHL tLDC LD tLDD D/A output tDO 90 % 10 % DO Note: Decision levels: 80 % and 20 % of VCC ■ VAO vs. IAO CHARACTERISTICS : EXAMPLE Ta = +25°C 3.0 V MB88346L VDD DI CLK LD VSS VCC AO1 to AO12 GND 3.0 V Source current Sink current Pattern input V (Continued) 12 MB88346L (Continued) [mV] 3,000 2,980 2,960 Analog output level 2,940 2,920 2,900 2,880 2,860 2,840 2,820 2,800 1.0 0.8 0.6 0.4 0.2 0.0 0.2 0.4 0.6 0.8 1.0 [mA] #FF setting Sink current Source current [mV] 1,600 1,580 1,560 Analog output level 1,540 1,520 1,500 1,480 1,460 1,440 1,420 1,400 1.0 #80 setting 0.8 0.6 0.4 Sink current 0.2 0.0 0.2 0.4 0.6 0.8 Source current 1.0 [mA] [mV] 200 180 160 Analog output level 140 120 100 80 60 40 20 0 1.0 #00 setting 0.8 0.6 0.4 Sink current 0.2 0.0 0.2 0.4 0.6 0.8 Source current 1.0 [mA] 13 MB88346L ■ ORDERING INFORMATION Part number MB88346LP MB88346LPFV Package 20-pin plastic DIP (DIP-20P-M02) 20-pin plastic SSOP (FPT-20P-M03) Remarks 14 MB88346L ■ PACKAGE DIMENSIONS 20-pin plastic DIP Lead pitch Row spacing Sealing method 2.54mm(100mil) 7.62mm(300mil) Plastic mold (DIP-20P-M02) 20-pin plastic DIP (DIP-20P-M02) 24.64 –0.30 .970 –.012 +.008 +0.20 INDEX-1 INDEX-2 6.20±0.25 (.244±.010) 4.36(.172)MAX 0.51(.020)MIN 0.25±0.05 (.010±.002) 3.00(.118)MIN 0.46±0.08 (.018±.003) 15°MAX 0.86 –0 1.27(.050) MAX +0.30 +.012 1.27 –0 .050 –0 +0.30 .034 –0 +.012 7.62(.300) TYP 2.54(.100) TYP C 1994 FUJITSU LIMITED D20003S-3C-4 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/fj/DATASHEET/ef-ovpklv.html (Continued) 15 MB88346L (Continued) 20-pin plastic SSOP Lead pitch Package width × package length Lead shape Sealing method Mounting height Weight 0.65 mm 4.40 × 6.50 mm Gullwing Plastic mold 1.45 mmMAX 0.09g P-SSOP20-4.4×6.5-0.65 (FPT-20P-M03) Code (Reference) 20-pin plastic SSOP (FPT-20P-M03) *1 6.50±0.10(.256±.004) 20 11 Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max). Note 2) *2 : These dimensions do not include resin protrusion. Note 3) Pins width and pins thickness include plating thickness. Note 4) Pins width do not include tie bar cutting remainder. 0.17±0.03 (.007±.001) INDEX *24.40±0.10 6.40±0.20 (.173±.004) (.252±.008) Details of "A" part 1.25 –0.10 .049 –.004 LEAD No. 1 10 +0.20 +.008 (Mounting height) 0.65(.026) "A" 0.24±0.08 (.009±.003) 0.13(.005) M 0~8˚ 0.10±0.10 (Stand off) (.004±.004) 0.25(.010) 0.10(.004) 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) C 2003 FUJITSU LIMITED F20012S-c-4-6 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/fj/DATASHEET/ef-ovpklv.html 16 MB88346L FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. 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