MB89P133A

FUJITSU SEMICONDUCTOR DATA SHEET DS07-12510-10E 8-bit Proprietary Microcontroller CMOS F2MC-8L MB89130/130A Series MB89131/P131/133A/P133A/135A/ MB89P135A/PV130A s DESCRIPTION The MB89130/130A series has been developed as a general-purpose version of the F2MC*-8L family consisting of proprietary 8-bit, single-chip microcontrollers. In addition to a compact instruction set, the microcontrollers contain a great variety of peripheral functions such as timers, a serial interface, an A/D converter, and external interrupts. The MB89130A series also include a remote control transmitting output and wake-up interrupt function. * : F2MC stands for FUJITSU Flexible Microcontroller. s FEATURES • • • • • • • • • F2MC-8L family CPU core Low-voltage operation (when an A/D converter is not used) Low current consumption (applicable to the dual-clock system) Minimum execution time : 0.95 µs at 4.2 MHz 21-bit timebase timer I/O ports : max. 36 ports External interrupt 1 : 3 channels External interrupt 2 (wake-up function) : 8 channels (only for the MB89130A series) 8-bit serial I/O : 1 channel (Continued) s PACKAGE 48-pin plastic QFP 48-pin plastic SH-DIP 48-pin ceramic MQFP (FPT-48P-M13) (DIP-48P-M01) (MQP-48C-P01) MB89130/130A Series (Continued) • 8/16-bit timer/counter : 1 channel • 8-bit A/D converter : 4 channels • Remote control transmitting frequency generator (for the MB89130A series only) • Low-power consumption modes (stop, sleep, and watch mode) • QFP-48 package, SH-DIP-48 package • CMOS technology 2 MB89130/130A Series s PRODUCT LINEUP Part number Item Classification MB89131 MB89133A MB89135A MB89P133A MB89P131 Mass-produced products (mask ROM products) One-time PROM products 4 K × 8 bits 8 K × 8 bits (internal PROM, (internal PROM, to be to be programmed programmed with generalwith generalpurpose EPROM purpose EPROM programmer) programmer) 128 × 8 bits ROM size 4 K × 8 bits (internal mask ROM) 8 K × 8 bits (internal mask ROM) 16 K × 8 bits (internal mask ROM) RAM size 128 × 8 bits The number of instructions : Instruction bit length : Instruction length : Data bit length : Minimum execution time : Minimum interrupt processing time : Output ports (N-ch open-drain ports) : Output ports (CMOS) : I/O ports (CMOS) : Total : 256 × 8 bits 136 8 bits 1 to 3 bytes 1, 8, 16 bits 0.95 µs at 4.2 MHz 8.57 µs at 4.2 MHz 4 (All also serve as peripherals.) CPU functions Ports 8 24 (8 ports also serve as peripherals. For MB89130A, 16 ports also serve as.) 36 8/16-bit timer/ counter 8-bit serial I/O 8-bit timer/counter × 2 channels or a 16-bit event counter 8 bits LSB/MSB first selectable 8-bit resolution × 4 channels A/D conversion mode (minimum conversion time : 42 µs at 4.2 MHz) Sense mode (minimum conversion time : 11.4 µs at 4.2 MHz) Capable of continuous activation by an internal timer Reference voltage input 8-bit A/D converter 3 independent channels (edge selection, interrupt vector, source flag) Rising/falling both edges selectable External interrupt 1 Used also for wake-up from stop/sleep mode. (Edge detection is also permitted in the stop mode.) External interrupt 2 (wake-up function) Remote control transmitting generator Standby mode Process Operating voltage* 2.2 to 4.0 V (with the dual-clock option) 2.2 to 6.0 V (with the single-clock option)   8 channels (only for level detection) 1 channel (Pulse width and cycle selectable by program) Sleep, stop, and clock mode CMOS 2.7 V to 6.0 V   * : Varies with conditions such as the operating frequency. (See “s ELECTRICAL CHARACTERISTICS”.) (Continued) 3 MB89130/130A Series (Continued) Part number Item Classification ROM size RAM size MB89P135 One-time PROM products 16 K × 8 bits (internal PROM, to be programmed with general-purpose EPROM programmer) 512 × 8 bits The number of instructions Instruction bit length Instruction length Data bit length Minimum execution time Minimum interrupt processing time Output ports (N-ch open-drain ports) Output ports (CMOS) I/O ports (CMOS) MB89PV130A Piggyback/evaluation product 32 K × 8 bits (external ROM) 1 K × 8 bits : 136 : 8 bits : 1 to 3 bytes : 1, 8, 16 bits : 0.95 µs at 4.2 MHz : 8.57 µs at 4.2 MHz : 4 (All also serve as peripherals.) :8 : 24 (8 ports also serve as peripherals. For MB89130A, 16 ports also serve as peripherals.) : 36 CPU functions Ports Total 8/16-bit timer/ counter 8-bit serial I/O 8-bit timer/counter × 2 channels or a 16-bit event counter 8 bits LSB/MSB first selectable 8-bit resolution × 4 channels A/D conversion mode (minimum conversion time : 42 µs at 4.2 MHz) Sense mode (minimum conversion time : 11.4 µs at 4.2 MHz) Capable of continuous activation by an internal timer Reference voltage input 3 independent channels (selectable edge, interrupt vector, source flag) Rising/falling both edges selectable Used also for wake-up from the stop/sleep mode. (Edge detection is also permitted in the stop mode.) 8 channels (only for level detection) 8-bit A/D converter External interrupt 1 External interrupt 2 (wake-up function) Remote control transmitting frequency generator Standby mode Process Operating voltage EPROM for use 1 channel (Pulse width and cycle selectable by program) Sleep, stop, and clock mode CMOS 2.7 V to 6.0 V  2.7 V to 6.0 V MBM27C256A-20TVM 4 MB89130/130A Series s PACKAGE AND CORRESPONDING PRODUCTS Package FPT-48P-M13 DIP-48P-M01 MQP-48C-P01 Package FPT-48P-M13 DIP-48P-M01 MQP-48C-P01 × × × × MB89P135A × MB89PV130A × × × × × × × MB89131 MB89133A MB89135A MB89P133A MB89P131 : Available, × : Not available s DIFFERENCES AMONG PRODUCTS 1. Memory Size Before evaluating using the OTPROM (one-time PROM) products, verify its differences from the product that will actually be used. Take particular care on the following points : • The number of register banks available is different among the MB89131, MB89133A/135A and MB89P135A/ PV130A. • The stack area, etc., is set at the upper limit of the RAM. 2. Current Consumption • When operated at low speed, the product with an OTPROM will consume more current than the product with a mask ROM. However, the same is current consumption in sleep/stop modes. (For more information, see “s ELECTRICAL CHARACTERISTICS”.) • In the case of the MB89PV130A, added is the current consumed by the EPROM which is connected to the top socket. 3. Mask Options Functions that can be selected as options and how to designate these options vary with product. Before using options, check “s MASK OPITONS”. Take particular care on the following point : • P40 to P43 must be set to no pull-up resistor when an A/D converter is used. • For MB89P135A, pull-up resistor option cannot be set for P40 to P43. • Each option is fixed on the MB89PV130A. 5 MB89130/130A Series s PIN ASSIGNMENTS (TOP VIEW) P40/AN0 P41/AN1 P42/AN2 P43/AN3 AVR AVSS P30/SCK P31/SO P32/SI P33/EC/SCO P34/TO/INT0 P35/INT1 AVCC RST MOD0 MOD1 X0 X1 VCC X0A X1A P27 P26 P25 1 2 3 4 5 6 7 8 9 10 11 12 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 Note : Parenthesized function is available only for the MB89130A series. P24 P23 P22 P21 P20 P17 VSS P16 P15 P14 P13 P12 13 14 15 16 17 18 19 20 21 22 23 24 P36/INT2 P37/BZ/(RCO) P00/(INT20) P01/(INT21) P02/(INT22) P03/(INT23) P04/(INT24) P05/(INT25) P06/(INT26) P07/(INT27) P10 P11 (FPT-48P-M13) (Continued) 6 MB89130/130A Series (TOP VIEW) VSS P16 P15 P14 P13 P12 P11 P10 P07/(INT27) P06/(INT26) P05/(INT25) P04/(INT24) P03/(INT23) P02/(INT22) P01/(INT21) P00/(INT20) P37/BZ/(RCO) P36/INT2 P35/INT1 P34/TO/INT0 P33/EC/SCO P32/SI P31/SO P30/SCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 P17 P20 P21 P22 P23 P24 P25 P26 P27 X1A X0A VCC X1 X0 MOD1 MOD0 RST AVCC P40/AN0 P41/AN1 P42/AN2 P43/AN3 AVR AVSS (DIP-48P-M01) Note : Parenthesized function is available only for the MB89130A series. (Continued) 7 MB89130/130A Series (Continued) (TOP VIEW) P40/AN0 P41/AN1 P42/AN2 P43/AN3 AVR AVSS P30/SCK P31/SO P32/SI P33/EC/SCO P34/TO/INT0 P35/INT1 AVCC RST MOD0 MOD1 X0 X1 VCC X0A X1A P27 P26 P25 1 2 3 4 5 6 7 8 9 10 11 12 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 69 70 71 72 73 74 75 61 70 59 68 57 56 55 54 53 • Pin assignment on package top Pin no. 49 50 51 52 53 54 55 56 Pin name VPP A12 A7 A6 A5 A4 A3 N.C. Pin no. 57 58 59 60 61 62 63 64 Pin name N.C. A2 A1 A0 O1 O2 O3 VSS Pin no. 65 66 67 68 69 70 71 72 Pin name O4 O5 O6 O7 O8 CE A10 N.C. Pin no. 73 74 75 76 77 78 79 80 Pin name OE N.C. A11 A9 A8 A13 A14 VCC N.C. : Internally connected. Do not use. 8 P24 P23 P22 P21 P20 P17 VSS P16 P15 P14 P13 P12 13 14 15 16 17 18 19 20 21 22 23 24 P36/INT2 P37/BZ/(RCO) P00/INT20 P01/INT21 P02/INT22 P03/INT23 P04/INT24 P05/INT25 P06/INT26 P07/INT27 P10 P11 77 78 79 80 49 50 51 52 68 67 66 65 64 63 62 61 (MQP-48C-P01) MB89130/130A Series s PIN DESCRIPTION Pin no. SH-DIP*1 35 36 38 39 33 34 QFP*2 5 6 8 9 3 4 Pin name X0 X1 X0A X1A MOD0 MOD1 Circuit type A B C Function Main clock crystal oscillator pins (max. 4.2 MHz) Subclock crystal oscillator pins (32.768 kHz) Operation mode selecting pins Connect directly to VSS. Reset I/O pin This pin is of N-ch open-drain output type with pull-up resistor, and a hysteresis input type. The internal circuit is initialized by the input of “L”. “L” is output from this pin by an internal reset source as a option. General-purpose I/O ports On the MB89130A series, these ports also serve as an external interrupt input. External interrupt inputs are of hysteresis input type. General-purpose I/O ports General-purpose output ports General-purpose I/O port Also serves as the clock I/O for the 8-bit serial I/O. This port is of hysteresis input type. General-purpose I/O port Also serves as a 8-bit serial I/O data output. This port is of hysteresis input type. General-purpose I/O port Also serves as a 8-bit serial I/O data input. This port is of hysteresis input type. General-purpose I/O port Also serves as the external clock input for the 8-bit timer/counter. This port is of hysteresis input type. The system clock output is provided as an option. General-purpose I/O port Also serve as the overflow output for the 8-bit timer/ counter and an external interrupt input. This port is of hysteresis input type. General-purpose I/O ports Also serves as an external interrupt input. These ports are of hysteresis input type. 32 2 RST D 16 to 9 34 to 27 P00 (INT20) to P07 (INT27) P10 to P17 P20 to P27 P30/SCK I 8 to 2, 48 47 to 40 24 26 to 20, 18 17 to 10 42 E G F 23 41 P31/SO F 22 40 P32/SI F 21 39 P33/EC/SCO F 20 38 P34/TO/INT0 F 19, 18 37, 36 P35/INT1, P36/INT2 F *1 : DIP-48P-M01 *2 : FPT-48P-M13 (Continued) 9 MB89130/130A Series (Continued) Pin no. SH-DIP*1 QFP*2 Pin name Circuit type Function General-purpose I/O port Also serves as a buzzer output. This port is of hysteresis input type. On the MB89130A series, this port also serves as a remote control output. N-ch open-drain output ports Also serve as an analog input for the A/D converter. Power supply pin Power supply (GND) pin A/D converter power supply pin Use this pin at the same voltage as VCC. A/D converter reference voltage input pin A/D converter power supply pin Use this pin at the same voltage as VSS. 17 35 P37/BZ/ (RCO) F 30 to 27 37 1 31 26 25 48 to 45 7 19 1 44 43 P40/AN0 to P43/AN3 VCC VSS AVCC AVR AVSS H      *1 : DIP-48P-M01 *2 : FPT-48P-M13 10 MB89130/130A Series • External EPROM pins (MB89PV130A only) Pin no. 49 50 51 52 53 54 55 58 59 60 61 62 63 64 65 66 67 68 69 70 71 73 75 76 77 78 79 80 56 57 72 74 Pin name VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 VSS O4 O5 O6 O7 O8 CE A10 OE A11 A9 A8 A13 A14 VCC I/O O “H” level output pin Function O Address output pins I O Data input pins Power supply (GND) pin I Data input pins O O O ROM chip enable pin Outputs “H” during standby. Address output pin ROM output enable pin Outputs “L” at all times. O Address output pins O  EPROM power supply pin Internally connected pins Be sure to leave them open. N.C. 11 MB89130/130A Series s I/O CIRCUIT TYPE Type X1 Circuit Remarks • Crystal or ceramic oscillation type (main clock) Circuit for the MB89P133A/P131/P135A/PV130A External clock input selecting versions of MB89131/ 133A/135A Oscillation feedback resistor of approximately 1 MΩ/5 V X0 Standby control signal A X1 X0 • Crystal or ceramic oscillation type (main clock) Crystal or ceramic oscillation selecting versions of MB89131/133A/135A Oscillation feedback resistor of approximately 1 MΩ/5 V Standby control signal X1A X0A • Crystal and ceramic oscillation type (subclock) Circuit for the MB89131/133A/135A Oscillation feedback resistor of approximately 4.5 MΩ/5 V Standby control signal B X1A X0A • Crystal and ceramic oscillation type (subclock) Circuit for the MB89P131/P133A/P135A/PV130A Oscillation feedback resistor of approximately 4.5 MΩ/5 V Standby control signal C • Output pull-up resistor (P-ch) of approximately 50 kΩ/5 V • Hysteresis input P-ch R D N-ch (Continued) 12 MB89130/130A Series (Continued) Type R Circuit • CMOS output • CMOS input P-ch Remarks E N-ch • Pull-up resistor optional R • CMOS output • Hysteresis input P-ch F N-ch • Pull-up resistor optional • CMOS output P-ch G N-ch R P-ch • N-ch open-drain output • Analog input H N-ch Analog input P-ch P-ch • Pull-up resistor optional • CMOS output • CMOS input • The interrupt input is a hysteresis input (available only for the MB89130A series) . I N-ch Interrupt input Only for MB89130A series • Pull-up resistor optional 13 MB89130/130A Series s HANDLING DEVICES 1. Preventing Latchup Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins other than medium- and high-voltage pins or if higher than the voltage which shows on “1. Absolute Maximum Ratings” in “s Electrical Characteristics” is applied between VCC and VSS. When latchup occurs, power supply current increases rapidly and might thermally damage elements. When using, take great care not to exceed the absolute maximum ratings. Also, take care to prevent the analog power supply (AVCC and AVR) and analog input from exceeding the digital power supply (VCC) when the analog system power supply is turned on and off. 2. Treatment of Unused Input Pins Leaving unused input pins open could cause malfunctions. They should be connected to a pull-up or pull-down resistor. 3. Treatment of Power Supply Pins on Microcontrollers with A/D Converter Connect to be AVCC = VCC and AVSS = AVR = VSS even if the A/D converter are not in use. 4. Treatment of N.C. Pins Be sure to leave (internally connected) N.C. pins open. 5. Power Supply Voltage Fluctuations Although operation is assured within the rated range of VCC power supply voltage, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied to the IC is therefore important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz) and the transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is switched. 6. Precautions when Using an External Clock When an external clock is used, oscillation stabilization time is required even for power-on reset (optional) and wake-up from stop mode. 7. Turning on the supply voltage (only for the MB89P135A) Power on sharply up to the option enabling voltage (2 V) within 13 clock cycles after starting of oscillation. 14 MB89130/130A Series s PROGRAMMING TO THE EPROM ON THE MB89P131 The MB89P131 is an OTPROM version of the MB89131. 1. Features • 4-Kbyte PROM on chip • Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer) 2. Memory Space Memory space in EPROM mode is diagrammed below. Address 0000H Single chip EPROM mode (Corresponding addresses on the EPROM programmer) I/O 0080H 00C0H 0140H 0000H Not available F000H 7000H Not available Not available RAM PROM 4 KB EPROM 4 KB FFFFH 7FFFH 3. Programming to the EPROM In EPROM mode, the MB89P131 functions equivalent to the MBM27C256A. This allows the PROM to be programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter. • Programming procedure (1) Set the EPROM programmer for the MBM27C256A. (2) Load program data into the EPROM programmer at 7000H to 7FFFH (note that addresses F000H to FFFFH while operating as a single chip correspond to 7000H to 7FFFH in EPROM mode) . (3) Program with the EPROM programmer. 15 MB89130/130A Series s PROGRAMMING TO THE EPROM ON THE MB89P133A The MB89P133A is an OTPROM version of the MP89133A. 1. Features • 8-Kbyte PROM on chip • Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer) 2. Memory Space Memory space in EPROM mode is diagrammed below. Address 0000H I/O 0080H RAM 0180H Single chip EPROM mode (Corresponding addresses on the EPROM programmer) Not available 0000H Not available E000H PROM 8 KB 6000H EPROM 8 KB FFFFH 7FFFH 3. Programming to the EPROM In EPROM mode, the MB89P133A functions equivalent to the MBM27C256A. This allows the PROM to be programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter. • Programming procedure (1) Set the EPROM programmer for the MBM27C256A. (2) Load program data into the EPROM programmer at 6000H to 7FFFH (note that addresses E000H to FFFFH while operating as a single chip correspond to 6000H to 7FFFH in EPROM mode) . (3) Program with the EPROM programmer. 16 MB89130/130A Series s PROGRAMMING TO THE EPROM ON THE MB89P135A The MB89P135A is an OTPROM version of the MB89133A/135A. 1. Features • 16-Kbyte PROM on chip • Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer) 2. Memory Space Memory space in EPROM mode is diagrammed below. Address 0000H Single chip EPROM mode (Corresponding addresses on the EPROM programmer) I/O 0080H RAM 0280H Not available 8000H Not available BFF0H Not available BFF6H Not available C000H 4000H 3FF6H Vacancy (Read value FFH) 3FF0H Option area 0000H Vacancy (Read value FFH) PROM 16 KB EPROM 16 KB FFFFH 7FFFH 3. Programming to the EPROM In EPROM mode, the MB89P135A functions equivalent to the MBM27C256A. This allows the PROM to be programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter. • Programming procedure (1) Set the EPROM programmer for the MBM27C256A. (2) Load program data into the EPROM programmer at 4000H to 7FFFH (note that addresses C000H to FFFFH while operating as a single chip correspond to 4000H to 7FFFH in EPROM mode) . (3) Load option data into the EPROM programmer at 3FF0H to 3FF6H. (4) Program with the EPROM programmer. 17 MB89130/130A Series 4. Setting OTPROM Options (MB89P135A Only) The programming procedure is the same as that for the PROM. Options can be set by programming values at the addresses shown on the memory map. The relationship between bits and options is shown on the following bit map : • OTPROM option bit map AdBit 7 Bit 6 dress Vacancy 3FF0H Readable and writable P07 Pull-up 1 : Yes 0 : No P17 Pull-up 1 : No 0 : Yes P37 Pull-up 1 : Yes 0 : No Vacancy 3FF4H Readable and writable Vacancy 3FF5H Readable and writable Vacancy 3FF6H Readable and writable Vacancy Readable and writable P06 Pul-up 1 : Yes 0 : No P16 Pull-up 1 : No 0 : Yes P36 Pull-up 1 : Yes 0 : No Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Bit 5 Bit 4 Clock mode selection 1 : Single clock 0 : Dual clock P04 Pull-up 1 : Yes 0 : No P14 Pull-up 1 : Yes 0 : No P34 Pull-up 1 : Yes 0 : No Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Bit 3 Bit 2 Bit 1 Bit 0 Vacancy Readable and writable P05 Pull-up 1 : Yes 0 : No P15 Pull-up 1 : Yes 0 : No P35 Pull-up 1 : Yes 0 : No Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable Reset pin output 1 : Yes 0 : No Power-on reset 1 : Yes 0 : No Oscillation stabilization time 00 : 22/FCH 10 : 216/FCH 01 : 212/FCH 11 : 218/FCH P01 Pull-up 1 : Yes 0 : No P11 Pull-up 1 : Yes 0 : No P31 Pull-up 1 : Yes 0 : No Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable P00 Pull-up 1 : Yes 0 : No P10 Pull-up 1 : Yes 0 : No P30 Pull-up 1 : Yes 0 : No Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable 3FF1H P03 Pull-up 1 : Yes 0 : No P13 Pull-up 1 : Yes 0 : No P33 Pull-up 1 : Yes 0 : No Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable P02 Pull-up 1 : Yes 0 : No P12 Pull-up 1 : Yes 0 : No P32 Pull-up 1 : Yes 0 : No Vacancy Readable and writable Vacancy Readable and writable Vacancy Readable and writable 3FF2H 3FF3H Note : Each bit is set to ‘1’ as the initialized value, therefore the pull-up option is selected. 18 MB89130/130A Series s HANDLING THE MB89P131/P133A/P135A 1. Recommended Screening Conditions High-temperature aging is recommended as the pre-assembly screening procedure. Program, verify Aging +150 °C, 48 h Data verification Assembly 2. Programming Yield Due to its nature, bit programming test can’t be conducted as Fujitsu delivery test. For this reason, a programming yield of 100% cannot be assured at all times. 3. EPROM Programmer Socket Adapter Part no. MB89P131PF MB89P133APFM MB89P133AP Package QFP-48 SH-DIP-48 Compatible socket adapter Sun Hayato Co., Ltd. ROM-48QF2-28DP-8L ROM-48SD-28DP-8L2 Inquiry : Sun Hayato Co., Ltd. : TEL (81) -3-3986-0403 FAX (81) -3-5396-9106 19 MB89130/130A Series s PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE 1. EPROM for Use MBM27C256A-20TVM 2. Programming Socket Adapter To program to the PROM using an EPROM programmer, use the socket adapter (manufacturer : Sun Hayato Co., Ltd.) listed below : Package Socket adapter part number LCC-32 (Square) ROM-32LC-28DP-S Inquiry : Sun Hayato Co., Ltd. : TEL (81) -3-3986-0403 FAX (81) -3-5396-9106 3. Memory Space Memory space in each mode, such as 32-Kbyte PROM is diagrammed below. Address 0000 H Single chip Corresponding addresses on the EPROM programmer I/O 0080 H RAM 0480 H Not available 8000 H 0000 H PROM 32 KB EPROM 32 KB FFFFH 7FFFH 4. Programming to the EPROM (1) (2) (3) Set the EPROM programmer for the MBM27C256A. Load program data into the EPROM programmer at 0000H to 7FFFH. Program with the EPROM programmer. 20 MB89130/130A Series s BLOCK DIAGRAM X0 X1 Main clock oscillator Timebase timer Clock controller X0A X1A Subclock oscillator (32.768 kHz) Reset circuit (WDT) Internal bus RST 8-bit timer/counter P34/TO/INT0 Ports 0 and 1 8 P00/ (INT20) to P07/ (INT27) CMOS I/O port 8-bit timer/counter External interrupt 2* (wake-up function) 8-bit serial I/O Port 3 P33/EC/SCO 8 P10 to P17 P30/SCK P32/SI P31/SO P35/INT1 P36/INT2 External interrupt 1 8 P20 to P27 Port 2 Remote control* transmitting frequency generator CMOS output port Buzzer output CMOS I/O port N-ch open-drain output port Port 4 P37/BZ/(RCO) RAM F2MC-8L CPU 8-bit A/D converter 4 4 P40/AN0 to P43/AN3 AVR ROM AVCC AVSS The other pins MOD0, MOD1, VCC, VSS * : Only for the MB89130A series. Note : Parenthesized pin function is only for the MB89130A series. 21 MB89130/130A Series s CPU CORE 1. Memory Space The microcontrollers of the MB89130/130A series offer a memory space of 64 Kbytes for storing all of I/O, data, and program areas. The I/O area is allocated from the lowest address. The data area is allocated immediately above the I/O area. The data area can be divided into register, stack, and direct areas according to the application. The program area is allocated from exactly the opposite end, that is, near the highest address. The tables of interrupt reset vectors and vector call instructions are allocated from the highest address within the program area. The memory space of the MB89130/130A series is structured as illustrated below. • Memory Space MB89P131 MB89131 0000 H I/O 007F H 00C0 H 007F H Vacancy 0080 H 0000 H MB89P133A MB89133A 0000 H I/O 007F H 0080 H RAM 256 B 00FF H 0100 H 00FF H 0100 H Register 017F H 0180 H 017F H 0180 H MB89135A 0000 H I/O 007F H 0080 H RAM 256 B 00FF H 0100 H Register MB89P135A 0000 H I/O 007F H 0080 H RAM 512 B 00FF H 0100 H Register 01FF H 0200 H 01FF H 0200 H MB89PV130A I/O RAM 128 B 0100 H Register 013F H 0140 H RAM 1 KB Register 027F H 0280 H Vacancy Vacancy Vacancy Vacancy 047F H 0480 H Vacancy BFFF H C000 H EFFF H F0 00 H FFFF H DFFF H E000 H ROM 4 KB ROM 8 KB FFFF H FFFF H ROM 16 KB FFFF H BFFF H C000 H ROM 16 KB FFFF H 7FFF H 8000 H External ROM 32 KB 22 MB89130/130A Series 2. Registers The F2MC-8L family has two types of registers; dedicated hardware registers in the CPU and general-purpose memory registers. The following registers are provided : Program counter (PC) : A 16-bit register for indicating the instruction storage positions. Accumulator (A) : A 16-bit temporary register for storing arithmetic operations, etc. When the instruction is an 8-bit data processing instruction, the lower byte is used. Temporary accumulator (T) : A 16-bit register which is used for arithmetic operations with the accumulator When the instruction is an 8-bit data processing instruction, the lower byte is used. Index register (IX) : A 16-bit register for index modification Extra pointer (EP) : A 16-bit pointer for indicating a memory address Stack pointer (SP) : A 16-bit pointer for indicating a stack area Program status (PS) : A 16-bit register for storing a register pointer, a condition code 16 bits PC A T IX EP SP PS : Program counter : Accumulator : Temporary accumulator : Index register : Extra pointer : Stack pointer : Program status Initial value FFFDH Indeterminate Indeterminate Indeterminate Indeterminate Indeterminate I-flag = 0, IL1, 0 = 11 The other bit values are Indeterminate. The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for use as a condition code register (CCR) . (See the diagram below.) • Structure of the Program Status Register 15 PS 14 13 RP 12 11 10 9 8 7 H 6 I 5 4 3 N 2 Z 1 V 0 C Vacancy Vacancy Vacancy IL1, 0 RP CCR 23 MB89130/130A Series The RP indicates the address of the register bank currently in use. The relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. • Rule for Conversion of Actual Addresses of the General-purpose Register Area RP Lower OP codes b1 ↓ b0 ↓ “0” “0” “0” “0” “0” “0” “0” “1” R4 R3 R2 R1 R0 b2 ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ Generated addresses A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data, and bits for control of CPU operations at the time of an interrupt. H-flag : I-flag : IL1, 0 : Set to ‘1’ when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared to ‘0’ otherwise. This flag is for decimal adjustment instructions. Interrupt is enabled when this flag is set to ‘1’. Interrupt is disabled when the flag is cleared to ‘0’. Cleared to ‘0’ at the reset. Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is higher than the value indicated by this bit. IL1 0 0 1 1 N-flag : Z-flag : V-flag : C-flag : IL0 0 1 0 1 Interrupt level 1 2 3 Low High-low High Set to ‘1’ if the MSB becomes ‘1’ as the result of an arithmetic operation. Cleared to ‘0’ otherwise. Set to ‘1’ when an arithmetic operation results in ‘0’. Cleared to ‘0’ otherwise. Set to ‘1’ if the complement on ‘2’ overflows as a result of an arithmetic operation. Cleared to ‘0’ if the overflow does not occur. Set to ‘1’ when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared to ‘0’ otherwise. Set to the shift-out value in the case of a shift instruction. 24 MB89130/130A Series The following general-purpose registers are provided : General-purpose registers : An 8-bit resister for storing data The general-purpose registers are of 8 bits and located in the register banks of the memory. One bank contains eight registers. Up to a total of 8 banks can be used on the MB89131/P131 and a total of 16 banks can be used on the MB89133A/P133A/135A and a total of 32 banks can be used on the MB89P135A/PV130A. The bank currently in use is indicated by the register bank pointer (RP) . • Register Bank Configuration This address = 0100H + 8 × (RP) R0 R1 R2 R3 R4 R5 R6 R7 8 banks (MB89131/P131) 16 banks (MB89133A/P133A/135A) 32 banks (MB89P135A/PV130A) Memory area 25 MB89130/130A Series s I/O MAP Address 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH 1DH 1EH 1FH (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) T2CR T1CR T2DR T1DR SMR SDR (R/W) (R/W) RCR1 RCR2 (R/W) SCGC (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) (W) (R/W) (R/W) SYCC STBC WDTC TBTC WPCR PDR3 DDR3 PDR4 BZCR Read/write (R/W) (W) (R/W) (W) (R/W) Register name PDR0 DDR0 PDR1 DDR1 PDR2 Register description Port 0 data register Port 0 data direction register Port 1 data register Port 1 data direction register Port 2 data register Vacancy Vacancy System clock control register Standby control register Watchdog timer control register Timebase timer control register Watch prescaler control register Port 3 data register Port 3 data direction register Port 4 data register Buzzer register Vacancy Vacancy Peripheral control clock register Vacancy Remote control transmitting control register 1* Remote control transmitting control register 2* Vacancy Vacancy Timer 2 control register Timer 1 control register Timer 2 data register Timer 1 data register Serial mode register Serial data register Vacancy Vacancy (Continued) 26 MB89130/130A Series (Continued) Address 20H 21H 22H 23H 24H 25H 26H to 31H 32H 33H 34H to 7BH 7CH 7DH 7EH 7FH * : Only for the MB89130A series Note : Do not use vacancies. (W) (W) (W) ILR1 ILR2 ILR3 (R/W) (R/W) EIE2 EIF2 Read/write (R/W) (R/W) (R/W) (R/W) (R/W) Register name ADC1 ADC2 ADCD EIC1 EIC2 Register description A/D converter control register 1 A/D converter control register 2 A/D converter data register External interrupt 1 control register 1 External interrupt 1 control register 2 Vacancy Vacancy External interrupt 2 enable register* External interrupt 2 flag register* Vacancy Interrupt level setting register 1 Interrupt level setting register 2 Interrupt level setting register 3 Vacancy 27 MB89130/130A Series s ELECTRICAL CHARACTERISTICS 1. Absolute Maximum Ratings (AVSS = VSS = 0.0 V) Parameter Symbol VCC AVCC AVR Program voltage Input voltage Output voltage “L” level maximum output current “L” level average output current “L” level total maximum output current “L” level total average output current “H” level maximum output current “H” level average output current “H” level total maximum output current “H” level total average output current Power consumption Operating temperature Storage temperature VPP VI VO IOL IOLAV ΣIOL ΣIOLAV IOH IOHAV ΣIOH ΣIOHAV PD TA Tstg Value Min. VSS − 0.3 VSS − 0.3 Max. VSS + 7.2 VSS + 7.2 Unit V V V V V mA mA mA mA mA mA mA mA mW °C °C Average value (operating current × operating rate) Average value (operating current × operating rate) Average value (operating current × operating rate) Average value (operating current × operating rate) * AVR must not exceed VCC + 0.3 V Only for the MB89P131/P133A/ P135A Remarks Power supply voltage VSS − 0.6 VSS + 13.0 VSS − 0.3 VSS − 0.3          −40 −55 VCC + 0.3 VCC + 0.3 10 4 100 20 –10 –2 –30 –10 200 +85 +150 * : Use AVCC and VCC set to the same voltage. Take care so that AVCC does not exceed VCC, such as when power is turned on. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. 28 MB89130/130A Series 2. Recommended Operating Conditions (AVSS = VSS = 0.0 V) Parameter Symbol Value Min. 2.2* Power supply voltage VCC AVCC 2.7* 1.5 AVR Operating temperature TA 2.0 −40 Max. 6.0* 6.0* 6.0 AVCC +85 Unit V V V V °C Remarks Normal operation assurance range* MB89131/133A/135A Normal operation assurance range* MB89P131/P133A/135A/PV130A Retains the RAM state in the stop mode * : These values vary with the operating frequencies and the analog assurance range. See Figure 1 and 2, and “5. A/D Converter Electrical Characteristics.” Figure 1 Operating Voltage vs. Main Clock Operating Frequency (MB89P131/P133A/P135A/PV130A, and single-clock MB89131/133/133A/135/135A) 6 Operating voltage (V) 5 Operation assurance range 4 3 2 1 1 2 3 4 Main clock oprating frequency (at an instruction cycle of 4/FCH) (MHz) 4.0 2.0 1.0 Minimum execution time (Instruction cycle) (µs) Note : The shaded area is assured only for the MB89131/133/133A/135/135A. 29 MB89130/130A Series Figure 2 Operating Voltage vs. Main Clock Operating Frequency (Dual-clock MB89131/133/133A/135/135A) 6 Operating voltage (V) 5 4 Operation assurance range 3 2 1 1 2 3 4 Main clock oprating frequency (at an instruction cycle of 4/FCH) (MHz) 4.0 2.0 1.0 Minimum execution time (Instruction cycle) (µs) Figure 1 and 2 indicate the operating frequency of the external oscillator at an instruction cycle of 4/FCH. Since the operating voltage range is dependent on the instruction cycle, see minimum execution time if the operating speed is switched using a gear. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 30 MB89130/130A Series 3. DC Characteristics Symbol VIH “H” level input voltage (AVCC = VCC = +5.0 V, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C) Pin P00 to P07, P10 to P17 RST, P30 to P37, INT20 to INT27 P00 to P07, P10 to P17 RST, P30 to P37 INT20 to INT27 Condition Value Min. 0.7 VCC Typ.  Max. VCC + 0.3 VCC + 3.0 Unit V INT20 to INT27 are available only for the MB89130A series. Remarks Parameter VIHS 0.8 VCC  V VIL “L” level input voltage  VSS − 0.3 VSS − 0.3  0.3 VCC V INT20 to INT27 are available only for the MB89130A series. VILS  0.2 VCC V Open-drain output pin applied voltage “H” level output voltage VD P40 to P43 VCC − 0.3  VCC + 0.3 V VOH P00 to P07, P10 to P17, P20 to P27, P30 to P37 P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P43 RST IOH = −2.0 mA 2.4   V “L” level output voltage VOL IOL = 1.8 mA   0.4 V VOL2 Input leakage current (Hi-z output leakage current) IOL = 4.0 mA   0.6 V ILI1 P00 to P07, P10 to P17, P20 to P27, 0.0 V < VI < VCC P30 to P37, P40 to P43, MOD0, MOD1 P00 to P07, P10 to P17, P30 to P37, P40 to P43, RST   ±5 µA Without pull-up resistor Pull-up resistance RPULL VI = 0.0 V 25 50 100 kΩ (Continued) 31 MB89130/130A Series (Continued) Symbol (AVCC = VCC = +5.0 V, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C) Pin Condition FCH = 4.00 MHz VCC = 5.0 V tinst*2 = 1.0 µs FCH = 4.00 MHz VCC = 5.0 V tinst*2 = 1.0 µs Main clock sleep mode FCL = 32.768 kHz VCC = 3.0 V Subclock mode VCC (External clock operation) FCL = 32.768 kHz VCC = 3.0 V Subclock sleep mode FCL = 32.768 kHz VCC = 3.0 V • Watch mode • Main clock stop mode in dualclock system TA = +25 °C • Subclock stop mode • Main clock stop mode in singleclock system FCH = 4 MHz, when A/D conversion is operating FCH = 4 MHz, TA = +25 °C, when A/D conversion is not operating f = 1 MHz Value Min.   Typ. 4 6 Max. 7 10 Unit mA mA Remarks MB89131/ 133A/135A MB89P131/ P133A/P135A Parameter ICC1 ICCS1  2 5 mA   50 1 100 3 µA mA ICCL MB89131/ 133A/135A MB89P131/ P133A/P135A ICCLS  25 50 µA Power supply current*1 ICCT   15 µA ICCH   1 µA IA AVCC  1 3 mA IAH AVCC   1 µA Input capacitance CIN Other than AVCC, AVSS, VCC, and VSS  10  pF *1 : The power supply current is measured at the external clock. *2 : For information on tinst, see “ (4) Instruction Cycle” in “4. AC Characteristics.” 32 MB89130/130A Series 4. AC Characteristics (1) Reset Timing (VCC = +5.0 V ± 10%, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C) Symbol tZLZH Condition  Value Min. 48 tHCYL* Max.  Unit ns Remarks Parameter RST “L” pulse width * : tHCYL is the oscillation cycle (1/FCH) to input to the X0 pin. tZLZH 0.8 VCC RST 0.2 VCC 0.2 VCC (2) Power-on Reset Value Min.  1 (AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C) Symbol tR tOFF Condition  Max. 50  Unit ms ms Remarks Power-on reset function only Due to repeated operations Parameter Power supply rising time Power supply cut-off time Note : Make sure that power supply rises within the oscillation stabilization time selected. For example, when the main clock is operating at 3 MHz (FCH) and the oscillation stabilization time selecting option has been set to 212/FCH, the oscillation stabilization time is 1.4 ms. Therefore, the maximum value of power supply rising time is about 1.4 ms. Rapid changes in power supply voltage may cause a power-on reset. If power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended. tR 2.0 V tOFF VCC 0.2 V 0.2 V 0.2 V 33 MB89130/130A Series (3) Clock Timing Value Min. 1  238  30  Typ.  32.768  30.5   Max. 4.2  1000   24 (VSS = 0.0 V, TA = −40 °C to +85 °C) Symbol FCH FCL tHCYL tLCYL PWH1 PWL1 tCR1 tCF1 Pin X0, X1 X0A, X1A X0, X1 X0A, X1A X0 X0 Unit Remarks Parameter Input clock frequency Clock cycle time Input clock pulse width Input clock rising/falling time MHz Main clock kHz ns µs ns ns Subclock Main clock Subclock External clock External clock • X0 and X1 Timing and Conditions of Applied Voltage tHCYL PWH1 PWL1 tCF1 0.8 VCC 0.8 VCC 0.2 VCC tCR1 0.8 VCC 0.2 VCC X0 • Main Clock Conditions When a crystal or ceramic resonator is used X0 X1 When an external clock is used X0 X1 FCH C0 C1 FCH Open 34 MB89130/130A Series • X0A and X1A Timing and Conditions of Applied Voltage tLCYL 0.8 VCC 0.8 VCC X0A • Subclock Conditions When a crystal or ceramic resonator is used X0A X1A When a single-clock option is used X0A X1A Rd Open FCL C0 C1 (4) Instruction Cycle Parameter Instruction cycle (minimum execution time) Symbol Value 4/FCH, 8/FCH, 16/FCH, 64/FCH tinst 2/FCL µs Unit µs Remarks (4/FCH) tinst = 1.0 µs when operating at FCH = 4 MHz tinst = 61.036 µs when operating at FCL = 32.768 kHz 35 MB89130/130A Series (5) Recommended Resonator Manufacturers • Sample Application of Piezoelectric Resonator (FAR Family) for Main Clock Oscillation Circuit X0 X1 R ∗1 C1∗ 2 C2 ∗ 2 Frequency Dumping FAR part number*1 (MHz) resistor (built-in capacitor type) 1000 Ω 2.00 3.00 510 Ω  1 kΩ 750 Ω 4.00    Initial deviation of FAR frequency (TA = +25 °C) ±0.5% ±0.5% ±0.5% ±0.5% ±0.5% ±0.5% ±0.5% ±0.5% ±0.5% Temperature Loading characteristics of FAR frequency capacitors*2 (TA = −20 °C to +60 °C) ±0.5% ±0.5% ±0.5% ±0.5% ±0.5% ±0.5% ±0.5% ±0.5% ±0.5% Built-in FAR-C4CC-02000-L00 FAR-C4 C-02000- 20 FAR-C4 A-03000- 20 FAR-C4 A-04000- 01 FAR-C4 A-04000- 21 FAR-C4CB-04000-M00 FAR-C4 B-04000- 00 FAR-C4 B-04194- 00 4.194  Inquiry : FUJITSU MEDIA DEVICES LIMITED 36 MB89130/130A Series • Sample Application of Ceramic Resonator for Main Clock Oscillation Circuit X0 X1 R ∗ C1 C2 • Mask ROM products Resonator manufacturer* Kyocera Corporation Resonator Frequency (MHz) 4.00 4.00 1.00 C1 (pF) 33 C2 (pF) 33 R Not required 1.5 kΩ 6.8 kΩ Not required Not required Not required Not required Not required Not required Not required Not required Not required KBR-4.0MKS Matsushita Electronic EFOV4004B Components Co,. Ltd. CSBF1000J CSA4.00MG CST4.00MGW CSA4.00MGU Murata Mfg. Co., Ltd. CST4.00MGWU CSA4.00MGU040 CST4.00MGWU040 CSTCS4.00MG CSTCS4.00MGWOC5 TDK Corporation CCR4.0MC3 33 (Built-in) 33 (Built-in) 100 30 Built-in 30 Built-in 100 Built-in Built-in Built-in 100 30 Built-in 30 Built-in 100 Built-in Built-in Built-in Built-in 4.00 4.00 Built-in (Continued) 37 MB89130/130A Series (Continued) • One-time PROM products Resonator Resonator manufacturer* CSA3.00MG040 CST3.00MGW040 CSA4.00MG Murata Mfg. Co., Ltd. CSA4.00MGU CST4.00MGWU CSA4.00MGU040 CST4.00MGWU040 CSTCS4.00MG 4.00 Frequency (MHz) 3.00 C1 (pF) 100 Built-in 30 30 Built-in 100 Built-in Built-in C2 (pF) 100 Built-in 30 30 Built-in 100 Built-in Built-in R Not required Not required Not required Not required Not required Not required Not required Not required Inquiry : Kyocera Corporation • AVX Corporation North American Sales Headquarters : TEL 1-803-448-9411 • AVX Limited European Sales Headquarters : TEL 44-1252-770000 • AVX/Kyocera H.K. Ltd. Asian Sales Headquarters : TEL 852-363-3303 Matsushita Electronic Components Co., Ltd. • North America Panasonic Industrial Co. : TEL 1-201-348-7000 • Canada Matsushita Electric of Canada Ltd. : TEL 905-238-2436 • Europe Panasonic Industrial Europe (Continental) : TEL 49-40-8549-2048 Panasonic Industrial Europe (Nlederlassung Munchen) : TEL 49-89-4800-7150 • Asia Panasonic Industry of Asia, Company : TEL 65-299-8400 Murata Mfg. Co., Ltd. • Murata Electronics North America, Inc. : TEL 1-404-436-1300 • Murata Europe Management GmbH : TEL 49-911-66870 • Murata Electronics Singapore (Pte.) Ltd. : TEL 65-758-4233 TDK Corporation • TDK Corporation of America Chicago Regional Office : TEL 1-708-803-6100 • TDK Electronics Europe GmbH Components Division : TEL 49-2102-9450 • TDK Singapore (PTE) Ltd. : TEL 65-273-5022 • TDK Hongkong Co., Ltd. : TEL 852-736-2238 • Korea Branch, TDK Corporation : TEL 82-2-554-6633 38 MB89130/130A Series • Sample Application of Crystal Resonator for Subclock Oscillation Circuit X0A X1A Rd ∗ C1 C2 • Mask ROM products Resonator manufacturer* SII Inquiry : Resonator DS-VT-200 Frequency (kHz) 32.768 C1 (pF) 24 C2 (pF) 24 Rd (kΩ) 680 SII • Seiko Instruments Inc. (Japan) : TEL 81-43-211-1219 • Seiko Instruments U.S.A. Inc. : TEL 310-517-7770 • Seiko Instruments GmbH : TEL 49-6102-297-122 (6) Serial I/O Timing (VCC = +5.0 V ± 10%, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C) Symbol tSCYC tSLOV tIVSH tSHIX tSHSL tSLSH tSLOV tIVSH tSHIX Pin SCK SCK, SO SI, SCK SCK, SI SCK External shift SCK, SO clock mode SI, SCK SCK, SI Internal shift clock mode Condition Value Min. 2 tinst* −200 200 200 1 tinst* 1 tinst* 0 200 200 Max.  200     200   Unit µs ns ns ns µs µs ns ns ns Remarks Parameter Serial clock cycle time SCK ↓ → SO time Valid SI → SCK ↑ SCK ↑ → valid SI hold time Serial clock “H” pulse width Serial clock “L” pulse width SCK ↓ → SO time Valid SI → SCK ↑ SCK ↑ → valid SI hold time * : For information on tinst, see “ (4) Instruction Cycle.” 39 MB89130/130A Series • Internal Shift Clock Mode tSCYC SCK 2.4 V 0.8 V tSLOV 2.4 V 0.8 V SO 0.8 V tIVSH 0.8 VCC tSHIX 0.8 VCC 0.2 VCC SI 0.2 VCC • External Shift Clock Mode tSLSH tSHSL 0.8 VCC 0.2 VCC tSLOV 2.4 V 0.2 VCC 0.8 VCC SCK SO 0.8 V tIVSH 0.8 VCC tSHIX 0.8 VCC 0.2 VCC SI 0.2 VCC 40 MB89130/130A Series (7) Peripheral Input Timing (VCC = +5.0 V ± 10%, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C) Symbol tILIH1 tIHIL1 Pin EC, INT0 to INT2 Condition  Value Min. 2 tinst* 2 tinst* Max.   Unit Remarks µs µs Parameter Peripheral input “H” level pulse width 1 Peripheral input “L” level pulse width 1 * : For information on tinst, see “ (4) Instruction Cycle.” tIHIL1 tILIH1 EC, INT0 to INT2 0.8 VCC 0.2 VCC 0.2 VCC 0.8 VCC 41 MB89130/130A Series 5. A/D Converter Electrical Characteristics (AVCC = VCC = +3.5 V to +6.0 V, FCH = 3 MHz, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C) Pin Condition AVR = AVCC = 5.0 V Value Min.     Typ.     AVSS + 0.5 LSB AVR − 1.5 LSB  44 tinst* 12 tinst*    100 Max. 8 ±1.5 ±1.0 ±0.9 AVSS + 2.0 LSB AVR 0.5   10 AVR AVCC 300 Unit bit LSB LSB LSB mV mV LSB µs µs µA V V µA Remarks Parameter Resolution Total error Linearity error Differential linearity error Zero transition voltage Full-scale transition voltage Interchannel disparity A/D mode conversion time Sense mode conversion time Analog port input current Analog input voltage Reference voltage Symbol  VOT — VFST AVR = AVCC AVSS − 1.0 LSB AVR − 3.0 LSB  1LSB = AVR/256    IAIN   IR AN0 to AN3   0 2.0 Reference voltage supply current IRH AVR AVR = AVCC = 5.0 V, when A/D conversion is operating AVR = AVCC = 5.0 V, when A/D conversion is not operating    1 µA * : For information on tinst, see “ (4) Instruction Cycle” in “4. AC Characteristics.” 6. A/D Converter Glossary • Resolution Analog changes that are identifiable by the A/D converter. When the number of bits is 8, analog voltage can be divided into 28 = 256. • Linearity error (unit : LSB) The deviation of the straight line connecting the zero transition point (“0000 0000” ↔ “0000 0001”) with the full-scale transition point (“1111 1111” ↔ “1111 1110”) from actual conversion characteristics • Differential linearity error (unit : LSB) The deviation of input voltage needed to change the output code by 1 LSB from the theoretical value 42 MB89130/130A Series • Total error (unit : LSB) The difference between theoretical and actual conversion values Digital output 1111 1111 1111 1110 Theoretical conversion value Actual conversion value 1 LSB = AVR 256 VNT − (1 LSB × N + VOT) 1 LSB V(N+1)T − VNT 1 LSB −1 (1 LSB × N + VOT) Linearity error = Differential linearity error = Linearity error 0000 0010 0000 0001 0000 0000 VOT VNT V(N+1)T VFST Analog input Total error = VNT − (1 LSB × N + 1 LSB) 1 LSB 43 MB89130/130A Series 7. Notes on Using A/D Converter • lnput impedance of the analog input pins The A/D converter used for the MB89130/130A series contains a sample hold circuit as illustrated below to fetch analog input voltage into the sample hold capacitor for eight instruction cycles after starting A/D conversion. For this reason, if the output impedance of the external circuit for the analog input is high, analog input voltage might not stabilize within the analog input sampling period. Therefore, it is recommended to keep the output impedance of the external circuit low (below 10 kΩ) . Note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of approx. 0.1 µF for the analog input pin. • Analog Input Equivalent Circuit Analog input pin If the analog input impedance is higher than 10 kΩ, it is recommended to connect an external capacitor of approx. 0.1 µF. Sample hold circuit . C = 28 pF . . R = 9 kΩ . Comparator Close for 8 instruction cycles after starting A/D conversion. Analog channel selector • Error The smaller the | AVR − AVSS |, the greater the error would become relatively. 44 MB89130/130A Series s EXAMPLE CHARACTERISTICS (1) “L” Level Output Voltage VOL vs. IOL VOL (V) 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 1 2 VCC = 2.2 V VCC = 2.5 V VCC = 3.0 V VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V VCC – VOH (V) VCC = 2.2 V 1.1 1.0 TA = +25 °C 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 −0.5 −1.0 −1.5 −2.0 0.0 VCC = 2.5 V (2) “H” Level Output Voltage VCC – VOH vs. IOH VCC = 3.0 V VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V TA = +25 °C 3 4 5 6 7 8 9 10 IOL (mA) −2.5 −3.0 IOH (mA) (3) “H” Level Input Voltage/“L” Level Input Voltage (CMOS Input) VIN (V) 5.0 4.5 TA = +25 °C 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 1 2 (4) “H” Level Input Voltage/“L” Level Input Voltage (Hysteresis Input) VIN (V) 5.0 4.5 TA = +25 °C 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 1 2 0 VIN vs. VCC VIN vs. VCC VIHS VILS 3 4 5 6 3 4 5 6 7 VCC (V) 7 VCC (V) VIHS : Threshold when input voltage in hysteresis characteristics is set to “H” level VILS : Threshold when input voltage in hysteresis characteristics is set to “L” level (5) Pull-up Resistance RPULL (kΩ) 1000 TA = +25 °C 300 RPULL vs. VCC 100 50 10 0 1 2 3 4 5 6 7 VCC (V) 45 MB89130/130A Series (6) Power Supply Current (External Clock) ICC1 vs. VCC ICC (mA) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 VCC (V) 0.0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 VCC (V) Divide by 64 1.5 1 0.5 FCH = 4.0 MHz TA = +25 °C Divide by 4(ICC1) ICCS1 (mA) 3 2.5 2 FCH = 4.0 MHz TA = +25 °C Divide by 4(ICCS1) ICCS1 vs. VCC Divide by 64 ICCL (µA) 200 180 160 140 120 100 80 60 40 20 0 1.5 2 2.5 3 ICCL vs. VCC TA = +25 °C ICCLS (µA) 50 45 40 35 30 25 20 15 10 5 0 1.5 ICCLS vs. VCC TA = +25 °C 3.5 4 4.5 5 5.5 6 6.5 VCC (V) 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 VCC (V) ICCT (µA) 30 25 20 15 10 5 0 1.5 ICCT vs. VCC TA = +25 °C IR (µA) 200 180 160 140 120 100 80 60 40 20 IR vs. AVR TA = +25 °C 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 VCC (V) 0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 AVR (V) (Continued) 46 MB89130/130A Series (Continued) IA vs. AVCC FCH = 4 MHz TA = +25 °C IA (mA) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 ICCH (µA) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 ICCH vs. VCC TA = +25 °C 0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 AVCC (V) 0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 VCC (V) 47 MB89130/130A Series s MASK OPTIONS Part number No. Specifying procedure MB89131 Specify when ordering masking Selectable by pin (P40 to P43 must be fixed to no pull-up resistor option when an A/D converter is used.) Selectable MB89133A MB89135A Specify when ordering masking Selectable by pin (P40 to P43 must be fixed to no pull-up resistor option when an A/D converter is used.) Selectable MB89P131 MB89P133A Specify when ordering masking Selectable by pin (P40 to P43 must be fixed to no pull-up resistor option when an A/D converter is used.) Selectable 1 Pull-up resistors •P00 to P07, P10 to P17, •P30 to P37, P40 to P43 Power-on reset •Power-on reset provided •No power-on reset 2 3 Selection of oscillation stabilization time •The oscillation stabilization time initial value is selectable from 4 types Selectable given below. 0 : Oscillation stabilization 22/FCH 1 : Oscillation stabilization 212/FCH 2 : Oscillation stabilization 216/FCH 3 : Oscillation stabilization 218/FCH Reset pin output •Reset output enabled •Reset output disabled Clock mode selection •Single-clock mode •Dual-clock mode Selectable Selectable Selectable 4 Selectable Selectable 5 Selectable Selectable Selectable 6 Selection of oscillation circuit type •Crystal or ceramic oscillation type Selectable •External clock input type Peripheral control clock output function*2 •Not used •Used Selectable Selectable Not required*1 7 Not required*3 Not required*3 *1 : Both external clock and oscillation resonator can be used on the OTPROM product. *2 : “Used” must be selected when P33 (39 pin) is used as SCO for the peripheral control clock output. *3 : The peripheral control clock output function can be used only by software. 48 MB89130/130A Series No. Part number Specifying procedure Pull-up resistors •P00 to P07, P10 to P17, •P30 to P37, P40 to P43 Power-on reset •Power-on reset provided •No power-on reset MB89P135A Set with EPROM programmer MB89PV130A Setting not possible 1 Selectable by pin All pins fixed to no pull-up resis(P40 to P43 must be fixed to no tor option pull-up resistor option.) Selectable Power-on reset provided 2 3 Selection of oscillation stabilization wait time •The oscillation stabilization time initial value is selectable from 4 types given below. Selectable 0 : Oscillation stabilization 22/FCH 1 : Oscillation stabilization 212/FCH 2 : Oscillation stabilization 216/FCH 3 : Oscillation stabilization 218/FCH Reset pin output •Reset output enabled •Reset output disabled Selection of clock mode selection •Single-clock mode •Dual-clock mode Selectable Oscillation stabilization 218/FCH 4 Reset output enabled 5 Selectable Dual-clock mode 6 Selection of oscillation circuit type •Crystal or ceramic oscillation type Not required*1 •External clock input type Peripheral control clock output function*2 •Not used •Used Not required*3 Not required*1 7 Not required*3 *1 : Both external clock and oscillation resonator can be used. *2 : “Used” must be selected when P33 (39 pin) is used as SCO for the peripheral control clock output. *3 : The peripheral control clock output function can be used only by software. 49 MB89130/130A Series s MB89P131/P133A STANDARD OPTIONS No. 1 2 3 4 5 Product option Pull-up resistor Power-on reset Provided MB89P131-101 Not provided for any port MB89P133A-201 Not provided for any port Provided 2 : Oscillation stabilization 216/FCH Enabled Dual-clock mode Selection of oscillation stabiliza2 : Oscillation stabilization 216/FCH tion time Reset pin output Selection of clock mode Enabled Dual-clock mode s ORDERING INFORMATION Part number MB89131PFM MB89133APFM MB89135APFM MB89P131PFM-101 MB89P133APFM-201 MB89P135APFM MB89133AP MB89P133AP-201 MB89PV130ACF-ES Package Remarks 48-pin Plastic QFP (FPT-48P-M13) 48-pin Plastic SH-DIP (DIP-48P-M01) 48-pin Ceramic MQFP (MQP-48C-P01) 50 MB89130/130A Series s PACKAGE DIMENSION 48-pin Plastic QFP (FPT-48P-M13) 13.10±0.40(.516±.016)SQ 10.00±0.20(.394±.008)SQ 36 25 0.17±0.06 (.007±.002) 37 24 Details of "A" part 0.10(.004) 1.95 –0.20 .077 –.008 +0.40 +.016 (Mounting height) INDEX 0~8° 48 13 0.25(.010) 1 12 "A" 0.80±0.20 (.031±.008) 0.88±0.15 (.035±.006) 0.20 –0.20 +0.10 +.004 .008 –.008 (Stand off) 0.80(.031) 0.32±0.05 (.013±.002) 0.20(.008) M C 2001 FUJITSU LIMITED F48023S-c-2-3 Dimensions in mm (inches) (Continued) 51 MB89130/130A Series 48-pin Plastic SH-DIP (DIP-48P-M01) 43.69 –0.30 1.720 –.012 +0.20 +.008 INDEX-1 13.80±0.25 (.543±.010) INDEX-2 5.25(.207) MAX 3.00(.118) MIN +0.50 +.020 0.51(.020)MIN 0.25±0.05 (.010±.002) 1.00 –0 .039 –0 0.45±0.10 (.018±.004) 15.24(.600) TYP 15°MAX 1.778±0.18 (.070±.007) 1.778(.070) MAX 40.894(1.610)REF C 1994 FUJITSU LIMITED D48002S-3C-3 Dimensions in mm (inches) (Continued) 52 MB89130/130A Series (Continued) 48-pin Ceramic MQFP (MQP-48C-P01) 17.20(.677)TYP 15.00±0.25 (.591±.010) 14.82±0.35 (.583±.014) 1.50(.059)TYP 1.00(.040)TYP 8.80(.346)REF 0.80±0.22 (.0315±.0087) PIN No.1 INDEX PIN No.1 INDEX 1.02±0.13 (.040±.005) 10.92 –0.0 .430 –0 +0.13 +.005 7.14(.281) 8.71(.343) TYP TYP PAD No.1 INDEX 0.30(.012)TYP 4.50(.177)TYP 1.10 –0.25 .043 –.010 +0.45 +.018 0.40±0.08 (.016±.003) 0.60(.024)TYP 8.50(.335)MAX 0.15±0.05 (.006±.002) C 1994 FUJITSU LIMITED M48001SC-4-2 Dimensions in mm (inches) 53 MB89130/130A Series FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. 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Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. F0110 © FUJITSU LIMITED Printed in Japan