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MB89P185PF-101

MB89P185PF-101

  • 厂商:

    FUJITSU(富士通)

  • 封装:

  • 描述:

    MB89P185PF-101 - 8-bit Proprietary Microcontroller - Fujitsu Component Limited.

  • 数据手册
  • 价格&库存
MB89P185PF-101 数据手册
FUJITSU SEMICONDUCTOR DATA SHEET DS07-12557-1E 8-bit Proprietary Microcontroller CMOS F2MC-8L MB89180L Series MB89183L/185L/P185/PV180 s DESCRIPTION The MB89180L series is a line of the general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the microcontrollers contain a variety of peripheral functions such as an LCD controller/driver, timers, a serial interface, and external interrupts. s FEATURES • • • • • • • • • • • • • • • • • F2MC-8L family CPU core Dual-clock control system Maximum memory size: 16-Kbyte ROM, 512-byte RAM (Max) Minimum execution time: 0.95 µs/4.2 MHz I/O ports: Max 43 channels 21-bit time-base timer 8/16-bit timer/counter: 2 or 1 channels 8-bit serial I/O: 1 channel External interrupts (wake-up function): Four channels with edge detection plus eight level-interrupt channels Watch prescaler (15 bits) LCD controller/driver: 32 segments × 4 commons (Max 128 pixels) LCD driving reference voltage generator Remote control transmission output Buzzer output Power-on reset function (option) Low-power consumption modes (stop, sleep, and watch mode) CMOS technology MB89180L Series s PACKAGES 64-pin Plastic SQFP 64-pin Plastic QFP 64-pin Plastic QFP (FPT-64P-M03) (FPT-64P-M06) (FPT-64P-M09) 64-pin Ceramic MQFP (MQP-64C-P01) 2 MB89180L Series s PRODUCT LINEUP Part number MB89183L Parameter Classification Mass production products (mask ROM products) One-time PROM product 16 K × 8 bits (internal PROM, programming with general-purpose EPROM programmer) Piggyback/evaluation product (for development) 32 K × 8 bits (external ROM) 512 × 8 bits : 136 : 8 bits : 1 byte to 3 bytes : 1, 8,16 bits : 0.95 µs/4.2 MHz : 8.6 µs to 137.1µs /4.2 MHz MB89185L MB89P185 MB89PV180 ROM size 8 K × 8 bits 16 K × 8 bits (internal mask ROM) (internal mask ROM) 256 × 8 bits Number of instructions Instruction bit length Instruction length Data bit length Minimum execution time Interrupt processing time I/O port (N-ch open-drain) RAM size CPU functions Ports : 8 (6 ports also serve as peripherals, 3 ports are a heavy-current drive type.) Output ports (N-ch open-drain) : 18 (16 ports also serve as segment pins*2, 2 ports also serve as common pins.) I/O ports (CMOS) : 16 (12 ports also serve as an external interrupt, 8 ports also serve as segment pins.) Output ports (CMOS) : 1 (Also serve as peripherals) Total : 43 (Max) 8-bit timer operation (toggled output capable, operating clock cycle 1.9 µs to 487.6 µs) 16-bit timer operation (toggled output capable, operating clock cycle 1.9 µs to 487.6 µs) 8 bits LSB first/MSB first selectability One clock selectable from four operation clocks (one external shift clock, three internal shift clocks: 1.9 µs, 7.6 µs, 30.5 µs) Common output : 4 (Max) Segment output : 32 (Max) *2 Bias power supply pins : 3 LCD display RAM size : 32 × 4 bits Dividing resistor for LCD driving:Built-in (an external resistor selectability) Timer/counter Serial I/O LCD controller/ driver (Continued) 3 MB89180L Series (Continued) Part number MB89183L Parameter External interrupt 1 (wake-up function) External interrupt 2 (wake-up function) Buzzer output Remote control transmission output Standby modes Process Operating voltage EPROM for use *1 : Varies with conditions such as the operating frequency. *2 : See sMASK OPTIONS. 2.2 V to 3.6 V*1 4 independent channels (edge selectability) Rising edge/falling edge selectability Used also for wake-up from stop/sleep mode. (Edge detection is also permitted in stop mode.) “L” level interrupts × 8 channels 1 (7 frequencies are selectable by the software.) 1 (Pulse width and cycle are software selectable.) Subclock mode, sleep mode, stop mode, and watch mode CMOS 2.7 V to 6.0 V MBM27C256A-20TV MB89185L MB89P185 MB89PV180 s PACKAGE AND CORRESPONDING PRODUCTS Package FPT-64P-M03 FPT-64P-M06 FPT-64P-M09 MQP-64C-P01 : Available ×: Not available × × × MB89183L MB89185L MB89P185 × MB89PV180 × × × Note: For more information about each package, see sPACKAGE DIMENSIONS. 4 MB89180L Series s DIFFERENCES AMONG PRODUCTS 1. Memory Size Before evaluating using the piggyback product, verify its differences from the product that will actually be used. Take particular care on the following points: • On the MB89183L, MB89185L and MB89P185, addresses 0180H and later of the register bank cannot be used. • The stack area, etc., is set at the upper limit of the RAM. 2. Current Consumption • In the case of the MB89PV180, add the current consumed by the EPROM which is connected to the top socket. • When operated at low speed, the product with an OTPROM (one-time PROM) or an EPROM will consume more current than the product with a mask ROM. However, the current consumption in the sleep/stop modes is the same. (For more information, see sELECTRICAL CHARACTERISTICS.) 3. Mask Options Functions that can be selected as options and how to designate these options vary by the product. Before using options check sMASK OPTIONS. Take particular care on the following points: • A pull-up resistor cannot be set for P20 to P27, P40 to P47 and P50 to P57 on the MB89P185. • A pull-up resistor is not selectable for P10 to P17, P40 to P47 and P50 to P57 if they are used as LCD pins. • Options are fixed on the MB89PV180. 5 MB89180L Series s PIN ASSIGNMENTS (TOP VIEW) SEG3 SEG2 SEG1 SEG0 COM0 COM1 P31/COM2 P32/COM3 VCC V3 V2 V1 P30/RCO P00/INT20 P01/INT21 P02/INT22 SEG4 SEG5 SEG6 SEG7 P40/SEG8*1 P41/SEG9*1 P42/SEG10*1 P43/SEG11*1 P44/SEG12*1 P45/SEG13*1 P46/SEG14*1 P47/SEG15*1 P50/SEG16*1 P51/SEG17*1 P52/SEG18*1 P53/SEG19*1 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 P03/INT23 P04/INT24 P05/INT25 P06/INT26 P07/INT27 RST X0A X1A MODA X0 X1 P20/EC P21*2 P22/TO P23/SI P24/SO *1 : Selected using the mask option (in units of 4 pins). *2 : N-ch open drain heavy-current drive type For more information on mask option combinations of *1, see sMASK OPTIONS. P54/SEG20*1 P55/SEG21*1 P56/SEG22*1 P57/SEG23*1 P10/SEG24/INT10*1 P11/SEG25/INT11*1 P12/SEG26/INT12*1 VSS P13/SEG27/INT13*1 P14/SEG28*1 P15/SEG29*1 P16/SEG30*1 P17/SEG31*1 P27/BUZ*2 P26*2 P25/SCK 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 (FPT-64P-M03) (Continued) 6 MB89180L Series (TOP VIEW) SEG3 SEG2 SEG1 SEG0 COM0 COM1 P31/COM2 P32/COM3 VCC V3 V2 V1 P30/RCO P00/INT20 P01/INT21 P02/INT22 SEG4 SEG5 SEG6 SEG7 P40/SEG8*1 P41/SEG9*1 P42/SEG10*1 P43/SEG11*1 P44/SEG12*1 P45/SEG13*1 P46/SEG14*1 P47/SEG15*1 P50/SEG16*1 P51/SEG17*1 P52/SEG18*1 P53/SEG19*1 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 P03/INT23 P04/INT24 P05/INT25 P06/INT26 P07/INT27 RST X0A X1A MODA X0 X1 P20/EC P21*2 P22/TO P23/SI P24/SO *1: Selected using the mask option (in units of 4 pins). *2: N-ch open drain heavy-current drive type For more information on mask option combinations of *1, see sMASK OPTIONS. P54/SEG20*1 P55/SEG21*1 P56/SEG22*1 P57/SEG23*1 P10/SEG24/INT10*1 P11/SEG25/INT11*1 P12/SEG26/INT12*1 VSS P13/SEG27/INT13*1 P14/SEG28*1 P15/SEG29*1 P16/SEG30*1 P17/SEG31*1 P27/BUZ*2 P26*2 P25/SCK 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 (FPT-64P-M09) (Continued) 7 MB89180L Series (Top view) SEG2 SEG1 SEG0 COM0 COM1 P31/COM2 P32/COM3 VCC V3 V2 V1 P30/RCO P00/INT20 SEG3 SEG4 SEG5 SEG6 SEG7 P40/SEG8*1 P41/SEG9*1 P42/SEG10*1 P43/SEG11*1 P44/SEG12*1 P45/SEG13*1 P46/SEG14*1 P47/SEG15*1 P50/SEG16*1 P51/SEG17*1 P52/SEG18*1 P53/SEG19*1 P54/SEG20*1 P55/SEG21*1 64 63 62 61 60 59 58 57 56 55 54 53 52 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 P01/INT21 P02/INT22 P03/INT23 P04/INT24 P05/INT25 P06/INT26 P07/INT27 RST X0A X1A MODA X0 X1 P20/EC P21*2 P22/TO P23/SI P24/SO P25/SCK P56/SEG22*1 P57/SEG23*1 P10/SEG24/INT10*1 P11/SEG25/INT11*1 P12/SEG26/INT12*1 VSS P13/SEG27/INT13*1 P14/SEG28*1 P15/SEG29*1 P16/SEG30*1 (FPT-64P-M06) *1: Selected using the mask option (in units of 4 pins). *2: N-ch open drain heavy-current drive type For more information on mask option combinations of *1, see sMASK OPTIONS. P17/SEG31*1 P27/BUZ*2 P26*2 (Continued) 8 MB89180L Series (Continued) (Top view) SEG2 SEG1 SEG0 COM0 COM1 P31/COM2 P32/COM3 VCC V3 V2 V1 P30/RCO P00/INT20 SEG3 SEG4 SEG5 SEG6 SEG7 P40/SEG8*1 P41/SEG9*1 P42/SEG10*1 P43/SEG11*1 P44/SEG12*1 P45/SEG13*1 P46/SEG14*1 P47/SEG15*1 P50/SEG16*1 P51/SEG17*1 P52/SEG18*1 P53/SEG19*1 P54/SEG20*1 P55/SEG21*1 64 63 62 61 60 59 58 57 56 55 54 53 52 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 P01/INT21 P02/INT22 P03/INT23 P04/INT24 P05/INT25 P06/INT26 P07/INT27 RST X0A X1A MODA X0 X1 P20/EC P21*2 P22/TO P23/SI P24/SO P25/SCK *1: Selected using the mask option (in units of 4 pins). *2: N-ch open drain heavy-current drive type Pin assignment on package top (MB89PV180 only) Pin no. Pin Pin no. Pin Pin no. Pin Pin no. Pin 65 N.C. 73 A2 81 N.C. 89 OE 66 V 74 A1 82 O4 90 N.C. 67 A12 75 A0 83 O5 91 A11 68 A7 76 N.C. 84 O6 92 A9 69 A6 77 O1 85 O7 93 A8 70 A5 78 O2 86 O8 94 A13 71 A4 79 O3 87 CE 95 A14 72 A3 80 VSS 88 A10 96 VCC N.C.: Internally connected. Do not use. For more information on mask option combinations of *1, see sMASK OPTIONS. PP P56/SEG22*1 P57/SEG23*1 P10/SEG24/INT10*1 P11/SEG25/INT11*1 P12/SEG26/INT12*1 VSS P13/SEG27/INT13*1 P14/SEG28*1 P15/SEG29*1 P16/SEG30*1 P17/SEG31*1 P27/BUZ*2 P26*2 (MQP-64C-M01) 9 MB89180L Series s PIN DESCRIPTION Pin no. SQFP*1 QFP*2 39 38 40 MQFP*3 QFP*4 40 39 41 Pin name X0 X1 MODA A I/O circuit type Function Crystal or other resonator connector pins for the main clock. The external clock can be connected to X0. When this is done, be sure to leave X1 open. Memory access mode setting pin. Connect directly to VSS. Reset I/O pin. This pin is an N-ch open-drain output type with a pull-up resistor, and a hysteresis input type. “L” is output from this pin by an internal reset request (optional). The internal circuit is initialized by the input of “L”. General-purpose I/O ports. Also serve as an external interrupt 2 input (wake-up function). External interrupt 2 input is hysteresis input. General-purpose I/O ports. Also serve as input for external interrupt 1 input. The interrupt 1 input is a hysteresis type. Also serve as LCD controller/driver segment output. Switching is done by the mask option. General-purpose I/O ports. Also serve as LCD controller/driver segment output. Switching is done by the mask option. General-purpose N-ch open-drain I/O port. Also serves as the external clock input for the 8-bit timer counter. The resource is a hysteresis input type. General-purpose N-ch open-drain I/O port. General-purpose N-ch open-drain I/O port. Also servers as the 8-bit timer/counter output. N-ch open-drain general-purpose I/O port. Also serves as the data input for the serial I/O. The peripheral is a hysteresis input type. N-ch open-drain general-purpose I/O port. Also serves as the data output for the 8-bit serial I/O. N-ch open-drain general-purpose I/O port. Also serves as the clock I/O for the 8-bit serial I/O. The peripheral is a hysteresis input type. N-ch open-drain general-purpose I/O port. C 43 44 RST D 44 to 51 45 to 52 P07/INT27 to P00/INT20 P10/SEG24/ INT10 to P12/SEG26/ INT12 P13/SEG27/ INT13 P14/SEG28 to P17/SEG31 E 21 to 23 22 to 24 E/K 25 26 26 to 29 27 to 30 F/K 37 36 35 38 37 36 P20/EC P21 P22/TO H I I 34 35 P23/SI H 33 34 P24/SO I 32 31 33 32 P25/SCK P26 H I (Continued) 10 MB89180L Series (Continued) Pin no. SQFP QFP*2 30 52 *1 MQFP QFP*4 31 53 *3 Pin name I/O circuit type I G Function N-ch open-drain general-purpose I/O port. Also serves as buzzer output. General-purpose output-only port. Also serves as a remote control transmit output. N-ch open-drain general-purpose output ports. Also serve as an LCD controller/driver segment output. Switching between port and segment output is done by the mask option. P27/BUZ P30/RCO P50/SEG16 to P57/SEG23 P40/SEG8 to P47/SEG15 SEG7 to SEG0 P32/COM3, P31/COM2 COM1, COM0 V1, V2, V3 X0A X1A Vcc Vss 13 to 20 14 to 21 J/K 5 to 12 6 to 13 J/K 61 to 64 62 to 64 1 to 4 1 to 5 57, 58 59, 60 53, 54, 55 42 41 56 24 58, 59 60, 61 54, 55, 56 43 42 57 25 K L K  B   LCD controller/driver segment output-only pins. N-ch open-drain general-purpose output ports. Also serve as an LCD controller/driver common output pins. LCD controller/driver common output-only pins. LCD driving power supply pins. Subclock crystal oscillator pins (32.768 kHz) Power supply pin. Power supply (GND) pin. *1 : FPT-64P-M03 *2 : FPT-64P-M09 *3 : MQP-64C-P01 *4 : FPT-64P-M06 11 MB89180L Series • External EPROM pins (MB89PV180 only) Pin no. 66 67 68 69 70 71 72 73 74 75 77 78 79 80 82 83 84 85 86 87 88 89 91 92 93 94 95 96 65 76 81 90 Pin name VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 Vss O4 O5 O6 O7 O8 CE A10 OE A11 A9 A8 A13 A14 Vcc I/O O “H” level output pin Function O Address output pins I O Data input pins Power supply (GND) pin I Data input pins O O O ROM chip enable pin Outputs “H” during standby. Address output pin ROM output enable pin Outputs “L” at all times. O Address output pins O O O EPROM power supply pin Internally connected pins Be sure to leave them open. N.C. — 12 MB89180L Series s I/O CIRCUIT TYPE Type X1 N-ch P-ch Circuit Remarks Main clock (main clock crystal oscillator) • At an oscillation feedback resistor of approximately 1 MΩ • CR oscillation is selectable. (MB8918X only) A X0 P-ch N-ch X1A N-ch P-ch B X0A P-ch N-ch N-ch Subclock (subclock crystal oscillator) • At an oscillation feedback resistor of approximately 4.5 MΩ C R • Hysteresis input • The pull-down resistor (R) is approximately 50 kΩ for MB89183L/185L only. • At an output pull-up resistor (P-ch) of approximately 50 kΩ • Hysteresis input R P-ch D N-ch R P-ch P-ch • • • • E N-ch Port Peripheral CMOS output CMOS input The peripheral is a hysteresis input type. Pull-up resistor optional (except MB89PV180) Approximately 50 kΩ R P-ch P-ch F N-ch Port • CMOS output • CMOS input • Pull-up resistor optional (except MB89PV180) Approximately 50 kΩ (Continued) 13 MB89180L Series (Continued) Type Circuit P-ch Remarks • CMOS output • P-ch output is a heavy-current drive type. G N-ch R P-ch • • • • N-ch Port Peripheral H N-ch open-drain output CMOS input The peripheral is a hysteresis input type. Pull-up resistor optional (except MB89P185, and MB89PV180) Approximately 50 kΩ R P-ch I N-ch Port R • N-ch open-drain output • CMOS input • P21, P26, and P27 are a heavy-current drive type. • Pull-up resistor optional (except MB89P185 and MB89PV180) Approximately 50 kΩ • N-ch open-drain output • Pull-up resistor optional (except MB89P185 and MB89PV180) Approximately 50 kΩ P-ch J N-ch P-ch N-ch • LCD controller/driver common/segment output K P-ch N-ch • N-ch open-drain output • Common output N-ch P-ch N-ch P-ch N-ch L 14 MB89180L Series s HANDLING DEVICES 1. Preventing Latchup Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins other than medium- to high-voltage pins or if higher than the voltage which shows on “1. Absolute Maximum Ratings” in sELECTRICAL CHARACTERISTICS is applied between VCC to VSS. When latchup occurs, power supply current increases rapidly and might thermally damage elements. When using, take great care not to exceed the absolute maximum ratings. 2. Treatment of Unused Input Pins Leaving unused input pins open could cause malfunctions. They should be connected to a pull-up or pull-down resistor. 3. Treatment of N.C. Pin Be sure to leave (internally connected) N.C. pins open. 4. Power Supply Voltage Fluctuations Although VCC power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied to the IC is therefore important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P value) will be less than 10% of the standard VCC value at the commercial frequency (50 Hz to 60 Hz) and the transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is switched. 5. Precautions when Using an External Clock Even when an external clock is used, oscillation stabilization time is required for power-on reset (optional) and wake-up from stop mode. 6. Note to Noise in the External Reset Pin (RST) If the reset pulse applied to the external reset pin (RST) does not meet the specifications, it may cause malfunctions. Use caution so that the reset pulse less than the specifications will not be fed to the external reset pin (RST) . 15 MB89180L Series s PROGRAMMING TO THE EPROM ON THE MB89P185 The MB89P185 is an OTPROM version of the MB89180L series. 1. Features • 16-Kbyte PROM on chip • Options can be set using the EPROM programmer. • Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer) 2. Memory Space Memory space in each mode such as 16-Kbyte PROM, option area is diagrammed below. Address 0000H I/O 0080H RAM 0180H Not available 8000H 0000H Not available 3FF0H Option area Not available 3FF6H Not available C000H 4000H Single-chip EPROM mode (Corresponding addresses on the EPROM programmer) PROM 16 KB EPROM 16 KB FFFFH 7FFFH 3. Programming to the EPROM In EPROM mode, the MB89P185 functions equivalent to the MBM27C256A. This allows the PROM to be programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by using the dedicated socket adapter. When the operating area for a single chip is 16 Kbyte (C000H to FFFFH) the PROM can be programmed as follows: • Programming procedure (1) Set the EPROM programmer to the MBM27C256A. (2) Load program into the EPROM programmer at 4000H to 7FFFH. (Note that addresses C000H to FFFFH while operating as a single chip assign to 4000H to 7FFFH in EPROM mode.) Load option data into address 3FF0H to 3FF5H of the EPROM programmer. (For information about each corresponding option, see “7. Setting OTPROM Options.”) (3) Program with the EPROM programmer. 16 MB89180L Series 4. Recommended Screening Conditions High-temperature aging is recommended as the pre-assembly screening procedure for a product with a blanked OTPROM microcomputer program. Program, verify Aging +150 ˚C, 48 h Data verification Assembly 5. Programming Yield All bits cannot be programmed at Fujitsu shipping test to a blanked OTPROM microcomputer, due to its nature. For this reason, a programming yield of 100% cannot be assured at all times. 6. EPROM Programmer Adapter Socket Package FPT-64P-M09 FPT-64P-M06 Compatible adapter socket ROM-64QF2-28DP-8L2 ROM-64QF-28DP-8L3 17 MB89180L Series 7. Setting OTPROM Options The programming procedure is the same as that for the PROM. Options can be set by programming value at the addresses shown on the memory map. The relationship between bits and options is shown on the following bit map: • OTPROM option bit map Bit 7 Vacancy 3FF0H Readable P07 Pull-up 3FF1H 1: No 0: Yes P17 Pull-up 3FF2H 1: No 0: Yes Vacancy 3FF3H Readable Vacancy 3FF4H Readable Vacancy 3FF5H Readable Readable Readable Readable Readable Readable Readable Readable Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable Vacancy Readable P06 Pull-up 1: No 0: Yes P16 Pull-up 1: No 0: Yes Vacancy Bit 6 Vacancy Bit 5 Bit 4 Bit 3 Vacancy Bit 2 Reset pin output 1: Yes 0: No P02 Pull-up 1: No 0: Yes P12 Pull-up 1: No 0: Yes Vacancy Bit 1 Clock mode selection 1: Dual clock 0: Single clock P01 Pull-up 1: No 0: Yes P11 Pull-up 1: No 0: Yes Vacancy Bit 0 Power-on reset 1: Yes 0: No P00 Pull-up 1: No 0: Yes P10 Pull-up 1: No 0: Yes Vacancy Oscillation stabilization time WTM1 WTM0 See sMASK OPTIONS. Readable P05 Pull-up 1: No 0: Yes P15 Pull-up 1: No 0: Yes Vacancy P04 Pull-up 1: No 0: Yes P14 Pull-up 1: No 0: Yes Vacancy P03 Pull-up 1: No 0: Yes P13 Pull-up 1: No 0: Yes Vacancy Notes : • Set each bit to 1 to erase. • Do not write 0 to the vacant bit. The read value of the vacant bit is 1, unless 0 is written to it. • Address 3FF6H cannot be read and should not be accessed. 18 MB89180L Series s PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE 1. EPROM for Use MBM27C256A-20TV 2. Programming Socket Adapter To program to the PROM using an EPROM programmer, use the socket adapter (manufacturer: Sun Hayato Co., Ltd.) listed below. Package Adapter socket part number LCC-32 (Rectangle) LCC-32 (Square) ROM-32LC-28DP-YG ROM-32LC-28DP-S Inquiry: Sunhayato Corp. : TEL : 81-3-3984-7791 FAX : 81-3-3971-0535 E-mail : adapter@sunhayato.co.jp 3. Memory Space Memory space in each mode, such as 16-Kbyte PROM, option area is diagrammed below. Normal operation mode 0000H I/O 0080H RAM 0280H Not available 8000H Not available C000H PROM (16KB) FFFFH (Corresponding addresses on the EPROM programmer) 0000H Not available 4000H EPROM (16KB) 7FFFH 4. Programming to the EPROM (1) Set the EPROM programmer to the MBM27C256A. (2) Load program data into the EPROM programmer at 4000H to 7FFFH. (3) Program to 4000H to 7FFFH with the EPROM programmer. 19 MB89180L Series s BLOCK DIAGRAM Main clock X0 X1 Oscillator (Max 4.2 MHz) Clock controller N-ch open-drain I/O port P26*2 8-bit timer/counter 1 (Timer 1) 8-bit timer/counter 2 (Timer 2) P22/TO P21*2 P20/EC Subclock X0A X1A Low-power oscillator (32.768 kHz) 21-bit timebase timer P00/INT20 to P07/INT27 Port 2 8-bit serial I/O Port 0 8 8 External interrupt 2 (wake-up function) CMOS I/O port P25/SCK P24/SO P23/SI P27*2/BUZ 4 Buzzer output P30/RCO P31/COM2 P32/COM3 Remote control transmission output Internal data bus CMOS I/O port External interrupt 1 (wake-up function) 4 P14 to P17 P10/INT10 to P13/INT13 SEG28*1 to SEG31*1 (also serve as P14 to P17) SEG24*1 to SEG27*1 (also serve as P10 to P13) Port 3 4 Port 1 N-ch open-drain output port (Only P30 for CMOS output port) 4 4 8 RST Reset circuit (Watchdog timer) 8 SEG0 to SEG7 COM0 to COM1 P31/COM2 P32/COM3 V1 to V3 RAM LCD controller/driver 2 F2MC-8L CPU 3 16 Port 4 and Port 5 ROM 32 × 4-bit display RAM (16 bytes) 4 4 4 P57/SEG23*1 to P54/SEG20*1 P53/SEG19*1 to P50/SEG16*1 P47/SEG15*1 to P44/SEG12*1 P43/SEG11*1 to P40/SEG8*1 MODA Vcc Vss Other pins MODA Vcc Vss 4 N-ch open-drain output port *1: The segment or port function is selected by the mask option. *2: N-ch open-drain heavy-current drive type. 20 MB89180L Series s CPU CORE 1. Memory Space The microcontrollers of the MB89180L series offer a memory space of 64 Kbytes for storing all of I/O, data, and program areas. The I/O area is located at the lowest address. The data area is provided immediately above the I/O area. The data area can be divided into register, stack, and direct areas according to the application. The program area is located at exactly the opposite end, that is, near the highest address. Provide the tables of interrupt reset vectors and vector call instructions toward the highest address within the program area. The memory space of the MB89180L series is structured as illustrated below. Memory Space MB89183L MB89185L MB89P185 0000H I/O 0080H RAM 0100H Registers 0000H I/O 0080H RAM 0100H Registers 0000H 0080H MB89PV180 I/O RAM 0100H Registers 0180H 0180H 0200H 0280H Access prohibited Access prohibited Access prohibited 8000H C000H E000H ROM FFC0H FFFFH External ROM ROM FFC0H FFFFH FFC0H FFFFH Vector table (reset, interrupt, vector call instruction) 21 MB89180L Series 2. Registers The F2MC-8L family has two types of registers; dedicated registers in the CPU and general-purpose registers in the memory. The following dedicated registers are provided: Program counter (PC) Accumulator (A) : A 16-bit register for indicating instruction storage positions : A 16-bit temporary register for storing arithmetic operations, etc. When the instruction is an 8-bit data processing instruction, the lower byte is used. Temporary accumulator (T) : A 16-bit register which performs arithmetic operations with the accumulator. When the instruction is an 18-bit data processing instruction, the lower byte is used. Index register (IX) Extra pointer (EP) Stack pointer (SP) Program status (PS) : A 16-bit register for index modification : A 16-bit pointer for indicating a memory address : A 16-bit register for indicating a stack area : A 16-bit register for storing a register pointer, a condition code 16 bits PC A T IX EP SP PS : Program counter : Accumulator : Temporary accumulator : Index register : Extra pointer : Stack pointer : Program status Initial value FFFDH Undefined Undefined Undefined Undefined Undefined I-flag = 0, IL1, 0 = 11 Other bits are undefined. The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for use as a condition code register (CCR). (See the diagram below.) Structure of the Program Status Register 15 PS 14 13 RP 12 11 10 9 8 7 H 6 I 5 4 3 N 2 Z 1 V 0 C Vacancy Vacancy Vacancy IL1, 0 RP CCR 22 MB89180L Series The RP indicates the address of the register bank currently in use. The relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. Rule for Conversion of Actual Addresses of the General-purpose Register Area RP Lower OP codes b1 ↓ b0 ↓ “0” “0” “0” “0” “0” “0” “0” “1” R4 R3 R2 R1 R0 b2 ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ Generated addresses A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and bits for control of CPU operations at the time of an interrupt. H-flag I-flag IL1, 0 : Set when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared otherwise. This flag is for decimal adjustment instructions. : Interrupt is allowed when this flag is set to 1. Interrupt is prohibited when the flag is set to 0. Set to 0 when reset. : Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is higher than the value indicated by this bit. IL0 0 1 0 1 Interrupt level 1 2 3 Low = no interrupt High-low High IL1 0 0 1 1 N-flag Z-flag V-flag C-flag : Set if the MSB is set to 1 as the result of an arithmetic operation. Cleared when the bit is set to 0. : Set when an arithmetic operation results in 0. Cleared otherwise. : Set if the complement on 2 overflows as a result of an arithmetic operation. Reset if the overflow does not occur. : Set when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared otherwise. Set the shift-out value in the case of a shift instruction. 23 MB89180L Series The following general-purpose registers are provided: General-purpose registers: An 8-bit register for storing data The general-purpose registers are 8 bits and located in the register banks of the memory. One bank contains eight registers. Up to a total of 16 banks can be used on the MB89183L, MB89185L and MB89P185 (RAM 256 × 8 bits), and a total of 32 banks can be used on the MB89PV180 (RAM 512 × 8 bits). The bank currently in use is indicated by the register bank pointer (RP). Note : The number of register banks that can be used varies with the RAM size. Register Bank Configuration This address = 0100H + 8 × (RP) R0 R1 R2 R3 R4 R5 R6 R7 16 banks (MB89183L) 32 banks (MB89185L) Memory area 24 MB89180L Series s I/O MAP Address 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H to 13H 14H 15H 16H to 17H 18H 19H 1AH 1BH 1CH 1DH 1EH to 2FH (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) T2CR T1CR T2DR T1DR SMR SDR (R/W) (R/W) RCR1 RCR2 (R/W) (R/W) (R/W) PDR4 PDR5 BUZR (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) SYCC STBC WDTC TBTC WPCR PDR3 Read/write (R/W) (W) (R/W) (W) (R/W) (W) Register name PDR0 DDR0 PDR1 DDR1 PDR2 DDR2 Register description Port 0 data register Port 0 data direction register Port 1 data register Port 1 data direction register Port 2 data register Port 2 data direction register Vacancy System clock control register Standby control register Watchdog timer control register Time-base timer control register Watch prescaler control register Port 3 data register Vacancy Port 4 data register Port 5 data register Buzzer register Vacancy Remote control transmission register 1 Remote control transmission register 2 Vacancy Timer 2 control register Timer 1 control register Timer 2 data register Timer 1 data register Serial mode register Serial data register Vacancy (Continued) 25 MB89180L Series (Continued) Address 30H 31H 32H 33H 34H to 5FH 60H to 6FH 70H to 71H 72H 73H to 7BH 7CH 7DH 7EH 7FH (W) (W) (W) Access prohibited ILR1 ILR2 ILR3 ITR (R/W) LCR1 (R/W) VRAM Read/write (R/W) (R/W) (R/W) (R/W) Register name EIE1 EIF1 EIE2 EIF2 Register description External interrupt 1 enable register 1 External interrupt 1 flag register 1 External interrupt 2 enable register 2 External interrupt 2 flag register 2 Vacancy Display data RAM Vacancy LCD controller/driver control register 1 Vacancy Interrupt level setting register 1 Interrupt level setting register 2 Interrupt level setting register 3 Interrupt test register Note : Do not use vacancies. 26 MB89180L Series s ELECTRICAL CHARACTERISTICS 1. Absolute Maximum Ratings (VSS = 0.0 V) Parameter Power supply voltage Symbol VCC Rating Min VSS – 0.3 VSS – 0.3 VSS – 0.3 LCD power supply voltage V1 to V3 VSS – 0.3 VSS + 7.0 V Max VSS + 4.0 VSS + 7.0 VSS + 4.0 Unit V V V Remarks For MB89183L/185L For MB89PV180/P185 For MB89183L/185L V1 to V3 must not exceed VCC. For MB89PV180/P185 V1 to V3 must not exceed VCC. VI1 must not exceed VSS + 4.0 V for MB89183L/185L and VSS + 7.0 V for MB89PV180/P185. All pins except P20 to P27 without a pull-up resistor P20 to P27 without a pull-up resistor for MB89183L/185L P20 to P27 without a pull-up resistor for MB89PV180/P185 VO1 must not exceed VSS + 4.0 V for MB89183L/185L and VSS + 7.0 V for MB89PV180/P185. All pins except P20 to P27, P40 to P47, and P50 to P57 without a pull-up resistor P20 to P27, P40 to P47, and P50 to P57 without a pull-up resistor for MB89183L/185L P20 to P27, P40 to P47, and P50 to P57 without a pull-up resistor for MB89PV180/P185 All pins except P21, P26, and P27 P21, P26, and P27 All pins except P21, P26, P27, and power supply pins Average value (operating current × operating rate) P21, P26, and P27 Average value (operating current × operating rate) Peak value Average value (operating current × operating rate) VI1 Input voltage VSS – 0.3 VCC + 0.3 V VSS – 0.3 VI2 VSS – 0.3 VSS + 4.0 VSS + 7.0 V V VO1 VSS – 0.3 VCC + 0.3 V Output voltage VSS – 0.3 VO2 VSS – 0.3 IOL1 IOL2    VSS + 7.0 10 20 V mA mA VSS + 4.0 V “L” level maximum output current IOLAV1 “L” level average output current IOLAV2 “L” level total maximum output current “L” level total average output current ΣIOL ΣIOLAV 4 mA    8 mA 80 40 mA mA (Continued) 27 MB89180L Series (Continued) Parameter Symbol IOH1 IOH2 Value Min   — Max –5 –10 Unit mA mA Remarks All pins except P30 and power supply pins P30 All pins except P30 and power supply pins Average value (operating current × operating rate) P30 Average value (operating current × operating rate) Peak value Average value (operating current × operating rate) “H” level maximum output current IOHAV1 “H” level average output current IOHAV2 “H” level total maximum output current “H” level total average output current Power consumption Operating temperature Storage temperature ΣIOH ΣIOHAV PD TA Tstg –2 mA — –4 mA — — — –40 –55 –20 –10 300 +85 +150 mA mA mW °C °C WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. 2. Recommended Operating Conditions (VSS = 0.0 V) Parameter Symbol Value Min 2.2 2.7 Power supply voltage VCC 1.5 1.5 3.6 6.0 V V Max 3.6 6.0 Unit V V Remarks Normal operation assurance range for MB89183L/185L Normal operation assurance range for MB89PV180 and MB89P185 Retains the RAM state in stop mode for MB89183L/185L Retains the RAM state in stop mode for MB89PV180 and MB89P185 V1 to V3 pins LCD power supply range (The optimum value dependent on the LCD element in use.) LCD power supply voltage V1 to V3 VSS VCC* V °C Operating temperature TA –40 +85 * : The liquid-crystal power supply range and optimum value vary depending on the characteristics of the liquidcrystal display element used. 28 MB89180L Series Operating Voltage (V) 6.0 5.0 4.0 3.5 3.0 2.7 2.2 2.0 1.0 Main clock operating Freq. (MHz) 1.0 4.0 2.0 2.0 3.0 1.33 4.0 4.2 1.0 Min execution time (inst. cycle) (µs) Operating Voltage vs. Main Clock Operating Frequency (MB89PV180/P185) 29 MB89180L Series Operating Voltage (V) 4.5 4.0 3.6 3.0 2.2 2.0 1.0 Main clock operating Freq. (MHz) 1.0 4.0 2.0 2.0 3.0 1.33 4.0 4.2 1.0 Min execution time (inst. cycle) (µs) Operating Voltage vs. Main Clock Operating Frequency (MB89183L/185L) “Operating Voltage vs. Main Clock Operating Frequency (MB89PV180/P185) and (MB89183L/185L) ” indicate the operating frequency of the external oscillator at an instruction cycle of 4/FCH. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 30 MB89180L Series 3. DC Characteristics (1) Pin DC characteristics (VCC = +3.0 V for MB89183L/185L; +5.0 V for MB89PV180/P185, VSS = 0.0 V, TA = –40°C to +85°C) Parameter Symbol VIH “H” level input voltage VIHS Pin P00 to P07, P10 to P17, P20 to P27 RST, MODA, EC, SI, SCK, INT10 to INT13, INT20 to INT27 P00 to P07, P10 to P17, P20 to P27 RST, MODA, EC, SI, SCK, INT10 to INT13, INT20 to INT27 Condition Value Min 0.7 VCC Typ  Max VCC + 0.3 Unit Remarks V CMOS input 0.8 VCC  VCC + 0.3 V Hysteresis input VIL “L” level input voltage VILS VSS − 0.3 VSS − 0.3  0.3 VCC V CMOS input   0.2 VCC V Hysteresis input For MB89183L/ 185L, P20 to P27, P40 to P47, and P50 to P57 without pull-up resistor only For MB89PV180/ P185, P20 to P27, P40 to P47, and P50 to P57 without pull-up resistor only MB89183L/185L MB89PV180/P185 MB89183L/185L MB89PV180/P185 VSS − 0.3 Open-drain output pin application voltage VD1 P20 to P27, P31, P32, P40 to P47, P50 to P57 VSS − 0.3  VSS + 4.0 V  VSS + 6.0  VOH1 “H” level output voltage VOH2 P00 to P07, P10 to P17 P30 IOH = –2.0 mA IOH = –2.0 mA IOH = –8.0 mA IOH = –6.0 mA 2.2 2.4 2.2 4.0         V V V V VOL “L” level output voltage VOL2 VOL3 P00 to P07, P10 to P17, P20,P22 to P25, IOL = 1.8 mA P30 to P32, P40 to P47, P50 to P57 P21, P26, P27 RST IOL = 8.0 mA IOL = 4.0 mA IOL = 4.0 mA   0.4 V       0.4 0.4 0.6 V V V MB89183L/185L MB89PV180/P185 (Continued) 31 MB89180L Series (Continued) Parameter Symbol ILI1 Pin P00 to P07, P10 to P17, P30, MODA Condition Value Min  Typ  Max ±5 Unit Remarks Without pull-up resistor Without pull-up resistor for MB89183L/ 185L Without pull-up resistor for MB89PV180/ P185 0.45 V < VI < VCC µA Input leakage current (High-Z output leakage current) ILI2 P20 to P27, P31, P32, P40 to P47, P50 to P57 0.45 V < VI < 4.0 V — — ±5 µA 0.45 V < VI < 6.0 V — — ±5 µA Pull-up resistance RPULL P00 to P07, P10 to P17, P20 to P27, P40 to P47, P50 to P57, RST VI = 0.0 V 25 50 100 kΩ With pull-up resistor Common output RVCOM COM0 to COM3 impedance V1 to V3 = +3.0 V V1 to V3 = +5.0 V V1 to V3 = +3.0 V V1 to V3 = +5.0 V Between VCC and VSS — — — — — 300 — — — — 500 2.5 2.5 15 15 750 ±1 — kΩ kΩ kΩ kΩ kΩ µA pF MB89183L/ 185L MB89PV180/ P185 MB89183L/ 185L MB89PV180/ P185 Segment output RVSEG SEG0 to SEG31 impedance LCD divided resistance LCD controller/ driver leakage current Input capacitance RLCD — V1 to V3, COM0 to COM3, SEG0 to SEG31 Other than VCC, VSS ILCDL — — CIN f = 1 MHz — 10 Note : For pins which serve as the segment (SEG8 to SEG31) and ports (P40 to P47, P50 to P57 and P10 to P17), see the port parameter when these pins are used as ports and the segment parameter when they are used as segments. 32 MB89180L Series (2) Power Supply Current Characteristics (VSS = 0.0 V, TA = –40°C to +85°C) Parameter Symbol Pin Condition FCH = 4.2 MHz, VCC = 3.0 V, tinst = 4/FCH, Main clock operation mode FCH = 4.2 MHz, VCC = 5.0 V, tinst = 4/FCH, Main clock operation mode FCH = 4.2 MHz, VCC = 3.0 V, tinst = 64/FCH, Main clock operation mode FCH = 4.2 MHz, VCC = 3.0 V, tinst = 4/FCH, Main clock sleep mode FCH = 4.2 MHz, VCC = 5.0 V, tinst = 4/FCH, Main clock sleep mode FCH = 4.2 MHz, VCC = 3.0 V, tinst = 64/FCH, Main clock sleep mode FCL = 32.768 kHz, tinst = 2/FCL, TA = +25°C, VCC = 3.0 V, Subclock operation mode FCL = 32.768 kHz, tinst = 2/FCL, TA = +25°C, VCC = 3.0 V, Subclock sleep mode FCL = 32.768 kHz, TA = +25°C, VCC = 3.0 V, Watch mode TA = +25°C, VCC = 3.0 V, Stop mode TA = +25°C, VCC = 5.0 V, Stop mode Value Min — — — — — — — Typ 1.3 3.0 3.8 0.18 0.25 0.85 0.32 Max 2.5 4.5 6.0 0.7 0.4 1.4 1 Unit Remarks MB89183L, MB89185L mA ICC1 mA MB89PV180 mA MB89P185 mA MB89183L, MB89185L ICC2 mA MB89PV180 mA MB89P185 mA MB89183L, MB89185L MB89PV180, MB89P185 MB89183L, MB89185L MB89PV180, MB89P185 ICCS1 — — — — — — — — — — — 0.8 0.1 0.2 0.05 0.65 10 25 5 10 1 0.1 1.2 0.3 0.3 0.1 1.1 20 50 15 15 10 10 mA mA mA Power supply current* ICCS2 VCC ICCL MB89183L, mA MB89185L, MB89PV180 mA MB89P185 µA µA µA µA µA µA MB89183L, MB89185L MB89PV180, MB89P185 MB89183L, MB89185L MB89P185, MB89PV180 MB89183L, MB89185L MB89PV180, MB89P185 ICCSL ICCT ICCH * : The power supply current is measured at the external clock, open output pins, and the external LCD dividing resistor (or external input for the reference voltage). In the case of the MB89PV180, the current consumed by the connected EPROM and ICE is not included. 33 MB89180L Series 4. AC Characteristics (1) Reset Timing (MB89183L/185L : VCC = +3.0 V ±10 %, VSS = 0.0 V, TA = –40°C to +85°C) (MB89PV180/P185 : VCC = +5.0 V ±10 %, VSS = 0.0 V, TA = –40°C to +85°C) Value Symbol Condition Unit Remarks Min Max tZLZH — 48 tXCYL — ns Parameter RST “L” pulse width Notes : • tHCYL is the main clock oscillator period. • If the reset pulse applied to the external reset pin (RST) does not meet the specifications, it may cause malfunctions. Use caution so that the reset pulse less than the specifications will not be fed to the external reset pin (RST) . tZLZH RST 0.2 VCC 0.2 VCC (2) Power-on Reset (VSS = 0.0 V, TA = –40°C to +85°C) Parameter Power supply rising time Power supply cut-off time tR tOFF Symbol Condition — — Value Min — 1 Max 50 — Unit ms ms Remarks Power-on reset function only Due to repeated operations Note : Make sure that power supply rises within the selected oscillation stabilization time. If power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended. tR 2.0 V tOFF VCC 0.2 V 0.2 V 0.2 V 34 MB89180L Series (3) Clock Timing Value Min 1 — 238 — 20 — — Typ — 32.768 — 30.5 — 15.2 — Max 4.2 — 1000 — — — 10 (VSS = 0.0 V, TA = –40°C to +85°C) Symbol FCH FCL tHCYL tLCYL PWH PWL PWHL PWLL tCR tCF Pin X0, X1 X0A, X1A X0, X1 X0A, X1A X0 X0A X0 Unit MHz kHz ns µs ns µs ns External clock Remarks Main clock Subclock Main clock Subclock Parameter Clock frequency Clock cycle time Input clock pulse width Input clock rising/falling time Main Clock Timing and Conditions tHCYL 0.8 VCC 0.2 VCC PWH tCF PWL tCR X0 Main Clock Conditions When a crystal or ceramic resonator is used X0 X1 FCH FCH C0 C1 When an external clock is used X0 X1 Open 35 MB89180L Series Subclock Timing and Conditions tLCYL 0.8 VCC 0.2 VCC PWHL PWLL tCF tCR X0A Subclock Conditions When a crystal or ceramic oscillator is used When an external clock is used When the single-clock option is used X0A FCL X1A Rd X0A X1A Open FCL X0A X1A Open C0 C1 (4) Instruction Cycle Parameter Instruction cycle (minimum execution time) Symbol tinst Value (typical) 4/FCH, 8/FCH, 16/FCH, 64/FCH 2/FCL Unit µs µs Remarks (4/FCH) tinst = 1.0 µs at FCH = 4 MHz tinst = 61.036 µs at FCL = 32.768 kHz 36 MB89180L Series (5) Serial I/O Timing Parameter Serial clock cycle time SCK ↓ → SO time Valid SI → SCK ↑ SCK ↑ → valid SI hold time Serial clock “H” pulse width Serial clock “L” pulse width SCK ↓ → SO time Valid SI → SCK ↑ SCK ↑ → valid SI hold time (MB89183L/185L : VCC = +3.0 V ±10 %, VSS = 0.0 V, TA = –40°C to +85°C) (MB89PV180/P185 : VCC = +5.0 V ±10 %, VSS = 0.0 V, TA = –40°C to +85°C) Value Symbol Pin Condition Unit Remarks Min Max tSCYC tSLOV tIVSH tSHIX tSHSL tSLSH tSLOV tIVSH tSHIX SCK SCK, SO SI, SCK SCK, SI SCK SCK, SO SI, SCK SCK, SI External clock operation Internal clock operation 2 tinst* –200 1/2 tinst* 1/2 tinst* 1 tinst* 1 tinst* 0 1/2 tinst* 1/2 tinst* — +200 — — — — 200 — — µs ns µs µs µs µs ns µs µs * : For information on tinst, see “(4) Instruction Cycle.” Internal Clock Operation tSCYC SCK 0.8 V tSLOV SO 2.4 V 0.8 V tIVSH SI 0.8 VCC 0.2 VCC tSHIX 0.8 VCC 0.2 VCC 2.4 V 0.8 V External Clock Operation SCK tSLSH 0.8 VCC 0.2 VCC tSLOV 0.2 VCC tSHSL 0.8 VCC SO 2.4 V 0.8 V tIVSH tSHIX 0.8 VCC 0.2 VCC SI 0.8 VCC 0.2 VCC 37 MB89180L Series (6) Peripheral Input Timing (MB89183L/185L : VCC = +3.0 V ±10 %, VSS = 0.0 V, TA = –40°C to +85°C) (MB89PV180/P185 : VCC = +5.0 V ±10 %, VSS = 0.0 V, TA = –40°C to +85°C) Value Symbol Pin Unit Remarks Min Max tILIH1 tIHIL1 tILIH2 tIHIL2 INT10 to INT13, EC INT20 to INT27 1 tinst* 1 tinst* 2 tinst* 2 tinst* — — — — µs µs µs µs Parameter Peripheral input “H” pulse width 1 Peripheral input “L” pulse width 1 Peripheral input “H” pulse width 2 Peripheral input “L” pulse width 2 * : For information on tinst, see “(4) Instruction Cycle.” t IHIL1 t ILIH1 INT10 to INT13, EC 0.2 VCC 0.8 VCC 0.2 VCC 0.8 VCC t IHIL2 t ILIH2 INT20 to INT27 0.8 VCC 0.2 VCC 0.2 VCC 0.8 VCC 38 MB89180L Series s EXAMPLE CHARACTERISTICS (1) “L” Level Output Voltage VOL1 vs. IOL 1.2 VOL2 vs. IOL 0.9 VCC = 2.0 V VCC = 2.5 V VCC = 3.0 V VCC = 2.0 V 0.8 VCC = 3.5 V 1 VCC = 4.0 V 0.8 0.7 0.6 VCC = 2.5 V VCC = 3.0 V VCC = 3.5 V VCC = 4.0 V VOL1 (V) VOL2 (V) 0.5 0.4 0.3 0.2 0.6 0.4 0.2 0.1 0 0 5 10 15 20 25 0 0 5 10 15 20 25 IOL (mA) IOL (mA) (2) “H” Level Output Voltage VCC - VOH1 vs. IOH VCC 1 VCC - VOH2 vs. IOH VCC = 2.0 V 0.5 VCC = 3.0 V = 2.5 V VCC = 3.5 V VCC = 2.0 V VCC = 4.0 V 0.8 0.4 VCC = 2.5 V VCC = 3.0 V VCC - VOH1 (V) VCC = 3.5 V VCC - VOH2 (V) 0.6 0.3 VCC = 4.0 V 0.4 0.2 0.2 0.1 0 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 0 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 IOH (mA) IOH (mA) 39 MB89180L Series (3) “H” Level Input Voltage/“L” level Input Voltage CMOS input 5.0 4.5 4.0 3.5 TA = + 25 °C 5.0 4.5 4.0 3.5 CMOS hysteresis input TA = + 25 °C VIHS VIN (V) 2.5 2.0 1.5 1.0 0.5 0 1 2 3 4 5 6 7 VIN (V) 3.0 3.0 2.5 2.0 1.5 1.0 0.5 0 1 2 3 4 5 6 7 VILS VCC (V) VCC (V) VIHS: Threshold when input voltage in hysteresis characteristics is set to “H” level VILS: Threshold when input voltage in hysteresis characteristics is set to “L” level (4) Power Supply Current (External Clock) ICC1 vs. VCC (mask ROM products) 0.14 0.14 ICC2 vs. VCC (mask ROM products) TA = +25 °C 0.12 FCH = 4.2 MHz 0.12 TA = +25 °C FCH = 4.2 MHz 0.1 0.1 ICC1 (mA) ICC2 (mA) FCH = 3 MHz FCH = 3 MHz 0.08 0.08 0.06 FCH = 1 MHz 0.06 FCH = 1 MHz 0.04 0.04 0.02 0.02 0 1 2 3 4 5 0 1 2 3 4 5 VCC (V) VCC (V) (Continued) 40 MB89180L Series ICCS1 vs. VCC (mask ROM products) TA = +25 °C 0.4 FCH = 4.2 MHz ICCS2 vs. VCC (mask ROM products) 0.14 0.12 TA = +25 °C FCH = 4.2 MHz 0.35 0.3 FCH = 3 MHz 0.1 ICCS1 (mA) 0.25 0.2 0.15 FCH = 1 MHz ICCS2 (mA) FCH = 3 MHz 0.08 0.06 FCH = 1 MHz 0.1 0.05 0 1 2 3 4 5 0.04 0.02 0 1 2 3 4 5 VCC (V) VCC (V) ICCT vs. VCC (mask ROM products) 1.2 FCL = 32.768 kHz TA = +25˚C 1 ICCT (µA) 0.8 0.6 0.4 0.2 0 1 2 3 4 5 VCC (V) (Continued) 41 MB89180L Series (Continued) ICCSL vs. VCC (mask ROM products) 6 FCL = 32.768 kHz TA = +25˚C 5 4 ICCSL (µA) 3 2 1 0 1 2 3 4 5 VCC (V) (5) Pull-up Resistance Rpull vs. VCC 200 160 120 Rpull (k ) 80 40 TA = +125˚C TA = +93˚C TA = +25˚C TA = +40˚C 0 2 2.5 3 3.5 4 4.5 5 5.5 VCC (V) 42 MB89180L Series s MASK OPTIONS Part number No. Specifying procedure MB89183L/185L Specify when ordering masking Selectable per pin (The pull-up resistors for P10 to P17 are available only when these pins are not set as segment outputs.) MB89P185 Set with EPROM programmer Can be set per pin (P10 to P17 are available only when segment output is not selected.) MB89PV180 Setting not possible 1 Pull-up resistors (PXX) P00 to P07, P10 to P17 Fixed to without pull-up resistor 2 Pull-up resistors (PXX) P40 to P47, P50 to P57 Pull-up resistors (PXX) P20 to P27 Power-on reset (POR) With power-on reset Without power-on reset Selectable per pin (Available only when Fixed to without these pins are not set pull-up resistor as segment outputs.) Selectable per pin Fixed to without pull-up resistor Selectable Fixed to without pull-up resistor Fixed to without pull-up resistor Fixed to with power-on reset 3 4 Selectable 5 Selection of oscillation stabilization Selectable time (OSC) OSC • The initial value of the oscillation 0 : 22/FCH stabilization time for the main 1 : 212/FCH clock can be set by selecting the 2 : 216/FCH values of the WTM1 and WTM0 3 : 218/FCH bits on the right. Main clock oscillation type (XSL) Crystal or ceramic resonator Reset pin output (RST) With reset output Without reset output Clock mode selection (CLK) Dual-clock mode Single-clock mode Crystal or ceramic Selectable WTM1 WTM0 0 0 : 22/FCH 0 1 : 212/FCH 1 0 : 216/FCH 1 1 : 218/FCH Crystal or ceramic Fixed to oscillation stabilization time of 216/ FCH 6 Crystal or ceramic Fixed to with reset output Fixed to dual-clock mode 7 Selectable Selectable 8 Selectable Selectable (Continued) 43 MB89180L Series (Continued) Part number No. Specifying procedure LCD output pin configuration choices SEG = 6: P40 to P47 segment output P50 to P57 segment output P10 to P17 segment output SEG = 5: P40 to P47 segment output P50 to P57 segment output P10 to P13 segment output P14 to P17 port output SEG = 4: P40 to P47 segment output P50 to P57 segment output P10 to P17 port output 9 SEG = 3: P40 to P47 segment output P50 to P53 segment output P54 to P57 port output P10 to P17 port output SEG = 2: P40 to P47 segment output P50 to P57 port output P10 to P17 port output SEG = 1: P40 to P43 segment output P44 to P47 port output P50 to P57 port output P10 to P17 port output SEG = 0: P40 to P47 port output P50 to P57 port output P10 to P17 port output MB89183L/185L Specify when ordering masking Specify by the option combinations listed below MB89P185 Select by version number  MB89PV180 Select by version number  Specify as SEG = 6 –101 : SEG 32 pins –101 : SEG 32 pins Specify as SEG = 5 –102 : SEG 28 pins –102 : SEG 28 pins Specify as SEG = 4 –103 : SEG 24 pins –103 : SEG 24 pins Specify as SEG = 3 –104 : SEG 20 pins –104 : SEG 20 pins Specify as SEG = 2 –105 : SEG 16 pins –105 : SEG 16 pins Specify as SEG = 1 –106 : SEG 12 pins –106 : SEG 12 pins Specify as SEG = 0 –107 : SEG 8 pins –107 : SEG 8 pins 44 MB89180L Series s ORDERING INFORMATION Part number MB89183LPF MB89185LPF MB89P185PF-101 MB89P185PF-102 MB89P185PF-103 MB89P185PF-104 MB89P185PF-105 MB89P185PF-106 MB89P185PF-107 MB89183LPFM MB89185LPFM MB89P185PFM-101 MB89P185PFM-102 MB89P185PFM-103 MB89P185PFM-104 MB89P185PFM-105 MB89P185PFM-106 MB89P185PFM-107 MB89183LPFV MB89185LPFV MB89PV180CF-101 MB89PV180CF-102 MB89PV180CF-103 MB89PV180CF-104 MB89PV180CF-105 MB89PV180CF-106 MB89PV180CF-107 Package Remarks 64-pin Plastic QFP (FPT-64P-M06) 64-pin Plastic QFP (FPT-64P-M09) 64-pin Plastic SQFP (FPT-64P-M03) 64-pin Ceramic MQFP (MQP-64C-P01) 45 MB89180L Series s PACKAGE DIMENSIONS 64-pin Plastic SQFP (FPT-64P-M03) 12.00±0.20(.472±.008)SQ * 10.00±0.10(.394±.004)SQ 48 33 Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 0.145±0.055 (.006±.002) 49 32 Details of "A" part 0.08(.003) 1.50 –0.10 .059 –.004 +0.20 +.008 (Mounting height) INDEX 64 17 0˚~8˚ "A" 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.10±0.10 (.004±.004) (Stand off) 0.25(.010) LEAD No. 1 16 0.50(.020) 0.20±0.05 (.008±.002) 0.08(.003) M C 2003 FUJITSU LIMITED F64009S-c-5-8 Dimensions in mm (inches) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 64-pin Plastic QFP (FPT-64P-M06) 24.70±0.40(.972±.016) * 20.00±0.20(.787±.008) 51 33 0.17±0.06 (.007±.002) 52 32 18.70±0.40 (.736±.016) *14.00±0.20 (.551±.008) INDEX Details of "A" part 3.00 –0.20 .118 –.008 +0.35 +.014 (Mounting height) 64 20 0~8˚ 1 19 1.00(.039) 0.42±0.08 (.017±.003) 0.20(.008) M 0.25 –0.20 1.20±0.20 (.047±.008) +0.15 +.006 .010 –.008 (Stand off) "A" 0.10(.004) C 2003 FUJITSU LIMITED F64013S-c-5-5 Dimensions in mm (inches) (Continued) 46 MB89180L Series (Continued) 64-pin Plastic QFP (FPT-64P-M09) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 14.00±0.20(.551±.008)SQ * 12.00±0.10(.472±.004)SQ 48 33 0.145±0.055 (.0057±.0022) 49 32 0.10(.004) Details of "A" part 1.50 –0.10 .059 –.004 +0.20 +.008 (Mounting height) 0.25(.010) INDEX 0~8˚ 64 17 1 16 "A" 0.65(.026) 0.32±0.05 (.013±.002) 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 0.10±0.10 (.004±.004) (Stand off) 0.13(.005) M C 2003 FUJITSU LIMITED F64018S-c-3-5 Dimensions in mm (inches) 64-pin Ceramic MQFP (MQP-64C-P01) 18.70(.736)TYP 16.30±0.33 (.642±.013) 15.58±0.20 (.613±.008) 12.00(.472)TYP +0.40 –0.20 +.016 –.008 INDEX AREA 1.20 .047 1.00±0.25 (.039±.010) 1.00±0.25 (.039±.010) 1.27±0.13 (.050±.005) 22.30±0.33 (.878±.013) 24.70(.972) TYP 0.30(.012) TYP 18.12±0.20 12.02(.473) (.713±.008) TYP 10.16(.400) 14.22(.560) TYP TYP 18.00(.709) TYP 1.27±0.13 (.050±.005) 0.30(.012)TYP 7.62(.300)TYP 9.48(.373)TYP 11.68(.460)TYP 0.40±0.10 (.016±.004) 0.40±0.10 (.016±.004) 1.20 –0.20 .047 –.008 +0.40 +.016 0.50(.020)TYP 10.82(.426) 0.15±0.05 MAX (.006±.002) C 1994 FUJITSU LIMITED M64004SC-1-3 Dimensions in mm (inches) 47 MB89180L Series FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. 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The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. F0302 © FUJITSU LIMITED Printed in Japan
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