MB89P195A

FUJITSU SEMICONDUCTOR DATA SHEET DS07-12512-8E 8-bit Proprietary Microcontroller CMOS F2MC-8L MB89190/190A Series MB89191/193/195/P195/PV190 MB89191A/191AH/193A/193AH/195A/P195A/PV190A s OUTLINE The MB89190/190A series microcontrollers contain various resources such as timers, serial interfaces, A/D converters, external interrupts, and remote-control functions, as well as an F2MC*-8L CPU core for low-voltage and high-speed operations. These single-chip microcontrollers are suitable for small devices such as remote controllers with compact packages. *: F2MC stands for FUJITSU Flexible Microcontroller. s FEATURES • Minimum execution time: 0.95 µs at 4.2 MHz (VCC = 2.7 V) • F2MC-8L family CPU core • Two timers 8/16-bit timer/counter 20-bit timebase counter • Serial interface 8-bit synchronous serial (Selectable transfer direction allows communication with various equipment.) (Continued) s PACKAGE 28-pin Plastic SOP 28-pin Plastic DIP 28-pin Plastic SH-DIP 48-pin Ceramic MQFP (FPT-28P-M17) (DIP-28P-M05) (DIP-28P-M03) (MQP-48C-P01) MB89190/190A Series (Continued) • External interrupts Edge detection (Selectable edge): 3 channels Low-level interrupt (Wake-up function): 8 channels • A/D converter (MB89190A series only) 8-bit successive approximation type: 8 channels • Built-in remote-control transmitting frequency generator • Low-power consumption modes Stop mode (Almost no current consumption occurs because oscillation stops.) Sleep mode (The current consumption is reduced about 1/3 of that during normal operation because the CPU stops.) • Packages SOP-28, SH-DIP-28, and DIP-28 s PRODUCT LINEUP Part number Item MB89191 MB89191A MB89191AH MB89193 MB89193A MB89193AH Mask ROM products MB89195 MB89195A MB89P195 MB89P195A One-time product MB89PV190 MB89PV190A For development and evaluation Classification ROM size 4 K × 8 bits (internal mask ROM) 8 K × 8 bits (internal mask ROM) 16 K × 8 bits (internal mask ROM) 16 K × 8 bits 32 K × 8 bits (internal PROM, (external ROM) to be programmed with generalpurpose EPROM programmer) RAM size CPU functions 128 × 8 bits The number of basic instructions: Instruction bit length: Instruction length: Data bit length: Minimum execution time: Interrupt processing time: 256 × 8 bits 136 8 bits 1 to 3 bytes 1, 8, and 16 bits 0.95 µs at 4.2 MHz 8.57 µs at 4.2 MHz Ports Output port (N channel open drain): 4 (also serves as peripherals for MB89190A series)or 6 (for MB89190 series) I/O port (CMOS): 16 (also serves as peripherals) Total: 20 or 22 2 channels of 8-bit timer counter or one 16-bit event counter (operation clock: 1.9 µs, 30.4 µs, and 487.6 µs at 4.2 MHz, and external clock) 8 bits LSB/MSB first selectable Transfer clock (external, 1.9 µs, 7.6 µs, 30.4 µs at 4.2 MHz) 8 bits x 8 channels A/D conversion mode (conversion time: 41.9 µs at 4.2 MHz) Sense mode (conversion time: 11.9 µs at 4.2 MHz) Capable of continuous activation by an internal timer. Reference voltage input Timer counter Serial I/O A/D converter (MB89190A series only) 2 (Continued) MB89190/190A Series (Continued) Part number Item MB89191 MB89191A MB89191AH MB89193 MB89193A MB89193AH MB89195 MB89195A MB89P195 MB89P195A MB89PV190 MB89PV190A External interrupt 1 3 independent channels (selectable edge, interrupt vector, and interrupt source flag) Rising/falling/both edge selectable Used for wake-up from stop/sleep mode. (Edge detection is also permitted in the stop mode.) 8 channels (low-level interrupt only) The pulse width and cycle are software-programmable. Sleep mode and stop mode CMOS 2.2 V to 6.0 V 2.7 V to 6.0 V MBM27C256A20TVM External interrupt 2 (Wake-up function) Remote-control transmitting frequency generator Standby mode Process Operating voltage* EPROM for use *: Varies with conditions such as operating frequencies (see “s Electrical Characteristics.”) It differs from the operating voltage of an A/D converter. s PACKAGE AND CORRESPONDING PRODUCTS MB89191 MB89191A MB89191AH MB89193 MB89193A MB89193AH MB89195 MB89195A Package MB89P195 MB89P195A MB89PV190 MB89PV190A DIP-28P-M05 DIP-28P-M03 FPT-28P-M17 MQP-48C-P01 : Available × × × × × × * × : Not available * : A socket (manufacturer: Sun Hayato Co., Ltd.) for pin pitch conversion is available. 48QF-28SOP-8L: (MQP-48C-P01) → for conversion to FPT-28P-M17 Inquiry: Sun Hayato Co., Ltd.: TEL (81)-3-3986-0403 FAX (81)-3-5396-9106 Note: For more information on each package, see “s Package Dimensions.” 3 MB89190/190A Series s DIFFERENCES AMONG PRODUCTS 1. Memory Size Before evaluating using the piggyback model, verify its difference from the model that will actually be used. Take particular care on the following points: • On the MB89191/191A, addresses 0140H to 0180H cannot be used for register banks. • The stack area, etc., is set in the upper limit of the RAM. 2. Current Consumption • In the case of MB89PV190/PV190A, added is the current consumed by the EPROM which is connected to the top socket. • When operated at low speed, the products with an OTPROM (EPROM) will consume more current than the products with a mask ROM. However, the same is current consumption in the sleep/stop mode. (For more information, see “s Electrical Characteristics.”) 3. Mask Options Functions that can be selected as options and how to designate these options vary with product. Before using options, check “s Mask Options.” Take particular care on the following points: • Pull-up resistor optional cannot be set for P00 to P03, and P40 to P45 on the MB89191A/193A/195A/P195A. • The power-on reset option is fixed as “enabled” for MB89P195/P195A. • Options are fixed on the MB89PV190/PV190A. 4. MB89191AH/MB89193AH MB89191AH/193AH are “L” level heavy output current drive type of P30 to P32 and P40 to P43 of MB89191A/ 193A.Characteristics other than “L” level output of P30 to P32 and P40 to P43 are the same as MB89191A/193A. 4 MB89190/190A Series s PIN ASSIGNMENT (TOP VIEW) P04/INT24 P05/INT25 P06/INT26 P07/INT27 TEST RST X0 X1 VSS P37/BZ/RCO P36/INT12 P35/INT11 P34/TO/INT10 P33/EC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC P03/INT23/AN7 P02/INT22/AN6 P01/INT21/AN5 P00/INT20/AN4 P45/AVR P44/AVSS P43/AN3 P42/AN2 P41/AN1 P40/AN0 P30/SCK P31/SO P32/SI (FPT–28P–M17) (DIP–28P–M03) (DIP–28P–M05) 5 MB89190/190A Series (Top view) P35/INT11 N. C. N. C. N. C. N. C. 38 N. C. N. C. N. C. N. C. N. C. 48 47 46 45 44 43 42 VSS 41 40 39 68 67 66 65 64 63 62 P34/TO/INT10 P33/EC P32/SI P31/SO P30/SCK P40/AN0 P41/AN1 P42/AN2 P43/AN3 P44/AVSS P45/AVR P00/INT20/AN4 1 2 3 4 5 6 7 8 9 10 11 61 37 36 35 N. C. N. C. N. C. P36/INT12 P37/BZ/RCO X1 X0 RST TEST P07/INT27 P06/INT26 P05/INT25 P04/INT24 69 70 71 72 73 74 75 76 Each pin inside the dashed line is for MB89PV190/PV190A units only. 60 59 58 57 56 55 54 53 34 33 32 31 30 29 28 27 26 77 78 79 80 49 50 51 12 13 14 52 25 23 P02/INT22/AN6 24 P03/INT23/AN7 15 16 17 18 19 20 21 N. C. P01/INT21/AN5 N. C. N. C. N. C. N. C. N. C. N. C. (MQP-48C-P01) • Pin assignment on the package top (MB89PV190/PV190A only) Pin no. 49 50 51 52 53 54 55 56 Pin name VPP A12 A7 A6 A5 A4 A3 N.C. Pin no. 57 58 59 60 61 62 63 64 Pin name N.C. A2 A1 A0 O1 O2 O3 VSS Pin no. 65 66 67 68 69 70 71 72 Pin name O4 O5 O6 O7 O8 CE A10 N.C. Pin no. 73 74 75 76 77 78 79 80 Pin name OE N.C. A11 A9 A8 A13 A14 VCC N.C.: Internally connected. Do not use. 6 N. C. V CC 22 MB89190/190A Series s PIN DESCRIPTION Pin no. SOP*1, DIP*2 SH-DIP*3 7 8 5 6 MQFP*4 31 32 29 30 Pin name X0 X1 TEST RST B C Test input pin Connect directly to VSS. Reset I/O pin This pin consists of an N-ch open-drain output with a pull-up resistor and of hysteresis input. A low level is output from this pin by internal source. The internal circuit is initialized by the input of a low level. General-purpose I/O ports Also serve as external interrupt input pins. In the MB89190A series, also serve as analog input pins. External interrupt input is of hysteresis input type. General-purpose I/O ports Also serve as external interrupt input. External interrupt input is of hysteresis input type. General-purpose I/O port Also serves as clock I/O for the 8-bit serial I/O interface. The serial I/O clock input is of hysteresis input type with a built-in noise filter. General-purpose I/O port Also serves as a serial I/O data output pin. General-purpose I/O port Also serves as a serial I/O data input pin. The serial I/O data input is of hysteresis input type with a built-in noise filter. General-purpose I/O port Also serves as an external clock input pin for the 8bit timer/counter. External clock input of the 8-bit timer/counter is hysteresis input type with a built-in noise filter. General-purpose I/O port Also serves as the overflow output and external interrupt input for the 8-bit timer/counter. External interrupt input is of hysteresis input type with a built-in noise filter. Circuit type A Function Clock oscillation pins 24 to 27 12 13, 23, 24 25 to 28 P00/INT20/ AN4 to P03/ INT23/AN7 P04/INT24 to P07/INT27 P30/SCK G 1 to 4 D 17 5 D 16 15 4 3 P31/SO P32/SI E D 14 2 P33/EC D 13 1 P34/TO/ INT10 D *1: *2: *3: *4: FPT-28P-M17 DIP-28C-M05 DIP-28P-M03 MQP-48C-P01 (Continued) 7 MB89190/190A Series (Continued) Pin no. SOP*1, DIP*2 SH-DIP*3 12 11 10 MQFP*4 48 34 33 Pin name P35/INT11 P35/INT12 P37/BZ/RCO E Circuit type D Function General-purpose I/O port Also serve as external interrupt input pins. External interrupt input is of hysteresis input type with a built-in noise filter. General-purpose I/O port Also serves as a buzzer output pin and remotecontrol output pin. N-ch open-drain output ports Also serve as analog input pins for the A/D converter. In the MB89190A series, also serves as a reference voltage input pin for the A/D converter. In the MB89190 series, serves as an N-ch opendrain output port. In the MB89190A series, also serves as a power pin for the A/D converter, and should be applied the same voltage as VSS to. In the MB89190 series, also serves as an N-ch open-drain output port. Power supply pin Power supply (GND) pin 18 to 21 6 to 9 P40/AN0 to P43/AN3 P45/AVR F 23 11 F 22 10 P44/AVSS F 28 9 *1: *2: *3: *4: 18 42 VCC VSS — — FPT-28P-M17 DIP-28P-M05 DIP-28P-M03 MQP-48C-P01 8 MB89190/190A Series • External EPROM pins (MB89PV190/PV190A) Pin no. 49 79 78 50 75 71 76 77 51 52 53 54 55 58 59 60 61 62 63 65 66 67 68 69 70 73 80 64 VPP A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 O1 O2 O3 O4 O5 O6 O7 O8 CE OE VCC VSS Pin name I/O O O “H” level output pin Address output pins Function I Data input pins O O O O ROM chip enable pin Outputs “H” during standby. ROM output enable pin Outputs “L” at all times. EPROM power pin Power supply (GND) pin 9 MB89190/190A Series s I/O CIRCUIT TYPE Type Circuit X1 X0 Remarks A • Oscillation feedback registor of approximately 1 MΩ at 5 V Standby control signal • When crystal and ceramic oscillators are selected optionally X1 X0 Standby control signal • When CR oscillation is selected optionally B C R P-ch • Output pull-up resistor (P-ch): Approx. 50 kΩ at 5 V • Hysteresis input N-ch D R P-ch • CMOS output • CMOS input • Hysteresis input (resource input) P-ch N-ch • Pull-up resistor optional (Continued) 10 MB89190/190A Series (Continued) Type Circuit Remarks E R P-ch • CMOS output • CMOS input P-ch N-ch • Pull-up resistor optional F R Pch • N-ch open-drain output • Analog input Nch Analog input • Pull-up resistor optional (MB89190 series only) • • • • CMOS output CMOS input Hysteresis input (resource input) Analog input G R P-ch P-ch N-ch Analog input • Pull-up resistor optional (MB89190 series only) 11 MB89190/190A Series s HANDLING DEVICES 1. Preventing Latch-up Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input or output pins other than medium- and high-voltage pins or if higher than the voltage which shows on “ 1. Absolute Maximum Ratings” in “s Electrical Characteristics” is applied between VCC to VSS. When latchup occurs, power supply current increases rapidly and might thermally damage elements. When using, take great care not to exceed the absolute maximum ratings. Also, take care to prevent the analog power supply (AVCC and AVR) and analog input from exceeding the digital power supply (VCC) when the analog system power supply is turned on and off. 2. Treatment of Unused Input Pins Leaving unused input pins open could cause malfunctions. They should be connected to pull-up or pull-down resistor. 3. Treatment of Power Supply Pins on Microcontrollers with A/D and D/A Converters Connect to be AVCC=DAVC=VCC and AVSS=AVR=VSS even if the A/D and D/A converters are not in use. 4. Treatment of N.C. Pin Be sure to leave (internally connected) N.C. pins open. 5. Power Supply Voltage Fluctuations Although operation is assured within the rated range of VCC power supply voltage, a rapid fluctuation of the voltage could cause malfunctions within the rated range. Stabilizing voltage supplied to the IC is therefore important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz) and the transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is switched. 6. Precautions when Using an External Clock Even when an external clock is used, oscillation stabilization time is required for power-on reset (optional) and release from stop mode. 12 MB89190/190A Series s PROGRAMMING TO PROM ON THE MB89P195/P195A The MB89P195/P195A can program data in the internal PROM using a dedicated conversion adaptor and specified general-purpose EPROM programmer. 1. Memory Space Address in normal operation mode EPROM mode (Corresponding addresses on the EPROM programmer) 0000 H I/O 0080 H RAM 0180 H 8000 H Not available 0000 H Vacancy (Read value FFH) C000 H PROM 16 K FFFF H 4000 H EPROM 16 K 7FFF H • Programming procedure (1) Load program data into the ROM programmer at addresses 4000H to 7FFFH. (Addresses 0C000H to 0FFFFH in the operation mode correspond to 4000H to 7FFFH in ROM programmer. See the illustration above.) (2) Set the data at addresses 0000H to 3FFFH of the programmer ROM in the ROM programmer, to FFH. (3) Program in the successive-address write mode of the ROM programmer. Note: Program must be started at the address 00000H. For details, contact our Sales Division. 13 MB89190/190A Series 2. Recommended Screening Conditions High-temperature aging is recommended as the pre-assembly screening procedure for a product with a blanked OTPROM microcontroller program. Program, verify Aging +150 °C for 48 h Data verification Assembly 3. Programming Yield Due to its nature, bit programming test can’t be conducted as Fujitsu delivery test. For this reason, a programming yield of 100% cannot be assured at all times. 4. EPROM Programmer Socket Adapter Recommended programmer manufacturer and programmer name Compatible socket adapter Sun Hayato Co., Ltd. Minato Electronics Inc. MODEL1890A (ver.2.2) + OU-910 (ver.4.1) Recommended Recommended UNISITE (ver.5.0 or later) Data I/O Co., Ltd. 3900 (ver.2.8 or later) 2900 (ver.3.8 or later) Part no. Package MB89P195 MB89P195A MB89P195PF MB89P195APF DIP-28 SOP-28 ROM-28DP28DP-8L ROM-28SOP28DP-8L Recommended Recommended Inquiry: Sun Hayato Co., Ltd.: TEL: (81)-3-3986-0403 FAX: (81)-3-5396-9106 Minato Electronics Inc.: TEL: USA (1)-916-348-6066 JAPAN (81)-45-591-5611 Data I/O Co., Ltd.: TEL: USA/ASIA (1)-206-881-6444 EUROPE (49)-8-985-8580 14 MB89190/190A Series s PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE 1. EPROM for Use MBM27C256A-20TVM 2. Programming Socket Adapter To program to the EPROM using an EPROM programmer, use the socket adapter (manufacturer: Sun Hayato Co., Ltd.) below. Package LCC-32 Adapter socket part number ROM-32LC-28DP-YS Inquiry: Sun Hayato Co., Ltd.: TEL (81)-3-3986-0403 FAX (81)-3-5396-9106 3. Memory Space Address in normal operation mode 0000 H I/O 0080 H RAM 0180 H Not available 8000 H Address when writing to EPROM (Corresponding addresses on the EPROM programmer) 0000 H PROM 32 K EPROM 32 K FFFF H 7FFF H 4. Programming to the EPROM (1) Set the EPROM programmer for MBM27C256A. (2) Load program data into the EPROM programmer at 0000H to 7FFFH. (3) Program to 0000H to 7FFFH with the EPROM programmer. 15 MB89190/190A Series s BLOCK DIAGRAM X0 X1 Oscillator (Max. 4.2 MHz) Timebase timer Clock control Internal bus Reset circuit (WDT) RST CMOS I/O port 8-bit timer/counter 4 P04/INT24 to P07/INT27 Port 0 P34/TO /INT10 External interrupt (Wake-up) 8-bit timer/counter P33/EC P00/INT20/AN4 to 4 P03/INT23/AN7 P30/SCK 8-bit A/D converter P45*/AVR P44*/AV SS P40/AN0 to P43/AN3 (MB89190A only) Port 4 8-bit serial Port 3 P32/SI P31/SO P35/INT11 External interrupt P36/INT12 4 N-ch open-drain output port Remote-control transmit frequency generator P37/BZ/RCO Buzzer output RAM CMOS I/O port F2MC-8L CPU ROM The other pins TEST, VCC, V SS *: In the MB89190A series, P44 and P45 serve only as AVR and AV ss pins, respectively, and cannot be used as ports. The MB89190 has no built-in A/D converter. 16 MB89190/190A Series s CPU CORE 1. Memory Space The microcontrollers of MB89190/190A series offer a 64 Kbytes of memory for storing all of I/O, data, and program areas. The I/O area is allocated from the lowest address. The data area is allocated immediately above the I/O area. The data area can be divided into register, stack, and direct areas according to the application. The program area is allocated from exactly the opposite end of I/O area, that is, the highest address. The tables of interrupt reset vectors, and vector call instructions are allocated from the highest address within the program area. The memory space of the MB89190/190A series is structured below: Memory Space MB89191/191A MB89193/193A MB89195/195A MB89P195/P195A 0000 H I/O 0080 H Vacancy 00C0 H 0100 H Register 0140 H 0180 H 0180 H 0180 H RAM RAM 0100 H Register 0100 H Register RAM 0100 H Register RAM 0080 H I/O 0080 H MB89PV190/PV190A 0000 H I/O 0080 H 0000 H 0000 H I/O Not available Not available Not available Not available 8000 H C000 H External ROM Program PROM (Mask ROM) Mask ROM Mask ROM FFFF H FFFF H FFFF H FFFF H E000 H F000 H 17 MB89190/190A Series 2. Registers The F2MC-8L family has two types of registers; dedicated hardware registers and general-purpose memory registers. The following dedicated registers are provided: Program counter (PC): Accumulator (A): Temporary accumulator (T): A 16-bit-long register for indicating the instruction storage positions A 16-bit-long temporary register for arithmetic operations, etc. When the instruction is an 8-bit data processing instruction, the lower byte is used. A 16-bit-long register which is used for arithmetic operations with the accumulator. When the instruction is an 8-bit data processing instruction, the lower byte is used. A 16-bit-long register for index modification A 16-bit-long pointer for indicating a memory address A 16-bit-long pointer for indicating a stack area A 16-bit-long register for storing a register pointer, a condition code Index register (IX): Extra pointer (EP) : Stack pointer (SP) : Program status (PS) : 16 bits PC A T IX EP SP PS : Program counter : Accumulator Initial value FFFDH Indeterminate : Temporary accumulator Indeterminate : Index register : Extra pointer : Stack pointer : Program status Indeterminate Indeterminate Indeterminate I-flag = 0, IL1, 0 = 11 The other bit values are indeterminate The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for use as a condition code register (CCR) (see the diagram below). Structure of the Program Status Register 15 PS 14 13 RP 12 11 10 9 8 7 H 6 I 5 4 3 N 2 Z 1 V 0 C Vacancy Vacancy Vacancy IL1, 0 RP CCR 18 MB89190/190A Series The RP indicates the address of the register bank currently in use. The relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. Rule for Conversion of Actual Addresses of the General-purpose Register Area RP Lower OP codes b1 ↓ b0 ↓ “0” “0” “0” “0” “0” “0” “0” “1” R4 R3 R2 R1 R0 b2 ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ Generated addresses A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data, and bits for control of CPU operations at the time of an interrupt. H-flag: Set to ‘1’ when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared to ‘0’ otherwise. This flag is for decimal adjustment instructions. I-flag: Interrupt is enabled when this flag is set to ‘1’. Interrupt is disabled when the flag is cleared to ‘0’. Cleared to ‘0’ at the reset. IL1, 0: Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is higher than the value indicated by this bit. IL1 0 0 1 1 IL0 0 1 0 1 Interrupt level 1 2 3 Low High-low High N-flag: Set to ‘1’ if the MSB becomes ‘1’ as the result of an arithmetic operation. Cleared to ‘0’ otherwise. Z-flag: Set to ‘1’ when an arithmetic operation results in 0. Cleared to ‘0’ otherwise. V-flag: Set to ‘1’ if the complement on ‘2’ overflows as a result of an arithmetic operation. Cleared to ‘0’ if the overflow does not occur. C-flag: Set to ‘1’ when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared to ‘0’ otherwise. Set to ‘1’ the shift-out value in the case of a shift instruction. 19 MB89190/190A Series The following general-purpose registers are provided: General-purpose registers: An 8-bit-long register for storing data The general-purpose registers are of 8 bits and located in register banks of the memory. One bank contains eight registers and up to a total of 16 banks can be used on the MB89190/190A (8 banks on MB89191/191A). The bank currently in use is indicated by the register bank pointer. (RP) Note: The number of register banks that can be used varies with the RAM size. Register Bank Configuraiton This address = 0100 H + 8 × (RP) R0 R1 R2 R3 R4 R5 R6 R7 16 banks (8 banks for the MB89191/191A) Memory area 20 MB89190/190A Series s I/O MAP Address 00H 01H 02H 03H to 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H to 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH 1DH 1EH 1FH 20H 21H 22H 23H 24H 25H to 31H 32H 33H 34H to 7BH 7CH 7DH 7EH 7FH Note: Do not use vacancies. (W) (W) (W) ILR1 ILR2 ILR3 (R/W) (R/W) EIE2 EIF2 (R/W) (R/W) (R/W) (R/W) (R/W) ADC1 ADC2 ADCD EIC1 EIC2 (R/W) (R/W) (R/W) (R/W) (R/W) (R/W) T2CR T1CR T2DR T1DR SMR SDR (R/W) (R/W) RCR1 RCR2 (R/W) (W) (R/W) (R/W) PDR3 DDR3 PDR4 BUZR (R/W) (R/W) (R/W) STBC WDTC TBTC Read/write (R/W) (W) (R/W) Register name PDR0 DDR0 ENI0 Register description Port 0 data register Port 0 data direction register Port 0 input enable register Vacancy Standby control register Watchdog control register Time-base timer control register Vacancy Port 3 data register Port 3 data direction register Port 4 data register Buzzer register Vacancy Remote-control transmit control register 1 Remote-control transmit control register 2 Vacancy Vacancy Timer 2 control register Timer 1 control register Timer 2 data register Timer 1 data register Serial mode register Serial data register Vacancy Vacancy A/D converter control register 1 A/D converter control register 2 A/D converter data register External interrupt control register 1 External interrupt control register 2 Vacancy External interrupt 2 enable register External interrupt 2 flag register Vacancy Interrupt level register 1 Interrupt level register 2 Interrupt level register 3 Vacancy 21 MB89190/190A Series s ELECTRICAL CHARACTERISTICS 1. Absolute Maximum Rating (AVSS = VSS = 0.0 V) Parameter Symbol VCC Power supply voltage EPROM program voltage Input voltage Output voltage AVR VPP VI VO IOL1 IOL2 Value Min. VSS – 0.3 VSS – 0.3 VSS – 0.3 VSS – 0.3 VSS – 0.3   Max. VSS + 7.0 VSS + 7.0 VSS + 13.0 VCC + 0.3 VCC + 0.3 10 20 Unit V V V V V mA mA Except P33 and P34 (Except P30 toP34 and P40 to P43 for MB89191AH/193AH) P33, P34(P30 toP34 and P40 to P43 for MB89191AH/193AH) Except P33 and P34 (Except P30 toP34 and P40 to P43 for MB89191AH/193AH) Average value (operating current × operation rate) P33 and P34(P30 toP34 and P40 to P43 for MB89191AH/193AH) Average value (operating current × operation rate) Average value (operating current × operation rate) Must not exceed VCC + 0.3 V. MB89190A series only MB89P195/P195A only Remarks “L” level maximum output current IOLAV1 “L” level average output current IOLAV2 “L” level total average output current “L” level total maximum output current “H” level maximum output current  4 mA           –40 –55 8 mA ΣIOLAV ΣIOL IOH1 IOH2 IOHAV1 20 100 –10 –20 –2 mA mA mA mA mA Except P33, P34, and P37 P33, P34, P37 Except P33, P34, and P37 Average value (operating current × operation rate) Except P33, P34, and P37 Average value (operating current × operation rate) Average value (operating current × operation rate) “H” level average output current IOHAV2 “H” level total average output current “H” level total maximum output current Power consumption Operating temperature Storage temperature ΣIOHAV ΣIOH PD Ta Tstg –4 –10 –30 200 +85 +150 mA mA mA mW °C °C WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. 22 MB89190/190A Series 2. Recommended Operating Conditions (VSS = 0.0 V) Parameter Symbol Value Min. 2.2* Power supply voltage VCC 2.7* 1.5 A/D converter reference input voltage Operating temperature AVR TA 0.0 –40 Max. 6.0* 6.0* 6.0 VCC +85 Unit V V V V °C Remarks Normal operation assurance range* MB89191/191A/193/193A/195/195A Normal operation assurance range* MB89P195/P195A/PV190/PV190A Retains the RAM state in the stop mode *: These values vary with the operation frequency and the assured analog operation range. See Figure 1 and “ 5. A/D Converter Electrical Characteristics.” 6 Operating voltage (V) Analog accuracy assured in the Vcc = 3.5 V to 6.0 V range. Operation assurance range 5 4 3 2 1 1 2 3 4 Main clock operation frequency (at an instruction cycle of 4/Fc) (MHz) 4.0 2.0 0.95 (µs) Minimum execution time (instruction cycle) (µs) Note: The shaded area is assured only for the MB89191/191A/193/193A/195/195A. Figure 1 Operating Voltage vs. Main Clock Operating Frequency Figure 1 indicates the operating frequency of the external oscillator at an instruction cycle of 4/FC. 23 MB89190/190A Series WARNING: Recommended operating conditions are normal operating ranges for the semiconductor device. All the device’s electrical characteristics are warranted when operated within these ranges. Always use semiconductor devices within the recommended operating conditions. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representative beforehand. 3. DC Characteristics (VCC = +5.0 V, AVSS = VSS = 0.0 V, TA = –40°C to +85°C) Value Condition Unit Remarks Min. Typ. Max.  0.7 VCC  VCC + 0.3 VCC + 0.3 V Parameter Symbol VIH Pin P00 to P07, P30 to P37, TEST RST, INT10 to INT12, EC, SCK, SI, INT20 to INT27 P00 to P03, P33 to P36, TEST RST, INT10 to INT12, EC, SCK, SI, INT 20 to INT27 P40 to P44 P00 to P07, P30 to P32, P35, P36 P33, P34 P37 P00 to P07, P40 to P45, P30 to P32, P35 to P37 P00 to P07, P35 to P37 “H” level input voltage VIHS  0.8 VCC VSS − 0.3 VSS − 0.3 VSS − 0.3 2.4 2.4 2.4  V VIL “L” level input voltage VILS Open-drain output pin applied voltage   0.3 VCC V   IOH = –2.0 mA IOH = –15 mA IOH = –7.0 mA      0.2 VCC VSS + 0.3    V VD VOH1 V V V V Except MB89191AH/ 193AH MB89191AH/ 193AH “H” level output voltage VOH2 VOH3 VOL1 “L” level output voltage IOL = 1.8 mA   0.4 V VOL2 RST P33, P34 IOL = 4.0 mA   0.4 V Except MB89191AH/ 193AH MB89191AH/ 193AH VOL3 P30 to P34, P40 to P43 Input leakage current(Hi-z output leakage current) ILI1 P00 to P07, P30 to P37, TEST P40 to P45 IOL = 12 mA   0.4 V 0.0 V < VI < VCC     ±5 ±1 µA µA Without pull-up resistor Without pull-up resistor Open-drain output leakage current (Off ILD1 state) 24 0.0 V < VI < VCC (Continued) MB89190/190A Series (Continued) Parameter Symbol Pin P00 to P07, P30 to P37, P40 to P45, RST (VCC = 5.0 V, AVSS = VSS = 0.0 V, TA = –40°C to +85°C) Value Condition Unit Remarks Min. Typ. Max. VI = 0.0 V 25 50 100 kΩ MB89191/ 191A/193/ mA 193A/195/ 195A/PV190/ PV190A mA MB89P195/ P195A Stop mode Pull-up resistance RPULL — ICC FC = 4.2 MHz — VCC ICCS ICCH FC = 4.2 MHz TA = +25 °C FC = 4.2 MHz During A/D converter operation Except AVR, f = 1 MHz AVSS, VCC, and VSS — — — — — 5 10 Power supply voltage* 7 3 — 6 8 10 12 7 1 13 15 — mA Sleep mode µA MB89191A/ mA 193A/195A/ PV190A mA MB89P195A pF ICCA Input capacitance CIN *: For the MB89PV190/PV190A, the current consumption of a connected EPROM and ICE is not included. The mesurement condition of the power supply current are set as VCC = 5.0 V with an external clock. 25 MB89190/190A Series 4. AC Characteristics (1) Reset Timing (VCC = +5.0 V±10%, AVSS = VSS = 0.0 V, TA = –40°C to +85°C) Value Condition Unit Remarks Min. Max. — 16 tXCYL — ns Parameter RST “L” pulse width Symbol tZLZH Note: tXCYL is the oscillation period (1/FC) input to the X0 pin. t ZLZH RST 0.2 VCC 0.2 VCC (2) Power-on Reset (AVSS = VSS = 0.0 V, TA = –40°C to +85°C) Parameter Power supply rising time Power supply cut-off time Symbol tR tOFF Condition — Value Min. — 1 Max. 50 — Unit ms ms Due to repeated operations Remarks Note: Make sure that power supply rises within the oscillation stabilization time selected. If power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended. tR 2.0 V 0.2 V 0.2 V t OFF VCC 0.2 V 26 MB89190/190A Series (3) Clock Timings (AVSS = VSS = 0.0 V, TA = –40°C to +85°C) Value Unit Remarks Min. Max. 1 238 20 — 4.2 1000 — 10 MHz ns ns ns External clock External clock Parameter Clock frequency Clock cycle time Input clock pulse width Input clock pulse risilng/falling time Symbol FC tXCYL PWH PWL tCR tCF Pin X0, X1 X0, X1 X0 X0 Condition — — — — X0, X1 Timings and Conditions of Applied Voltage t XCYL PWH t CR 0.8 VCC 0.8 VCC 0.2 VCC 0.2 VCC t CF PWL X0 0.2 VCC Clock Conditions When a crystal or ceramic resonator is used When an external clock is used X0 X1 X0 X1 Open (4) Instruction Cycles (AVSS = VSS = 0.0 V, TA = –40°C to +85°C) Parameter Instruction cycle (minimum execution time) Symbol tinst Value (typical) 4/FC Unit µs Remarks tinst = 0.95 µs when operating at FC = 4.2 MHz 27 MB89190/190A Series (5) Recommended Resonator Manufacturers • Sample Application of Piezoelectric Resonator (FAR Series) X0 X1 R FAR*1 C1*2 C2*2 *1: Fujitsu Acoustic Resonator FAR part number (built-in capacitor type) Frequency Dumping (MHz) resistor 200 Ω Initial deviation of FAR frequency (TA = +25°C) ±0.5% Temperature characteristics of FAR frequency (TA = –20°C to +60°C) ±0.5% Loading capacitors*2 FAR-C4SA-04000- 01M Inquiry: FUJITSU LIMITED 4.00 Built-in 28 MB89190/190A Series • Sample Application of Ceramic Resonator X0 X1 R * C1 C2 • Mask ROM products Resonator manufacturer* Resonator CSA2.00MG040 CST2.00MG040 CSA4.00MG CST4.00MGW CSTCS4.00MG0C5 CCR4.0MC3 FCR4.0MC5 Frequency (MHz) 2.00 C1 (pF) 100 Built-in 30 Built-in Built-in Built-in Built-in C2 (pF) 100 Built-in 30 Built-in Built-in Built-in Built-in R Not required Not required Not required Not required Not required Not required Not required Murata Mfg. Co., Ltd. 4.00 TDK. Co., Ltd. • One-time products Resonator manufacturer* 4.00 Resonator CSA3.20MGCA CST3.20MGA CSA3.20MGA040 CST3.20MGWA040 CSA3.58MGCA CST3.58MGWHA Frequency (MHz) C1 (pF) 30 Built-in 100 Built-in 30 Built-in C2 (pF) 30 Built-in 100 Built-in 30 Built-in R 1 kΩ 1 kΩ Not required Not required Not required Not required 3.20 Murata Mfg. Co., Ltd. 3.58 Inquiry: Murata Mfg. Co., Ltd •Murata Electronics North America. Inc.: TEL 1-404-436-1300 •Murata Europe Mnagement GmbH: TEL 49-911-66870 •Murata Electronics Singapore (Pte.) Ltd.: TEL 65-758-4233 TDK Corporation •TDK Corporation of America Chicago Regional Office: TEL 1-708-803-6100 •TDK Electronics Europe GmbH Components Division: TEL 49-2102-9450 •TDK Singapore (PTE) Ltd.: TEL 65-273-5022 •TDK Hongkong Co., Ltd.: TEL 852-736-2238 •Korea Branch, TDK Corporation: TEL 82-2-554-6633 29 MB89190/190A Series (6) Serial I/O Timings (VCC = 5.0 V±10%, AVSS = VSS= 0.0 V, TA = –40°C to +85°C) Parameter Serial clock cycle time SCK ↓ → SO time Valid SI → SCK ↑ SCK ↑ → valid SI hold time Serial clock “H” pulse width Serial clock “L” pulse width SCK ↓ → SO time Valid SI → SCK ↑ SCK ↑ → valid SI hold time Symbol tSCYC tSLOV tIVSH tSHIX tSHSL tSLSH tSLOV tIVSH tSHIX Pin SCK SCK, SO SI, SCK SCK, SI SCK SCK, SO SI, SCK SCK, SI External clock operation Internal clock operation Condition Value Min. 2 tinst* –200 1/2 tinst* 1/2 tinst* 1 tinst* 1 tinst* 0 1/2 tinst* 1/2 tinst* Max. — 200 — — — — 200 — — Unit µs ns µs µs µs µs ns µs µs Remarks *: For information on tinst, see “(4) Instruction Cycles.” Internal Shift Clock Mode t SCYC 2.4 V 0.8 V t SLOV 2.4 V 0.8 V t IVSH t SHIX 0.8 VCC 0.2 VCC 0.8 VCC 0.2 VCC 0.8 V SCK SO SI External Shift Clock Mode t SLSH 0.8 VCC 0.2 VCC 0.2 VCC t SLOV 2.4 V 0.8 V t IVSH t SHSL 0.8 VCC SCK SO t SHIX SI 0.8 VCC 0.2 VCC 0.8 VCC 0.2 VCC 30 MB89190/190A Series (7) Peripheral Input Timings (VCC = 5.0 V±10%, AVSS = VSS = 0.0 V, TA = –40°C to +85°C) Value Pin Unit Remarks Min. Max. EC, INT10 to INT12, INT20 to INT27 2 tinst* 2 tinst* — — µs µs Parameter Peripheral input “H” pulse width 1 Peripheral input “L” pulse width 1 Symbol tILIH1 tIHIL1 *: For information on tinst, see “(4) Instruction Cycles.” Peripheral Input Timing Diagram t IHIL t ILIH 0.8 VCC 0.8 VCC EC INT10 to INT12 INT20 to INT27 0.2 VCC 0.2 VCC (VCC = 5.0 V±10%, AVSS= VSS = 0.0 V, TA = –40°C to +85°C) Parameter Peripheral input “H” noise limit width Peripheral input “L” noise limit width Symbol tIHNC tILNC Pin EC, SI, SCK INT10 to INT12 EC, SI, SCK INT10 to INT12 Value Min. 7 7 Typ. 15 15 Max. 23 23 Unit ns ns Remarks Peripheral Input Timing Diagram t ILNC t IHNC 0.8 VCC 0.8 VCC EC, SCK, S1 INT10 to INT12 0.2 VCC 0.2 VCC 31 MB89190/190A Series 5. A/D Converter Electrical Characteristics (MB89190A Series Only) (AVCC = VCC = 3.5 V to 6.0 V, AVSS = VSS = 0.0 V, TA = –40°C to +85°C) Parameter Resolution Total error Linearity error Differential linearity error Zero transition voltage Full-scale transition voltage Inter channel disparity A/D mode conversion time Sense mode conversion time Analog port input current Analog input voltage Reference voltage IR Reference voltage supply current AVR IRH — IAIN — AVR = VCC = 5.0 V when A/ D conversion is operating AN0 to AN7 — 0 0 — — — — — 100 — 10 AVR VCC 300 1 µA V V µA µA — VOT — VFST — Symbol Pin Condition — Value Min. — — — — AVSS –1.0 LSB AVR –3.0 LSB — — — Typ. — — — — AVSS +0.5 LSB AVR –1.5 LSB — 44 tinst* 12 tinst* Max. 8 ±1.5 ±1.0 ±0.9 AVSS +2.0 LSB AVR Unit bit LSB LSB LSB Remarks AVR = AVCC mV mV 0.5 — — LSB µs µs *: For information on tinst, see “(4) Instruction Cycles” in “4. AC Characteristics.” 6. A/D Converter Glossary • Resolution Analog changes that are identifiable by the A/D converter. When the number of bits is 8, analog voltage can be divided into 28=256. Linearity error (unit: LSB) The deviation of the straight line connecting the zero transition point (“0000 0000” ↔ “0000 0001”) with the full-scale transition point (“1111 1110” ↔ “1111 1111”) from actual conversion characteristics. Differential linearity error (unit: LSB) The deviation of input voltage needed change the output code by 1 LSB from the theoretical value. • Total error (unit: LSB) The difference between theoretical and actual conversion values. 32 MB89190/190A Series Digital output 1111 1111 • • • • • • • • • • • • • • • • • • • • 0000 0000 0000 1111 1110 Theoretical conversion value Actual conversion value (1LSB × N + VOT) AVR 256 = VNT – (1LSB × N + VOT) 1LSB V( N + 1 ) T – VNT –1 1LSB VNT – (1LSB × N + 1LSB) 1LSB 1LSB = Linearity error Linearity error Differential linearity error = Total error = 0010 0001 0000 VOT VNT V( N + I )T VFST Analog input 7. Notes on Using A/D Converter • Input impedance of analog input pins The A/D converter used for the MB89190A series contains a sample hold circuit as illustrated below to fetch analog input voltage into the sample hold capacitor for eight instruction cycles after starting A/D conversion. For this reason, if the output impedance of the external circuit for the analog input is high, analog input voltage might not stabilize within the analog input sampling period. Therefore, it is recommended to keep the output impedance of the external circuit low (below 10 kΩ). Note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of approx. 0.1 µF for the analog input pin. Analog input equivalent circuit Analog input pin Sample hold circuit, . C = 33 pF . Comparator If the analog input impedance is higher than 10 kΩ, it is recommended to connect an external capacitor of approx. 0.1 µF. . R = 6 kΩ . Close for 8 instruction cycles after starting A/D conversion. Analog channel selector • Error The smaller the AVR-AVSS, the greater the error would become relatively. 33 MB89190/190A Series s EXAMPLE CHARACTERISTICS (1) “L” Level Output Voltage VOL1 vs. IOL VOL (V) 0.30 TA = +25°C 0.25 0.20 0.15 0.10 0.05 0.00 VCC = 2.5 V VCC = 3.0 V VCC = 2.0 V VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V 0.5 0.4 0.3 0.2 0.1 0.0 VOL (V) 0.6 VOL2 vs. IOL VCC = 2.5 V VCC = 3.0 V VCC = 2.0 V TA = +25°C VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V 0 1 2 3 4 5 IOL (mA) 0 1 2 3 4 5 6 7 8 9 10 IOL (mA) VOL3 vs. IOL VOL (V) 1.2 TA = +25°C 1.0 0.8 VCC = 3.0 V 0.6 0.4 0.2 0.0 VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V VCC = 2.0 V VCC = 2.5 V 0 2 4 6 8 10 12 14 16 18 20 IOL (mA) 34 MB89190/190A Series (2) “H” Level Output Voltage VOH1 vs. IOH VCC = 4.0 V VCC = 2.5 V VCC = 2.0 V VCC = 3.0 V VCC = 5.0 V VCC = 6.0 V VOH2 vs. IOH VCC - VOH (V) VCC = 3.0 V 3.0 TA = +25°C VCC = 2.5 V 2.5 2.0 1.5 1.0 0.5 0 –1 –2 –3 –4 –5 IOH (mA) 0.0 0 –4 –8 – 12 – 16 – 20 IOH (mA) VCC = 2.0 V VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V VCC - VOH (V) 0.6 TA = +25°C 0.5 0.4 0.3 0.2 0.1 0.0 VOH3 vs. IOH VCC - VOH (V) VCC = 2.0 V 1.2 TA = + 25°C 1.0 0.8 0.6 0.4 0.2 0.0 0 –2 –4 –6 –8 – 10 IOH (mA) VCC = 4.0 V VCC = 5.0 V VCC = 6.0 V VCC = 2.5 V VCC = 3.0 V (3) “H” Level Input Voltage/“L” Level Input Voltage (CMOS Input) (4) “H” Level Input Voltage/“L” Level Input Voltage (Hysteresis Input) VIN (V) 5.0 4.5 4.0 VIN vs. VCC TA = +25°C VIN (V) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 1 2 VIN vs. VCC TA= +25°C 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0 1 2 3 4 5 VIHS VILS 6 7 VCC (V) 3 4 5 6 7 VCC (V) VIHS: Threshold when input voltage in hysteresis characteristics is set to “H” level VILS: Threshold when input voltage in hysteresis characteristics is set to “L” level 35 MB89190/190A Series (5) Power Supply Current (External Clock) ICC (mA) 6 5 4 3 2 1 0 1 2 3 4 ICCH vs. VCC 5 6 7 VCC (V) ICCH (µA) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 1 2 3 4 5 6 7 VCC (V) 0 1 2 3 4 5 6 7 AVR (V) 50 25 75 TA = +25°C IR (µA) 150 TA = +25°C 125 100 IR vs. AVR Fc = 1.0 MHz Fc = 4.2 MHz Fc = 3.0 MHz ICC vs. VCC TA = +25°C ICCS (mA) 1.50 1.25 1.00 0.75 0.50 0.25 0.00 1 2 3 4 5 6 7 VCC (V) ICCS vs. VCC TA = +25°C Fc = 4.2 MHz Fc = 3.0 MHz Fc = 1.0 MHz (6) Pull-up Resistance RPULL (kΩ) 1000 RPULL vs. VCC TA = +25°C 100 10 1 2 3 4 5 6 VCC (V) 36 MB89190/190A Series s MASK OPTION LIST Part number No. MB89191 MB89191A MB89193 MB89193A MB89195 MB89195A MB89P195 –101*2 None None MB89P195A –201*2 None MB89PV190 MB89PV190A Fixed Not available Not available Specifying procedure Specify when ordering masking P00 to P07 Selectable by pin Port pull-up P30 to P37 resistors P00 to P03 Selectable Not P40 to P45 by pin available Power-on reset • Power-on reset provided • No power-on reset Selection of oscillation stabilization wait time (at 4.2 MHz)*1 3 • 218/FC (approx. 62.4 ms) • 216/FC (approx. 15.6 ms) • 212/FC (approx. 0.98 ms) • 22/FC (approx. 0 ms) Specify when ordering masking Selectable by pin 1 Selectable Not None by pin available Provided Provided 2 Selectable Provided Provided Selectable Fixed to 216/FC Selectable Fixed to 216/FC Fixed to 216/FC 4 Reset pin output • Reset output provided • No reset output Oscillation type of clock 1 Crystal and ceramic oscillators 2 CR Selectable Provided Selectable Provided Provided 5 Selectable “1” only Selectable “1” only “1” only *1: The oscillation stabilization time is generated by dividing the original clock oscillation. The time described in this item should be used as a rough guideline since the oscillation cycle is unstable immediately after oscillation starts. “FC” indicates the original oscillation frequency. *2: –101 and –201 are provided respectively for the MB89P195 and MB89P195A OTP versions as the standard products. 37 MB89190/190A Series s ORDERING INFORMATION Part number MB89191PF MB89193PF MB89195PF MB89P195PF-101PF MB89191APF MB89191AHPF MB89193APF MB89193AHPF MB89195APF MB89P195APF-201PF MB89191P-SH MB89193P-SH MB89195P-SH MB89191AP-SH MB89191AHP-SH MB89193AP-SH MB89193AHP-SH MB89195AP-SH MB89191P MB89193P MB89195P MB89P195P-101P MB89191AP MB89191AHP MB89193AP MB89193AHP MB89195AP MB89P195AP-201P MB89PV190CF MB89PV190ACF Package Remarks 28-pin Plastic SOP (FPT-28P-M17) 28-pin Plastic SH-DIP (DIP-28C-M03) 28-pin Plastic DIP (DIP-28P-M05) 48-pin Ceramic MQFP (MQP-48C-P01) 38 MB89190/190A Series s PACKAGE DIMENSION 28-pin Plastic SOP (FPT-28P-M17) 28 17.75 –0.20 .699 –.008 +0.25 +.010 15 Details of "B" part Details of "A" part 0.35(.014) 11.80±0.30 (.465±.012) 8.60±0.20 (.339±.008) INDEX "A" 0.20(.008) 0.18(.007) MAX 0.68(.027) MAX 14 0.15(.006) 0.20(.008) 0.18(.007) MAX 0.68(.027) MAX 1 1.27(.050) TYP "B" 0.45±0.10 (.018±.004) 0.13(.005) M 0.15±0.05 (.006±.002) 2.80(.110)MAX (Mounting height) 0.10(.004) 16.51(.650) REF 0.80±0.20 (.031±.008) 10.20±0.30 (.402±.012) 0(0)MIN (STAND OFF) C 1994 FUJITSU LIMITED F28048S-1C-1 Dimensions in mm (inches) 28-pin Plastic DIP (DIP-28P-M05) 35.73 –0.30 1.407 –.012 +0.20 +.008 INDEX-1 13.80±0.25 (.543±.010) INDEX-2 0.99 –0 .039 +0.50 +.020 –0 1.52 –0 .060 –0 +0.50 +.020 0.51(.020)MIN 4.96(.195)MAX 0.25±0.05 (.010±.002) 3.00(.118)MIN 1.58(.062) MAX 2.54(.100) TYP 0.46±0.08 (.018±.003) 15.24(.600) TYP 15°MAX C 1994 FUJITSU LIMITED D28013S-3C-2 Dimensions in mm (inches) 39 MB89190/190A Series 28-pin Plastic SH-DIP (DIP-28P-M03) 26.00 –0.30 1.024 +.008 –.012 +0.20 INDEX-1 9.10±0.25 (.358±.010) INDEX-2 4.85(.191)MAX 0.51(.020)MIN 0.25±0.05 (.010±.002) 3.00(.118)MIN 0.45±0.10 (.018±.004) 1.00 –0 +0.50 +.020 .039 –0 1.778±0.18 (.070±.007) 1.778(.070) MAX 10.16(.400) TYP 15° 23.114(.910)REF C 1994 FUJITSU LIMITED D28012S-3C-3 Dimensions in mm (inche 48-pin Ceramic MQFP (MQP-48C-P01) 17.20(.677)TYP 15.00±0.25 (.591±.010) 14.82±0.35 (.583±.014) 1.50(.059)TYP 1.00(.040)TYP 8.80(.346)REF 0.80±0.22 (.0315±.0087) PIN No.1 INDEX PIN No.1 INDEX 1.02±0.13 (.040±.005) 10.92 –0.0 .430 –0 +0.13 +.005 7.14(.281) 8.71(.343) TYP TYP PAD No.1 INDEX 0.30(.012)TYP 4.50(.177)TYP 1.10 –0.25 .043 –.010 +0.45 +.018 0.40±0.08 (.016±.003) 0.60(.024)TYP 8.50(.335)MAX 0.15±0.05 (.006±.002) C 1994 FUJITSU LIMITED M48001SC-4-2 Dimensions in mm (inches) 40 MB89190/190A Series FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document are presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. F0112 © FUJITSU LIMITED Printed in Japan