MB90348CASPFV

FUJITSU SEMICONDUCTOR DATA SHEET DS07-13730-3E 16-bit Proprietary Microcontroller CMOS F2MC-16LX MB90340 Series MB90F342A(S), MB90F342CA(S), MB90F343A(S), MB90F343CA(S), MB90F345A(S), MB90F345CA(S), MB90F346A(S), MB90F346CA(S), MB90F347A(S), MB90F347CA(S), MB90F349A(S), MB90F349CA(S), MB90341A(S), MB90341CA(S), MB90342A(S), MB90342CA(S), MB90346A(S), MB90346CA(S), MB90347A(S), MB90347CA(S), MB90348A(S), MB90348CA(S), MB90349A(S), MB90349CA(S), MB90V340A-101/102 s DESCRIPTION The MB90340-series with up to 2 FULL-CAN* interfaces and FLASH ROM is especially designed for automotive and other industrial applications. Its main feature are the on-board CAN Interfaces, which conform to V2.0 Part A and Part B, while supporting a very flexible message buffer scheme and so offering more functions than a normal full CAN approach. With the new 0.35 µm CMOS technology, Fujitsu now offers on-chip FLASH-ROM program memory up to 512 Kbytes. The power supply (3 V) is supplied to the internal MCU core from an internal regulator circuit. This creates a major advantage in terms of EMI and power consumption. The internal PLL clock frequency multiplier provides an internal 42 ns instruction cycle time from an external 4 MHz clock. The unit features an 8 channel Output Compare Unit and 8 channel Input Capture Unit with 2 separate 16-bit free running timers. 4 UARTs constitute additional functionality for communication purposes. * : Controller Area Network (CAN) - License of Robert Bosch GmbH Note : F2MC stands for FUJITSU Flexible Microcontroller, a registered trademark of FUJITSU LIMITED. s PACKAGES 100-pin Plastic QFP 100-pin Plastic LQFP (FPT-100P-M06) (FPT-100P-M05) MB90340 Series s FEATURES • Clock • Built-in PLL clock frequency multiplication circuit • Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and multiplication of 1 to 6 times of oscillation clock (for 4 MHz oscillation clock, 4 MHz to 24 MHz). • Operation by sub-clock (up to 50 kHz : 100 kHz oscillation clock divided two) is allowed. (devices without Ssuffix only) • Minimum execution time of instruction : 42 ns (when operating with 4-MHz oscillation clock, and 6-time multiplied PLL clock). • Built-in Clock Modulation circuit • 16 Mbyte CPU memory space • 24-bit internal addressing • Instruction system best suited to controller • Wide choice of data types (bit, byte, word, and long word) • Wide choice of addressing modes(23 types) • Enhanced multiply-divide instructions and RETI instructions • Enhanced high-precision computing with 32-bit accumulator • Instruction system compatible with high-level language (C language) and multitask • Employing system stack pointer • Enhanced various pointer indirect instructions • Barrel shift instructions • Increased processing speed • 4-byte instruction queue • Powerful interrupt function • Powerful 8-level, 34-condition interrupt feature • Up to 16 external interrupts are supported • Automatic data transfer function independent of CPU • Expanded intelligent I/O service function (EI2OS) : up to 16 channels • DMA : up to 16 channels • Low power consumption (standby) mode • Sleep mode (a mode that halts CPU operating clock) • Main timer mode (time-base timer mode that is transfered from main clock mode) • PLL timer mode (time-base timer mode that is transfered from PLL clock mode) • Watch mode (a mode that operates sub clock and clock timer only) • Stop mode (a mode that stops oscillation clock and sub clock) • CPU blocking operation mode • Process • CMOS technology • I/O port • General-purpose input/output port (CMOS output) - 80 ports (devices without S-suffix) - 82 ports (devices with S-suffix) (Continued) 2 MB90340 Series (Continued) • Timer • Time-base timer, clock timer, watchdog timer : 1 channel • 8/16-bit PPG timer : 8-bit X 16 channels, or 16-bit X 8 channels • 16-bit reload timer : 4 channels • 16- bit input/output timer - 16-bit free run timer : 2 channel (FRT0 : ICU 0/1/2/3, OCU 0/1/2/3, FRT1 : ICU 4/5/6/7, OCU 4/5/6/7) - 16- bit input capture: (ICU) : 8 channels - 16-bit output compare : (OCU) : 8 channels • Full-CAN interface : up to 2 channels • Compliant with Ver2.0A and Ver2.0B CAN specifications • Flexible message buffering (mailbox and FIFO buffering can be mixed) • CAN wake-up function • UART (LIN/SCI) : up to 4 channels • Equipped with full-duplex double buffer • Clock-asynchronous or clock-synchronous serial transmission is available • I2C interface* : up to 2 channels (devices with C-suffix only) • Up to 400 Kbits/s transfer rate • DTP/External interrupt : up to 16 channels, CAN wakeup : up to 2 channels • Module for activation of expanded intelligent I/O service (EI2OS), DMA, and generation of external interrupt. • Delay interrupt generator module • Generates interrupt request for task switching. • 8/10-bit A/D converter : 16/24 channels • Resolution is selectable between 8-bit and 10-bit. • Activation by external trigger input is allowed. • Conversion time : 3 µs (at 24-MHz machine clock, including sampling time) • Program patch function • Address matching detection for 6 address pointers. • Internal voltage regulator • Supports 3 V MCU core, offering low EMI and low power consumption figures • Programmable input levels • Automotive/CMOS-Schmitt (initial level is Automotive in Single chip mode) • TTL level (initial level for External bus mode) • FLASH memory security function • Protects the content of FLASH memory (FLASH memory device only) • External bus interface • Clock monitor function * : I2C license : Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use, these components in an I2C system provided that the system conforms to the I2C Standard Specification as defined by Philips. 3 MB90340 Series s PRODUCT LINEUP Part Number MB90F342A(S), MB90F342CA(S), MB90F343A(S)*1, MB90F343CA(S)*1, MB90F345A(S), MB90F345CA(S), MB90F346A(S), MB90F346CA(S), MB90F347A(S), MB90F347CA(S), MB90F349A(S), MB90F349CA(S), MB90341A(S)*1, MB90341CA(S)*1, MB90342A(S)*1, MB90342CA(S)*1, MB90346A(S), MB90346CA(S), MB90347A(S), MB90347CA(S), MB90348A(S)*1, MB90348CA(S)*1, MB90349A(S)*1, MB90349CA(S)*1 MB90V340A-101/102 Parameter CPU System clock F2MC-16LX CPU On-chip PLL clock multiplier (×1, ×2, ×3, ×4, ×6, 1/2 when PLL stops) Minimum instruction execution time : 42 ns (4 MHz osc. PLL × 6) MASK ROM, Flash memory 512 Kbytes : MB90F345A(S), MB90F345CA(S) 384 Kbytes : MB90F343A(S), MB90F343CA(S) 256 Kbytes : MB90F342A(S), MB90F342CA(S), MB90F349A(S), MB90F349CA(S), MB90342A(S), MB90342CA(S), MB90349A(S), MB90349CA(S) 128 Kbytes : MB90F347A(S), MB90F347CA(S), MB90341A(S), MB90341CA(S),MB90348A(S), MB90348CA(S), MB90347A(S), MB90347CA(S) 64 Kbytes : MB90F346A(S), MB90F346CA(S), MB90346A(S), MB90346CA(S) 20 Kbytes : MB90F343A(S), MB90F343CA(S), MB90F345A(S), MB90F345CA(S) 16 Kbytes : MB90F342A(S), MB90F342CA(S), MB90F349A(S), MB90F349CA(S), MB90341A(S), MB90341CA(S), MB90342A(S), MB90342CA(S), MB90348A(S), MB90348CA(S), MB90349A(S), MB90349CA(S) 6 Kbytes : MB90F347A(S), MB90F347CA(S), MB90347A(S), MB90347CA(S) 2 Kbytes : MB90F346A(S), MB90F346CA(S), MB90346A(S), MB90346CA(S) ROM External RAM 30 Kbytes Emulator-specific power supply*2 Technology Operating voltage range Temperature range Package  0.35 µm CMOS with regulator for internal power supply + Flash memory with Charge pump for programming voltage 3.5 V - 5.5 V : at normal operating (not using A/D converter) 4.0 V - 5.5 V : at using A/D converter/Flash programming 4.5 V - 5.5 V : at using external bus −40 °C to +105 °C QFP-100, LQFP-100 4 channels Yes 0.35 µm CMOS with regulator for internal power supply 5 V ± 1 0%  PGA-299 5 channels UART Wide range of baud rate settings using a dedicated reload timer Special synchronous options for adapting to different synchronous serial protocols LIN functionality working either as master or slave LIN device devices with ‘C’-suffix : 2ch devices without ‘C’-suffix :  2 channels I2C (400 Kbps) (Continued) 4 MB90340 Series Part Number MB90F342A(S), MB90F342CA(S), MB90F343A(S)*1, MB90F343CA(S)*1, MB90F345A(S), MB90F345CA(S), MB90F346A(S), MB90F346CA(S), MB90F347A(S), MB90F347CA(S), MB90F349A(S), MB90F349CA(S), MB90341A(S)*1, MB90341CA(S)*1, MB90342A(S)*1, MB90342CA(S)*1, MB90346A(S), MB90346CA(S), MB90347A(S), MB90347CA(S), MB90348A(S)*1, MB90348CA(S)*1, MB90349A(S)*1, MB90349CA(S)*1 MB90V340A-101/102 Parameter A/D Converter 16-bit Reload Timer (4 channels) 16-bit I/O Timer (2 channels) 16-bit Output Compare (8 channels) 16-bit Input Capture (8 channels) devices with ‘C’-suffix : 24ch devices without ‘C’-suffix : 16ch 10-bit or 8-bit resolution Conversion time : Min 3 µs include sample time (per one channel) 24 input channels Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys = Machine clock frequency) Supports External Event Count function Signals an interrupt when overflowing Supports Timer Clear when a match with Output Compare (Channel 0, 4) Operation clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24, fsys/25, fsys/26, fsys/27 (fsys = Machine clock freq.) I/O Timer 0 (clock input FRCK0) corresponds to ICU 0/1/2/3, OCU 0/1/2/3 I/O Timer 1 (clock input FRCK1) corresponds to ICU 4/5/6/7, OCU 4/5/6/7 Signals an interrupt when 16-bit I/O Timer match output compare registers. A pair of compare registers can be used to generate an output signal. Rising edge, falling edge or rising & falling edge sensitive Signals an interrupt upon external event Supports 8-bit and 16-bit operation modes Sixteen 8-bit reload counters 8/16-bit Sixteen 8-bit reload registers for L pulse width Programmable Pulse Sixteen 8-bit reload registers for H pulse width Generator A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as (8 channels) 8-bit prescaler plus 8-bit reload counter Operation clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24 or 128 µs@fosc = 4 MHz (fsys = Machine clock frequency, fosc = Oscillation clock frequency) 2 channels : MB90F342A(S), MB90F342CA(S), MB90F345A(S), MB90F345CA(S), MB90341A(S), MB90341CA(S), MB90342A(S), MB90342CA(S) MB90F346A(S), MB90F346CA(S), MB90F347A(S), MB90F347CA(S), MB90F349A(S), MB90F349CA(S), MB90346A(S), MB90346CA(S), MB90347A(S), MB90347CA(S), MB90348A(S), MB90348CA(S), MB90349A(S), MB90349CA(S) 1 channel : 3 channels CAN Interface Conforms to CAN Specification Version 2.0 Part A and B Automatic re-transmission in case of error Automatic transmission responding to Remote Frame Prioritized 16 message buffers for data and ID’s Supports multiple messages Flexible configuration of acceptance filtering : Full bit compare/Full bit mask/Two partial bit masks Supports up to 1 Mbps (Continued) 5 MB90340 Series (Continued) MB90F342A(S), MB90F342CA(S), MB90F343A(S)*1, MB90F343CA(S)*1, MB90F345A(S), MB90F345CA(S), MB90F346A(S), MB90F346CA(S), Part Number MB90F347A(S), MB90F347CA(S), MB90F349A(S), MB90F349CA(S), MB90341A(S)*1, MB90341CA(S)*1, MB90342A(S)*1, MB90342CA(S)*1, Parameter MB90346A(S), MB90346CA(S), MB90347A(S), MB90347CA(S), MB90348A(S)*1, MB90348CA(S)*1, MB90349A(S)*1, MB90349CA(S)*1 MB90V340A-101/102 External Interrupt (16 channels) D/A converter Up to100 kHz Subclock for low power operation Can be used rising edge, falling edge, starting up by H/L level input, external interrupt, expanded inteligent I/O services (EI2OS) and DMA  without subclock with subclock : devices with ‘S’-suffix or MB90V340A-101 : devices without ‘S’-suffix or MB90V340A-102 2 channels I/O Ports Virtually all external pins can be used as general purpose I/O port All push-pull outputs Bit-wise settable as input/output or peripheral signal Settable in pin-wise of 8 as CMOS schmitt trigger/ automotive inputs (default) TTL input level settable for external bus (32-pin only for external bus) Supports automatic programming, Embedded AlgorithmTM*3 Write/Erase/Erase-Suspend/Resume commands A flag indicating completion of the algorithm Number of erase cycles : 10,000 times Data retention time : 20 years Boot block configuration Erase can be performed on each block Block protection with external programming voltage Flash Security Feature for protecting the content of the Flash (except for MB90F346A(S) and MB90F346CA (S) ) Flash Memory  *1 : These devices are under development. *2 : It is setting of Jumper switch (TOOL VCC) when Emulator (MB2147-01) is used. Please refer to the Emulator hardware manual about details. *3 : Embedded Algorithm is a trade mark of Advanced Micro Devices Inc. 6 MB90340 Series s PIN ASSIGNMENTS • MB90V340A-101/MB90V340A-102 (TOP VIEW) P04/AD04/INT12 P05/AD05/INT13 P06/AD06/INT14 P07/AD07/INT15 P10/AD08/TIN1 P11/AD09/TOT1 P12/AD10/SIN3/NT11R P13/AD11/SOT3 P14/AD12/SCK3 Vcc Vss X1 X0 P15/AD13/SIN4 P16/AD14/SOT4 P17/AD15/SCK4 P20/A16/PPG9(8) P21/A17/PPGB(A) P22/A18/PPGD(C) P23/A19/PPGF(E) 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 81 50 82 49 83 48 84 47 85 46 86 45 87 44 88 43 89 42 90 41 QFP - 100 91 40 92 39 93 38 94 37 95 36 96 35 97 34 98 33 99 32 100 31 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 P31/RD/IN5 P32/WRL/WR/RX2/INT10R P33/WRH/TX2 P34/HRQ/OUT4 P35/HAK/OUT5 P36/RDY/OUT6 P37/CLK/OUT7 P40/X0A* P41/X1A* Vcc Vss C P42/IN6/RX1/INT9R P43/IN7/TX1 P44/SDA0/FRCK0 P45/SCL0/FRCK1 P46/SDA1 P47/SCL1 P50/AN8/SIN2 P51/AN9/SOT2 P52/AN10/SCK2 P53/AN11/TIN3 P54/AN12/TOT3 P55/AN13 P56/AN14/DA00 P24/A20/IN0 P25/A21/IN1 P26/A22/IN2 P27/A23/IN3 P30/ALE/IN4 P03/AD03/INT11 P02/AD02/INT10 P01/AD01/INT9 P00/AD00/INT8 PA1/TX0 PA0/RX0/INT8R P97/OUT3 P96/OUT2 P95/OUT1 P94/OUT0 P93/PPG7(6) P92/PPG5(4) P91/PPG3(2) P90/PPG1(0) Vss Vcc P87/SCK1 P86/SOT1 P85/SIN1 P84/SCK0/INT15R P83/SOT0/TOT2 P82/SIN0/TIN2/INT14R P81/TOT0/CKOT/INT13R P80/TIN0/ADTG/INT12R P77/AN23/INT7 P76/AN22/INT6 RST MD0 MD1 MD2 P75/AN21/INT5 P74/AN20/INT4 P73/AN19/INT3 P72/AN18/INT2 P71/AN17/INT1 P70/AN16/INT0 Vss P67/AN7/PPGE(F) P66/AN6/PPGC(D) P65/AN5/PPGA(B) P64/AN4/PPG8(9) P63/AN3/PPG6(7) P62/AN2/PPG4(5) P61/AN1/PPG2(3) P60/AN0/PPG0(1) AVss AVRL AVRH AVcc P57/AN15/DA01 (FPT-100P-M06) * : X0A, X1A : MB90V340A-102 P40, P41 : MB90V340A-101 (Continued) 7 MB90340 Series (Continued) (TOP VIEW) P81/TOT0/CKOT/INT13R P80/TIN0/ADTG/INT12R P77/AN23/INT7 P76/AN22/INT6 P00/AD00/INT8 PA1/TX0 PA0/RX0/INT8R P97/OUT3 P96/OUT2 P95/OUT1 P94/OUT0 P93/PPG7(6) P92/PPG5(4) P91/PPG3(2) P90/PPG1(0) Vss Vcc P87/SCK1 P86/SOT1 P85/SIN1 P84/SCK0/INT15R P83/SOT0/TOT2 P82/SIN0/TIN2/INT14R P01/AD01/INT9 P02/AD02/INT10 P03/AD03/INT11 P04/AD04/INT12 P05/AD05/INT13 P06/AD06/INT14 P07/AD07/INT15 P10/AD08/TIN1 P11/AD09/TOT1 P12/AD10/SIN3/NT11R P13/AD11/SOT3 P14/AD12/SCK3 Vcc Vss X1 X0 P15/AD13/SIN4 P16/AD14/SOT4 P17/AD15/SCK4 P20/A16/PPG9(8) P21/A17/PPGB(A) P22/A18/PPGD(C) P23/A19/PPGF(E) P24/A20/IN0 P25/A21/IN1 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 76 50 77 49 48 78 47 79 46 80 45 81 44 82 43 83 42 84 41 85 40 86 39 87 38 88 LQFP - 100 37 89 36 90 35 91 34 92 33 93 32 94 31 95 30 96 29 97 98 28 99 27 100 26 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 P26/A22/IN2 P27/A23/IN3 P30/ALE/IN4 P31/RD/IN5 P32/WRL/WR/RX2/INT10R P33/WRH/TX2 P34/HRQ/OUT4 P36/RDY/OUT6 P37/CLK/OUT7 P40/X0A* P41/X1A* Vcc Vss C P42/IN6/RX1/INT9R P43/IN7/TX1 P44/SDA0/FRCK0 P45/SCL0/FRCK1 P46/SDA1 P47/SCL1 P50/AN8/SIN2 P51/AN9/SOT2 P52/AN10/SCK2 P53/AN11/TIN3 P35/HAK/OUT5 RST MD0 MD1 MD2 P75/AN21/INT5 P74/AN20/INT4 P73/AN19/INT3 P72/AN18/INT2 P71/AN17/INT1 P70/AN16/INT0 Vss P67/AN7/PPGE(F) P66/AN6/PPGC(D) P65/AN5/PPGA(B) P64/AN4/PPG8(9) P63/AN3/PPG6(7) P62/AN2/PPG4(5) P61/AN1/PPG2(3) P60/AN0/PPG0(1) AVss AVRL AVRH AVcc P57/AN15/DA01 P56/AN14/DA00 P55/AN13 P54/AN12/TOT3 (FPT-100P-M05) * : X0A, X1A : MB90V340A-102 P40, P41 : MB90V340A-101 8 MB90340 Series • MB90F342A(S) / MB90F343A(S) / MB90F345A(S) / MB90F346A(S) / MB90F347A(S) / MB90F349A(S) / MB90341A(S) / MB90342A(S) /MB90346A(S) / MB90347A(S) / MB90348A(S) / MB90349A(S) (TOP VIEW) P03/AD03/INT11 P02/AD02/INT10 P01/AD01/INT9 P00/AD00/INT8 PA1/TX0 PA0/RX0/INT8R P97/OUT3 P96/OUT2 P95/OUT1 P94/OUT0 P93/PPG7(6) P92/PPG5(4) P91/PPG3(2) P90/PPG1(0) Vss Vcc P87/SCK1 P86/SOT1 P85/SIN1 P84/SCK0/INT15R P83/SOT0/TOT2 P82/SIN0/TIN2/INT14R P81/TOT0/CKOT/INT13R P80/TIN0/ADTG/INT12R P77/INT7 P76/INT6 MD0 MD1 P04/AD04/INT12 P05/AD05/INT13 P06/AD06/INT14 P07/AD07/INT15 P10/AD08/TIN1 P11/AD09/TOT1 P12/AD10/SIN3/NT11R P13/AD11/SOT3 P14/AD12/SCK3 Vcc Vss X1 X0 P15/AD13 P16/AD14 P17/AD15 P20/A16/PPG9(8) P21/A17/PPGB(A) P22/A18/PPGD(C) P23/A19/PPGF(E) 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 81 49 82 48 83 47 84 46 85 45 86 44 87 43 88 QFP - 100 42 89 41 90 40 91 39 92 38 93 37 94 36 95 35 96 34 97 33 98 32 99 31 100 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 P24/A20/IN0 P25/A21/IN1 P26/A22/IN2 P27/A23/IN3 P30/ALE/IN4 P31/RD/IN5 P32/WRLX/WRX/INT10R P33/WRH P34/HRQ/OUT4 P35/HAK/OUT5 P36/RDY/OUT6 P37/CLK/OUT7 P40/X0A * P41/X1A * Vcc Vss C P42/IN6/RX1/INT9R P43/IN7/TX1 P44/FRCK0 P45/FRCK1 P46 P47 P50/AN8/SIN2 P51/AN9/SOT2 P52/AN10/SCK2 P53/AN11/TIN3 P54/AN12/TOT3 P55/AN13 P56/AN14 RST MD2 P75/INT5 P74/INT4 P73/INT3 P72/INT2 P71/INT1 P70/INT0 Vss P67/AN7/PPGE(F) P66/AN6/PPGC(D) P65/AN5/PPGA(B) P64/AN4/PPG8(9) P63/AN3/PPG6(7) P62/AN2/PPG4(5) P61/AN1/PPG2(3) P60/AN0/PPG0(1) AVss AVRL AVRH AVcc P57/AN15 (FPT-100P-M06) * : X0A, X1A : P40, P41 : MB90F342A/F343A/F345A/F346A/F347A/F349A/341A/342A/346A/347A/348A/349A MB90F342AS/F343AS/F345AS/F346AS/F347AS/F349AS MB90341AS/342AS/346AS/347AS/348AS/349AS (Continued) 9 MB90340 Series (Continued) (TOP VIEW) P81/TOT0/CKOT/INT13R P80/TIN0/ADTG/INT12R P77/INT7 P76/INT6 P00/AD00/INT8 PA 1 / T X 0 PA0/RX0/INT8R P97/OUT3 P96/OUT2 P95/OUT1 P94/OUT0 P93/PPG7(6) P92/PPG5(4) P91/PPG3(2) P90/PPG1(0) Vss Vcc P87/SCK1 P86/SOT1 P85/SIN1 P84/SCK0/INT15R P83/SOT0/TOT2 P82/SIN0/TIN2/INT14R P01/AD01/INT9 P02/AD02/INT10 P03/AD03/INT11 P04/AD04/INT12 P05/AD05/INT13 P06/AD06/INT14 P07/AD07/INT15 P10/AD08/TIN1 P11/AD09/TOT1 P12/AD10/SIN3/NT11R P13/AD11/SOT3 P14/AD12/SCK3 Vcc Vss X1 X0 P15/AD13 P16/AD14 P17/AD15 P20/A16/PPG9(8) P21/A17/PPGB(A) P22/A18/PPGD(C) P23/A19/PPGF(E) P24/A20/IN0 P25/A21/IN1 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 76 50 49 77 48 78 47 79 80 46 81 45 82 44 83 43 84 42 85 41 86 40 87 39 LQFP - 100 88 38 89 37 90 36 91 35 92 34 93 33 94 32 95 31 96 30 97 29 98 28 99 27 100 26 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 P26/A22/IN2 P27/A23/IN3 P30/ALE/IN4 P31/RD/IN5 P32/WRL/WR/INT10R P33/WRH P34/HRQ/OUT4 P35/HAK/OUT5 P36/RDY/OUT6 P37/CLK/OUT7 P40/X0A* P41/X1A* Vcc Vss C P42/IN6/RX1/INT9R P43/IN7/TX1 P44/FRCK0 P45/FRCK1 P46 P47 P50/AN8/SIN2 P51/AN9/SOT2 P52/AN10/SCK2 P53/AN11/TIN3 RST MD0 MD1 MD2 P75/INT5 P74/INT4 P73/INT3 P72/INT2 P71/INT1 P70/INT0 Vss P67/AN7/PPGE(F) P66/AN6/PPGC(D) P65/AN5/PPGA(B) P64/AN4/PPG8(9) P63/AN3/PPG6(7) P62/AN2/PPG4(5) P61/AN1/PPG2(3) P60/AN0/PPG0(1) AVss AVRL AVRH AVcc P57/AN15 P56/AN14 P55/AN13 P54/AN12/TOT3 (FPT-100P-M05) * : X0A, X1A : P40, P41 : MB90F342A/F343A/F345A/F346A/F347A/F349A/341A/342A/346A/347A/348A/349A MB90F342AS/F343AS/F345AS/F346AS/F347AS/F349AS MB90341AS/342AS/346AS/347AS/348AS/349AS 10 MB90340 Series • MB90F342CA(S) / MB90F343CA(S) / MB90F345CA(S) / MB90F346CA(S) / MB90F347CA(S) / MB90F349CA(S) / MB90341CA(S) / MB90342CA(S) /MB90346CA(S) / MB90347CA(S) / MB90348CA(S) / MB90349CA(S) (TOP VIEW) P03/AD03/INT11 P02/AD02/INT10 P01/AD01/INT9 P00/AD00/INT8 PA 1 / T X 0 PA0/RX0/INT8R P97/OUT3 P96/OUT2 P95/OUT1 P94/OUT0 P93/PPG7(6) P92/PPG5(4) P91/PPG3(2) P90/PPG1(0) Vss Vcc P87/SCK1 P86/SOT1 P85/SIN1 P84/SCK0/INT15R P83/SOT0/TOT2 P82/SIN0/TIN2/INT14R P81/TOT0/CKOT/INT13R P80/TIN0/ADTG/INT12R P77/AN23/INT7 P76/AN22/INT6 MD0 MD1 P04/AD04/INT12 P05/AD05/INT13 P06/AD06/INT14 P07/AD07/INT15 P10/AD08/TIN1 P11/AD09/TOT1 P12/AD10/SIN3/NT11R P13/AD11/SOT3 P14/AD12/SCK3 Vcc Vss X1 X0 P15/AD13 P16/AD14 P17/AD15 P20/A16/PPG9(8) P21/A17/PPGB(A) P22/A18/PPGD(C) P23/A19/PPGF(E) 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 81 82 49 83 48 84 47 85 46 86 45 87 44 88 43 89 42 QFP - 100 90 41 91 40 92 39 93 38 94 37 95 36 96 35 97 34 98 33 99 32 100 31 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 P31/RD/IN5 P32/WRL/WR/INT10R P35/HAK/OUT5 P36/RDY/OUT6 P37/CLK/OUT7 P40/X0A* P41/X1A* Vcc Vss C P42/IN6/RX1/INT9R P43/IN7/TX1 P44/SDA0/FRCK0 P45/SCL0/FRCK1 P46/SDA1 P47/SCL1 P50/AN8/SIN2 P51/AN9/SOT2 P52/AN10/SCK2 P53/AN11/TIN3 P54/AN12/TOT3 P55/AN13 P56/AN14 P33/WRH P34/HRQ/OUT4 P24/A20/IN0 P25/A21/IN1 P26/A22/IN2 P27/A23/IN3 P30/ALE/IN4 MD2 RST P75/AN21/INT5 P74/AN20/INT4 P73/AN19/INT3 P72/AN18/INT2 P71/AN17/INT1 P70/AN16/INT0 Vss P67/AN7/PPGE(F) P66/AN6/PPGC(D) P65/AN5/PPGA(B) P64/AN4/PPG8(9) P63/AN3/PPG6(7) P62/AN2/PPG4(5) P61/AN1/PPG2(3) P60/AN0/PPG0(1) AVss AVRL AVRH AVcc P57/AN15 (FPT-100P-M06) * : X0A, X1A : MB90F342CA/F343CA/F345CA/F346CA/F347CA/F349CA MB90341CA/342CA/346CA/347CA/348CA/349CA P40, P41 : MB90F342CAS/F343CAS/F345CAS/F346CAS/F347CAS/F349CAS MB90341CAS/342CAS/346CAS/347CAS/348CAS/349CAS (Continued) 11 MB90340 Series (Continued) (TOP VIEW) P81/TOT0/CKOT/INT13R P80/TIN0/ADTG/INT12R P77/AN23/INT7 P76/AN22/INT6 P00/AD00/INT8 PA 1 / T X 0 PA0/RX0/INT8R P97/OUT3 P96/OUT2 P95/OUT1 P94/OUT0 P93/PPG7(6) P92/PPG5(4) P91/PPG3(2) P90/PPG1(0) Vss Vcc P87/SCK1 P86/SOT1 P85/SIN1 P84/SCK0/INT15R P83/SOT0/TOT2 P82/SIN0/TIN2/INT14R P01/AD01/INT9 P02/AD02/INT10 P03/AD03/INT11 P04/AD04/INT12 P05/AD05/INT13 P06/AD06/INT14 P07/AD07/INT15 P10/AD08/TIN1 P11/AD09/TOT1 P12/AD10/SIN3/NT11R P13/AD11/SOT3 P14/AD12/SCK3 Vcc Vss X1 X0 P15/AD13 P16/AD14 P17/AD15 P20/A16/PPG9(8) P21/A17/PPGB(A) P22/A18/PPGD(C) P23/A19/PPGF(E) P24/A20/IN0 P25/A21/IN1 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 76 50 49 77 48 78 47 79 46 80 45 81 44 82 43 83 42 84 41 85 40 86 39 87 LQFP - 100 38 88 37 89 36 90 35 91 34 92 33 93 32 94 31 95 30 96 29 97 98 28 99 27 100 26 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 P31/RD/IN5 P32/WRL/WR/INT10R P35/HAK/OUT5 P36/RDY/OUT6 P37/CLK/OUT7 P40/X0A* P41/X1A* Vcc Vss C P42/IN6/RX1/INT9R P43/IN7/TX1 P44/SDA0/FRCK0 P45/SCL0/FRCK1 P46/SDA1 P47/SCL1 P50/AN8/SIN2 P51/AN9/SOT2 P52/AN10/SCK2 P53/AN11/TIN3 P33/WRH P34/HRQ/OUT4 P26/A22/IN2 P27/A23/IN3 P30/ALE/IN4 MD0 RST MD1 MD2 P75/AN21/INT5 P74/AN20/INT4 P73/AN19/INT3 P72/AN18/INT2 P71/AN17/INT1 P70/AN16/INT0 Vss P67/AN7/PPGE(F) P66/AN6/PPGC(D) P65/AN5/PPGA(B) P64/AN4/PPG8(9) P63/AN3/PPG6(7) P62/AN2/PPG4(5) P61/AN1/PPG2(3) P60/AN0/PPG0(1) AVss AVRL AVRH AVcc P57/AN15 P56/AN14 P55/AN13 P54/AN12/TOT3 (FPT-100P-M05) * : X0A, X1A : P40, P41 : MB90F342CA/F343CA/F345CA/F346CA/F347CA/F349CA MB90341CA/342CA/346CA/347CA/348CA/349CA MB90F342CAS/F343CAS/F345CAS/F346CAS/F347CAS/F349CAS MB90341CAS/342CAS/346CAS/347CAS/348CAS/349CAS 12 MB90340 Series s PIN DESCRIPTION Pin No. LQFP100*2 QFP100*1 90 91 52 92 93 54 Pin name X1 X0 RST P00 to P07 75 to 82 77 to 84 AD00 to AD07 INT8 to INT15 P10 83 85 AD08 TIN1 P11 84 86 AD09 TOT1 P12 85 87 N G G G Circuit type A E Oscillation output Oscillation input Reset input General purpose I/O. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode. I/O pins for 8 lower bits of the external address/data bus. This function is enabled when the external bus is enabled. External interrupt request input pins for INT8 to INT15. General purpose I/O. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode. I/O pin for the external address/data bus. This function is enabled when the external bus is enabled. Event input pin for the reload timer 1 General purpose I/O. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode. I/O pin for the external address/data bus. This function is enabled when the external bus is enabled. Output pin for the reload timer 1 General purpose I/O. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode. I/O pin for the external address/data bus. This function is enabled when the external bus is enabled. Serial data input pin for UART3 External interrupt request input pin for INT11 General purpose I/O. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode. G AD11 SOT3 P14 87 89 AD12 SCK3 G I/O pin for the external address/data bus. This function is enabled when the external bus is enabled. Serial data output pin for UART3 General purpose I/O. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode. I/O pin for the external address/data bus. This function is enabled when the external bus is enabled. Clock I/O pin for UART3 Function AD10 SIN3 INT11R P13 86 88 (Continued) 13 MB90340 Series Pin No. LQFP100* 2 QFP100* 1 Pin name Circuit type Function General purpose I/O. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode. P15 92 94 AD13 SIN4 P16 93 95 AD14 SOT4 P17 94 96 AD15 SCK4 G G G I/O pin for the external address/data bus. This function is enabled when the external bus is enabled. Serial data input pin for UART4 (EVA devices) General purpose I/O. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode. I/O pin for the external address/data bus. This function is enabled when the external bus is enabled. Serial data output pin for UART4 (EVA devices) General purpose I/O. The register can be set to select whether to use a pull-up resistor. This function is enabled in single-chip mode. I/O pin for the external address/data bus. This function is enabled when the external bus is enabled. Clock I/O pin for UART4 (EVA devices only) General purpose I/O. The register can be set to select whether to use a pull-up resistor.In external bus mode, the pin is enabled as a general-purpose I/O port when the corresponding bit in the external address output control register (HACR) is 1. P20 to P23 95 to 98 97 to 100 A16 to A19 G Output pins for A16 to A19 of the external address bus. When the corresponding bit in the external address output control register (HACR) is 0, the pins are enabled as high address output pins (A16 to A19). Output pins for PPGs General purpose I/O. The register can be set to select whether to use a pull-up resistor.In external bus mode, the pin is enabled as a general-purpose I/O port when the corresponding bit in the external address output control register (HACR) is 1. PPG9,PPGB, PPGD,PPGF P24 to P27 99 to 2 1 to 4 A20 to A23 G Output pins for A20 to A23 of the external address bus. When the corresponding bit in the external address output control register (HACR) is 0, the pins are enabled as high address output pins (A20 to A23). Data sample input pins for input captures ICU0 to ICU3 General purpose I/O.The register can be set to select whether to use a pull-up resistor.This function is enabled in single-chip mode. IN0 to IN3 P30 3 5 ALE IN4 14 G Address latch enable output pin. This function is enabled when the external bus is enabled. Data sample input pin for input capture ICU4 (Continued) MB90340 Series Pin No. LQFP100* 2 QFP100* 1 Pin name Circuit type Function General purpose I/O.The register can be set to select whether to use a pull-up resistor.This function is enabled in single-chip mode. P31 4 6 RD IN5 P32 G Read strobe output pin for the data bus. This function is enabled when the external bus is enabled. Data sample input pin for input capture ICU5 General purpose I/O. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or with the WR/WRL pin output disabled. Write strobe output pin for the data bus. This function is enabled when both the external bus and the WR/WRL pin output are enabled. WRL is used to write-strobe 8 lower bits of the data bus in 16-bit access while WR is used to write-strobe 8 bits of the data bus in 8-bit access. RX input pin for CAN2 Interface (EVA devices) External interrupt request input pin for INT10 General purpose I/O. The register can be set to select whether to use a pull-up resistor.This function is enabled either in single-chip mode or with the WRH pin output disabled. 5 7 WRL / WR G RX2 INT10R P33 6 8 WRH G Write strobe output pin for the 8 higher bits of the data bus. This function is enabled when the external bus is enabled, when the external bus 16-bit mode is selected, and when the WRH output pin is enabled. TX Output pin for CAN2 (EVA devices) General purpose I/O. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or with the hold function disabled. TX2 P34 7 9 HRQ OUT4 P35 8 10 HAK OUT5 P36 9 11 RDY OUT6 G G G Hold request input pin. This function is enabled when both the external bus and the hold function are enabled. Waveform output pin for output compare OCU4 General purpose I/O. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or with the hold function disabled. Hold acknowledge output pin. This function is enabled when both the external bus and the hold function are enabled. Waveform output pin for output compare OCU6 General purpose I/O. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or with the external ready function disabled. Ready input pin. This function is enabled when both the external bus and the external ready function are enabled. Waveform output pin for output compare OCU5 (Continued) 15 MB90340 Series Pin No. LQFP100* 2 QFP100* 1 Pin name Circuit type Function General purpose I/O. The register can be set to select whether to use a pull-up resistor. This function is enabled either in single-chip mode or with the CLK output disabled. P37 10 12 CLK OUT7 P40, P41 11, 12 13, 14 X0A , X1A P42 IN6 16 18 RX1 INT9R P43 17 19 IN7 TX1 P44 18 20 SDA0 FRCK0 P45 19 21 SCL0 FRCK1 20 21 22 23 P46 SDA1 P47 SCL1 P50 22 24 AN8 SIN2 P51 23 25 AN9 SOT2 P52 24 26 AN10 SCK2 I I O H H H H F F B F G CLK output pin. This function is enabled when both the external bus and CLK output are enabled. Waveform output pin for output compare OCU7 General purpose I/O (devices with S-suffix or MB90V340A-101) Oscillator input pins for sub-clock (devices without S-suffix or MB90V340A-102) General purpose I/O Data sample input pin for input capture ICU6 RX input pin for CAN1 Interface (MB90F342A/F343A/F345A/341A/342A only) External interrupt request input pin for INT9 General purpose I/O Data sample input pin for input capture ICU7 TX Output pin for CAN1 (MB90F342A/F343A/F345A/341A/342A only) General purpose I/O Serial data I/O pin for I2C 0 (devices with C-suffix) Input for the 16-bit I/O Timer 0 General purpose I/O Serial clock I/O pin for I2C 0 (devices with C-suffix) Input for the 16-bit I/O Timer 1 General purpose I/O Serial data I/O pin for I2C 1 (devices with C-suffix) General purpose I/O Serial clock I/O pin for I2C 1 (devices with C-suffix) General purpose I/O Analog input pin for the A/D converter Serial data input pin for UART2 General purpose I/O Analog input pin for the A/D converter Serial data output pin for UART2 General purpose I/O Analog input pin for the A/D converter Clock I/O pin for UART2 (Continued) 16 MB90340 Series Pin No. LQFP100* 25 2 QFP100* 27 1 Pin name P53 AN11 TIN3 P54 Circuit type General purpose I/O I Function Analog input pin for the A/D converter Event input pin for the reload timers 3 General purpose I/O 26 28 AN12 TOT3 P55 AN13 P56 to P57 AN14 to AN15 DA00 to DA01 P60 to P67 AN0 to AN7 PPG0, 2, 4, 6, 8, A, C, E P70 to P77 I Analog input pin for the A/D converter Output pin for the reload timer 3 General purpose I/O Analog input pin for the A/D converter General purpose I/O Analog input pin for the A/D converter D/A converter analog output pins (MB90V340 only) General purpose I/O Analog input pins for the A/D converter Output pins for PPGs General purpose I/O 27 29 I 28, 29 30, 31 J 34 to 41 36 to 43 I 43 to 48, 53, 54 45 to 50, 55, 56 AN16 to AN23 INT0 to INT7 P80 TIN0 ADTG INT12R P81 TOT0 CKOT INT13R P82 SIN0 TIN2 INT14R P83 I Analog input pins for the A/D converter (devices with C-suffix) External interrupt request input pins for INT0 to INT7 General purpose I/O Event input pin for the reload timers 0 Trigger input pin for the A/D converter External interrupt request input pin for INT12 General purpose I/O Output pin for the reload timer 0 Output pin for the clock monitor External interrupt request input pin for INT13 General purpose I/O Serial data input pin for UART0 Event input pin for the reload timers 2 External interrupt request input pin for INT14 General purpose I/O 55 57 F 56 58 F 57 59 M 58 60 SOT0 TOT2 P84 F Serial data output pin for UART0 Output pin for the reload timer 2 General purpose I/O 59 61 SCK0 INT15R F Clock I/O pin for UART0 External interrupt request input pin for INT15 (Continued) 17 MB90340 Series (Continued) Pin No. LQFP100* 60 61 62 65 to 68 2 QFP100* 62 63 64 67 to 70 1 Pin name P85 SIN1 P86 SOT1 P87 SCK1 P90 to P93 PPG1, 3, 5, 7 P94 to P97 Circuit type M F F F General purpose I/O Function Serial data input pin for UART1 General purpose I/O Serial data output pin for UART1 General purpose I/O Clock I/O pin for UART1 General purpose I/O Output pins for PPGs General purpose I/O Waveform output pins for output compares OCU0 to OCU3. This function is enabled when the OCU enables waveform output. General purpose I/O RX input pin for CAN0 Interface External interrupt request input pin for INT8 General purpose I/O TX Output pin for CAN0 Vcc power input pin for analog circuits Reference voltage input for the A/D Converter. This power supply must be turned on or off while a voltage higher than or equal to AVRH is applied to AVCC. Lower reference voltage input for the A/D Converter Vss power input pin for analog circuits Input pins for specifying the operating mode. Input pin for specifying the operating mode. Power (3.5 V to 5.5 V) input pins 69 to 72 71 to 74 OUT0 to OUT3 PA0 F 73 75 RX0 INT8R PA1 TX0 AVCC AVRH AVRL AVSS MD1, MD0 MD2 VCC F 74 30 31 32 33 50, 51 49 13 63 88 14 42 64 89 15 76 32 33 34 35 52, 53 51 15 65 90 16 44 66 91 17 F K L K K C D  VSS  Power (0V) input pins C K This is the power supply stabilization capacitor pin. It should be connected to a higher than or equal to 0.1 µF ceramic capacitor. *1 : FPT-100P-M06 *2 : FPT-100P-M05 18 MB90340 Series s I/O CIRCUIT TYPE Type Circuit Remarks Oscillation circuit • High-speed oscillation feedback resistor = approx. 1 MΩ X1 Xout A X0 Standby control signal X1A Xout Oscillation circuit • Low-speed oscillation feedback resistor = approx. 10 MΩ B X0A Standby control signal R C Hysteresis inputs Mask ROM and EVA device: • CMOS Hysteresis input pin Flash device: • CMOS input pin Mask ROM and EVA device: • CMOS Hysteresis input pin • Pull-down resistor valule: approx. 50 kΩ Flash device: • CMOS input pin • No Pull-down R Hysteresis inputs D Pull-down Resistor CMOS Hysteresis input pin • Pull-up resistor valule: approx. 50 kΩ E Pull-up Resistor R Hysteresis inputs (Continued) 19 MB90340 Series Type Circuit Remarks • CMOS level output (IOL = 4 mA, IOH = −4 mA) • CMOS hysteresis inputs (With the standbytime input shutdown function) • Automotive input (With the standby-time input shutdown function) Pout Nout F R Hysteresis inputs Automotive inputs Standby control for input shutdown pull-up control Pout Nout G R Hysteresis inputs • CMOS level output (IOL = 4 mA, IOH = −4 mA) • CMOS hysteresis inputs (With the standbytime input shutdown function) • Automotive input (With the standby-time input shutdown function) • TTL input (With the standby-time input shutdown function) • Programmalble pullup resistor: 50 kΩ approx. Automotive inputs TTL input Standby control for input shutdown Pout Nout • CMOS level output (IOL = 3 mA, IOH = −3 mA) • CMOS hysteresis inputs (With the standbytime input shutdown function) • Automotive input (With the standby-time input shutdown function) H R Hysteresis inputs Automotive inputs Standby control for input shutdown (Continued) 20 MB90340 Series Type Circuit Remarks • CMOS level output (IOL = 4 mA, IOH = −4 mA) • CMOS hysteresis inputs (With the standbytime input shutdown function) • Automotive input (With the standby-time input shutdown function) • A/D analog input Pout Nout R I Hysteresis inputs Automotive inputs Standby control for input shutdown Analog input Pout Nout R • CMOS level output (IOL = 4 mA, IOH = −4 mA) • D/A analg output • CMOS hysteresis inputs (With the standbytime input shutdown function) • Automotive input (With the standby-time input shutdown function) • A/D analog input J Hysteresis inputs Automotive inputs Standby control for input shutdown Analog input Analog output • Power supply input protection circuit K ANE L AVR ANE • A/D converter reference voltage power supply input pin, with the protection circuit • Flash devices do not have a protection circuit against VCC for pin AVRH (Continued) 21 MB90340 Series (Continued) Type Circuit Remarks • CMOS level output (IOL = 4 mA, IOH = −4 mA) • CMOS inputs (With the standby-time input shutdown function) • Automotive input (With the standby-time input shutdown function) Pout Nout M R CMOS inputs Automotive inputs Standby control for input shutdown pull-up control Pout Nout N R CMOS inputs • CMOS level output (IOL = 4 mA, IOH = −4 mA) • CMOS inputs (With the standby-time input shutdown function) • Automotive input (With the standby-time input shutdown function) • TTL input (With the standby-time input shutdown function) Programmable pullup registor:50 kΩ approx Automotive inputs TTL input Standby control for input shutdown Pout Nout R • CMOS level output(IOL = 4 mA, IOH = −4 mA) • CMOS inputs (With the standby-time input shutdown function) • Automotive input (With the standby-time input shutdown function) • A/D analog input O CMOS inputs Automotive inputs Standby control for input shutdown Analog input 22 MB90340 Series s HANDLING DEVICES Special care is required for the following when handling the device : • Preventing latch-up • Treatment of unused pins • Using external clock • Precautions for when not using a sub clock signal • Notes on during operation of PLL clock mode • Power supply pins (VCC/VSS) • Pull-up/down resistors • Crystal Oscillator Circuit • Turning-on Sequence of Power Supply to A/D Converter and Analog Inputs • Connection of Unused Pins of A/D Converter • Notes on Energization • Stabilization of power supply voltage • Initialization • Port0 to port3 output during Power-on(External-bus mode) • Notes on using CAN Function • Flash security Function 1. Preventing latch-up CMOS IC chips may suffer latch-up under the following conditions : • A voltage higher than VCC or lower than VSS is applied to an input or output pin. • A voltage higher than the rated voltage is applied between VCC and VSS. • The AVCC power supply is applied before the VCC voltage. Latch-up may increase the power supply current drastically, causing thermal damage to the device. For the same reason, also be careful not to let the analog power-supply voltage (AVCC, AVRH) exceed the digital power-supply voltage. 2. Handling unused pins Leaving unused input pins open may result in misbehavior or latch up and possible permanent damage of the device. Therefore they must be pulled up or pulled down through resistors. In this case those resistors should be more than 2 kΩ . Unused bidirectional pins should be set to the output state and can be left open, or the input state with the above described connection. 3. Using external clock To use external clock, drive the X0 pin and leave X1 pin open. MB90340 Series X0 Open X1 4. Precautions for when not using a sub clock signal If you do not connect pins X0A and X1A to an oscillator, use pull-down handling on the X0A pin, and leave the X1A pin open. 23 MB90340 Series 5. Notes on during operation of PLL clock mode If the PLL clock mode is selected, the microcontroller attempt to be working with the self-oscillating circuit even when there is no external oscillator or external clock input is stopped. Performance of this operation, however, cannot be guaranteed. 6. Power supply pins (VCC/VSS) • If there are multiple VCC and VSS pins, from the point of view of device design, pins to be of the same potential are connected the inside of the device to prevent such malfunctioning as latch up. To reduce unnecessary radiation, prevent malfunctioning of the strobe signal due to the rise of ground level, and observe the standard for total output current, be sure to connect the VCC and VSS pins to the power supply and ground externally. • Connect VCC and VSS to the device from the current supply source at a low impedance. • As a measure against power supply noise, connect a capacitor of about 0.1 µF as a bypass capacitor between VCC and VSS in the vicinity of VCC and VSS pins of the device Vcc Vss Vcc Vss Vcc Vss MB90340 Series Vcc Vss Vss Vcc 7. Pull-up/down resistors The MB90340 Series does not support internal pull-up/down resistors (Port 0 to Port 3: built-in pull-up resistors). Use external components where needed. 8. Crystal Oscillator Circuit Noises around X0 or X1 pins may be possible causes of abnormal operations. Make sure to provide bypass capacitors via shortest distance from X0, X1 pins, crystal oscillator (or ceramic resonator) and ground lines, and make sure, to the utmost effort, that lines of oscillation circuit not cross the lines of other circuits. It is highly recommended to provide a printed circuit board art work surrounding X0 and X1 pins with a ground area for stabilizing the operation. 9. Turning-on Sequence of Power Supply to A/D Converter and Analog Inputs Make sure to turn on the A/D converter power supply (AVCC, AVRH, AVRL) and analog inputs (AN0 to AN23) after turning-on the digital power supply (VCC) . Turn-off the digital power after turning off the A/D converter supply and analog inputs. In this case, make sure that the voltage not exceed AVRH or AVCC (turning on/off the analog and digital power supplies simultaneously is acceptable) . 10. Connection of Unused Pins of A/D Converter if A/D Converter is used Connect unused pins of A/D converter to AVCC = VCC, AVSS = AVRH = AVRL = VSS. 24 MB90340 Series 11. Notes on Energization To prevent the internal regulator circuit from malfunctioning, set the voltage rise time during energization at 50 or more µs (0.2 V to 2.7 V) 12. Stabilization of power supply voltage A sudden change in the supply voltage may cause the device to malfunction even within the specified VCC supply voltage operating range. Therefore, the VCC supply voltage should be stabilized. For reference, the supply voltage should be controlled so that VCC ripple variations (peak-to-peak value) at commercial frequencies (50 Hz to 60 Hz) fall below 10% of the standard VCC supply voltage and the coefficient of fluctuation does not exceed 0.1 V/ms at instantaneous power switching. 13. Initialization In the device, there are internal registers which are initialized only by a power-on reset. To initialize these registers, turn on the power again. 14. Port 0 to port 3 output during Power-on (External-bus mode) As shown below, when power is turned on in External-Bus mode, in spite of reset inpu, there is a possibility that output signal of Port 0 to Port 3 might be unstable. 1/2VCC VCC Port0 ~ Port3 Port0 to 3 outputs might be unstable Port0 to 3 outputs = Hi-Z 15. Notes on using CAN Function To use CAN function, please set ’1’ to DIRECT bit of CAN Direct Mode Register (CDMR). If DIRECT bit is set to ’0’ (initial value), wait states will be performed when accessing CAN registers. Please refer to Hardware Manual of MB90340 series for detail of CAN Direct Mode Register. 16. Flash security Function (except for MB90F346A) The security bit is located in the area of the flash memory. If protection code 01H is written in the security bit, the flash memory is in the protected state by security. Therefore please do not write 01H in this address if you do not use the security function. Please refer to following table for the address of the security bit. Flash memory size MB90F347 MMB90F347A MB90F342A MB90F349A MB90F343A MB90F345A Embedded 1 Mbit Flash Memory Embedded 2 Mbit Flash Memory Embedded 3 Mbit Flash Memory Embedded 4 Mbit Flash Memory Address for security bit FE0001H FC0001H F90001H F80001H 25 MB90340 Series s BLOCK DIAGRAMS MB90V340A-101/102 X0,X1 X0A,X1A* RST Clock Controller 16LX CPU RAM 30 K IO Timer 0 Input Capture 8 ch Output Compare 8 ch FRCK0 IN7 to IN0 OUT7 to OUT0 Prescaler 5 ch SOT4 to SOT0 SCK4 to SCK0 SIN4 to SIN0 AVCC AVSS AN23 to AN0 AVRH AVRL ADTG IO Timer 1 FRCK1 UART 5 ch CAN Controller 3 ch RX2 to RX0 TX2 to TX0 16-bit Reload Timer 4 ch TIN3 to TIN0 TOT3 to TOT0 10-bit ADC 24 ch AD15 to AD00 F2MC-16 Bus A23 to A16 ALE RD External Bus Interface WRL WRH HRQ HAK RDY CLK INT15 to INT8 (INT15R to INT8R) INT7 to INT0 DA01, DA00 10-bit DAC 2 ch 8/16-bit PPG 16 ch I2C Interface 2 ch PPGF to PPG0 SDA1, SDA0 SCL1, SCL0 External Interrupt DMAC Clock Monitor CKOT * : Only for MB90V340A-102 26 MB90340 Series MB90F342A(S), MB90F342CA(S), MB90F343A(S), MB90F343CA(S), MB90F345A(S), MB90F345CA(S), , MB90F346A(S), MB90F346CA(S), MB90F347A(S), MB90F347CA(S), MB90F349A(S), MB90F349CA(S), MB90341A(S), MB90341CA(S), MB90342A(S), MB90342CA(S), MB90346A(S), MB90346CA(S), MB90347A(S), MB90347CA(S), MB90348A(S), MB90348CA(S), MB90349A(S), MB90349CA(S) X0,X1 X0A,X1A*1 RST Clock Controller 16LX CPU RAM 2 K/6 K/16 K/ 20 K ROM/Flash 64 K/128 K 256 K/384 K/ 512 K Prescaler 4 ch IO Timer 0 Input Capture 8 ch Output Compare 8 ch IO Timer 1 FRCK0 IN7 to IN0 OUT7 to OUT0 FRCK1 SOT3 to SOT0 SCK3 to SCK0 SIN3 to SIN0 AVCC AVSS AN15 to AN0 AN23 to AN16*2 AVRH AVRL ADTG UART 4 ch CAN Controller 1 ch/2 ch*3 16-bit Reload Timer 4 ch RX0, RX1*3 TX0, TX1*3 TIN3 to TIN0 TOT3 to TOT0 10-bit ADC 16/24 ch AD15 to AD00 F2MC-16 Bus A23 to A16 ALE RD External Bus Interface WRL WRH HRQ HAK RDY CLK INT15 to INT8 (INT15R to INT8R) INT7 to INT0 PPGF to PPG0 8/16-bit PPG 16 ch I2C Interface 2 ch External Interrupt DMAC SDA1, SDA0*2 SCL1, SCL0*2 Clock CKOT Monitor *1 : Only for devices without ‘S’ Suffix *2 : Only for devices with ‘C’ Suffix *3 : Supported by MB90341A(S), 341CA(S), 342A(S), 342CA(S), F342A(S), F342CA(S), F343A(S), F343CA(S), F345A(S), F345CA(S) only 27 MB90340 Series s MEMORY MAP MB90V340A-101/102 FFFFFFH FF0000H FEFFFFH FE0000H FDFFFFH ROM (FD bank) FD0000H FCFFFFH FC0000H FBFFFFH ROM (FB bank) FB0000H FAFFFFH FA0000H F9FFFFH ROM (F9 bank) F90000H F8FFFFH F80000H 00FFFFH 008000H 007FFFH 007900H 0078FFH ROM (image of FF bank) Peripheral 007900H ROM (F8 bank) ROM (FA bank) FA0000H F9FFFFH F90000H F8FFFFH F80000H External access area 00FFFFH 008000H 007FFFH ROM (image of FF bank) Peripheral 007900H ROM (F9 bank) ROM (F8 bank) F80000H 00FFFFH 008000H 007FFFH External access area ROM (image of FF bank) Peripheral FB0000H FAFFFFH ROM (FA bank) ROM (FC bank) FD0000H FCFFFFH FC0000H FBFFFFH ROM (FB bank) ROM (FF bank) ROM (FE bank) MB90F345A(S), F345CA(S) FFFFFFH FF0000H FEFFFFH FE0000H FDFFFFH ROM (FD bank) ROM (FC bank) ROM (FF bank) ROM (FE bank) MB90F343A(S), F343CA(S) FFFFFFH FF0000H FEFFFFH FE0000H FDFFFFH FD0000H FCFFFFH FC0000H FBFFFFH FB0000H FAFFFFH FA0000H F9FFFFH F90000H F8FFFFH ROM (F9 bank) ROM (FF bank) ROM (FE bank) ROM (FD bank) ROM (FB bank) ROM (FA bank) 0050FFH RAM 30 K RAM 20 K 0050FFH RAM 20 K 000100H 0000EFH 000000H Peripheral 000100H External access area 0000EFH 000000H Peripheral 000100H 0000EFH 000000H External access area Peripheral : No access 28 MB90340 Series MB90349A(S), 349CA(S) MB90342A(S), 342CA(S) MB90F349A(S), F349CA(S) MB90F342A(S), F342CA(S) FFFFFFH ROM (FF bank) FF0000H FEFFFFH ROM (FE bank) FE0000H FDFFFFH ROM (FD bank) FD0000H FCFFFFH ROM (FC bank) FC0000H MB90348A(S), 348CA(S) MB90341A(S), 341CA(S) FFFFFFH ROM (FF bank) FF0000H FEFFFFH ROM (FE bank) FE0000H MB90347A(S), 347CA(S) MB90F347(S), F347C(S) MB90F347A(S), F347CA(S) FFFFFFH ROM (FF bank) FF0000H FEFFFFH ROM (FE bank) FE0000H MB90346A(S), 346CA(S) MB90F346A(S), F346CA(S) FFFFFFH ROM (FF bank) FF0000H FEFFFFH FE0000H External access area External access area External access area External access area 00FFFFH 008000H 007FFFH 007900H ROM (image of FF bank) Peripheral 00FFFFH 008000H 007FFFH 007900H ROM (image of FF bank) Peripheral 00FFFFH 008000H 007FFFH 007900H ROM (image of FF bank) Peripheral 00FFFFH 008000H 007FFFH 007900H ROM (image of FF bank) Peripheral 003FFFH 003FFFH RAM 16 K 000100H External access area RAM 16 K 000100H External access area 0018FFH RAM 6 K 000100H External access area 0008FFH 000100H 0000EFH 000000H RAM 2 K External access area 0000EFH 000000H Peripheral 0000EFH 000000H Peripheral 0000EFH 000000H Peripheral Peripheral : No access Note : The high-order portion of bank 00 gives the image of the FF bank ROM to make the small model of the C compiler effective. Since the low-order 16 bits are the same, the table in ROM can be referenced without using the far specification in the pointer declaration. For example, an attempt to access 00C000H accesses the value at FFC000H in ROM. The ROM area in bank FF exceeds 32 Kbytes, and its entire image cannot be shown in bank 00. The image between FF8000H and FFFFFFH is visible in bank 00, while the image between FF0000H and FF7FFFH is visible only in bank FF. 29 MB90340 Series s I/O MAP Address 00H 01H 02H 03H 04H 05H 06H 07H 08H 09H 0AH 0BH 0CH 0DH 0EH 0FH 10H 11H 12H 13H 14H 15H 16H 17H 18H 19H 1AH 1BH 1CH 1DH 1EH 1FH Port 0 Pullup control register Port 1 Pullup control register Port 2 Pullup control register Port 3 Pullup control register Register Port 0 data register Port 1 data register Port 2 data register Port 3 data register Port 4 data register Port 5 data register Port 6 data register Port 7 data register Port 8 data register Port 9 data register Port A data register Port 5 Analog Input Enable Register Port 6 Analog Input Enable Register Port 7 Analog Input Enable Register Input level select register 0 Input level select register 1 Port 0 direction register Port 1 direction register Port 2 direction register Port 3 direction register Port 4 direction register Port 5 direction register Port 6 direction register Port 7 direction register Port 8 direction register Port 9 direction register Port A direction register Abbreviation PDR0 PDR1 PDR2 PDR3 PDR4 PDR5 PDR6 PDR7 PDR8 PDR9 PDRA ADER5 ADER6 ADER7 ILSR0 ILSR1 DDR0 DDR1 DDR2 DDR3 DDR4 DDR5 DDR6 DDR7 DDR8 DDR9 DDRA Reserved PUCR0 PUCR1 PUCR2 PUCR3 R/W R/W R/W W, R/W Port 0 Port 1 Port 2 Port 3 00000000 00000000 00000000 00000000 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Resource name Port 0 Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 Port 7 Port 8 Port 9 Port A Port 5, A/D Port 6, A/D Port 7, A/D Ports Ports Port 0 Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 Port 7 Port 8 Port 9 Port A Initial value XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 11111111 11111111 11111111 XXXXXXXX XXXX0XXX 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000100 (Continued) 30 MB90340 Series Address 20H 21H 22H 23H 24H 25H 26H 27H 28H 29H 2AH 2BH 2CH 2DH 2EH 2FH 30H 31H 32H 33H 34H 35H 36H 37H 38H 39H 3AH 3BH 3CH 3DH 3EH 3FH Register Serial Mode Register 0 Serial Control Register 0 Reception/Transmission Data Register 0 Serial Status Register 0 Extended Communication Control Register 0 Extended Status/Control Register 0 Baud Rate generator Register 00 Baud Rate generator Register 01 Serial Mode Register 1 Serial Control Register 1 Reception/Transmission Data Register 1 Serial Status Register 1 Extended Communication Control Register 1 Extended Status/Control Register 1 Baud Rate generator Register 10 Baud Rate generator Register 11 PPG 0 operation mode control register PPG 1 operation mode control register PPG 0/PPG 1 count clock select register PPG 2 operation mode control register PPG 3 operation mode control register PPG 2/PPG 3 count clock select register PPG 4 operation mode control register PPG 5 operation mode control register PPG 4/PPG 5 clock select register Address detect control register 1 PPG 6 operation mode control register PPG 7 operation mode control register PPG 6/PPG 7 count clock control register Abbreviation SMR0 SCR0 RDR0/ TDR0 SSR0 ECCR0 ESCR0 BGR00 BGR01 SMR1 SCR1 RDR1/ TDR1 SSR1 ECCR1 ESCR1 BGR10 BGR11 PPGC0 PPGC1 PPG01 Access W,R/W W,R/W R/W R,R/W R,W,R/ W R/W R/W R/W W,R/W W,R/W R/W R,R/W R,W, R/W R/W R/W R/W W,R/W W,R/W R/W W,R/W W,R/W R/W W,R/W W,R/W R/W R/W W,R/W W,R/W R/W Resource name Initial value 00000000 00000000 00000000 UART0 00001000 000000XX 00000100 00000000 00000000 00000000 00000000 00000000 UART1 00001000 000000XX 00000100 00000000 00000000 0X000XX1 16-bit PPG 0/1 0X000001 000000X0 0X000XX1 Reserved PPGC2 PPGC3 PPG23 Reserved PPGC4 PPGC5 PPG45 PACSR1 PPGC6 PPGC7 PPG67 Reserved 0X000XX1 16-bit PPG 4/5 Address Match Detection 1 16-bit PPG 6/7 0X000001 000000X0 00000000 0X000XX1 0X000001 000000X0 16-bit PPG 2/3 0X000001 000000X0 (Continued) 31 MB90340 Series Address 40H 41H 42H 43H 44H 45H 46H 47H 48H 49H 4AH 4BH 4CH 4DH 4EH 4FH 50H 51H 52H 53H 54H 55H 56H 57H 58H 59H 5AH 5BH 5CH 5DH 5EH 5FH Register PPG 8 operation mode control register PPG 9 operation mode control register PPG 8/PPG 9 count clock control register PPG A operation mode control register PPG B operation mode control register PPG A/PPG B count clock select register PPG C operation mode control register PPG D operation mode control register PPG C/PPG D count clock select register PPG E operation mode control register PPG F operation mode control register PPG E/PPG F count clock select register Input Capture Control Status 0/1 Input Capture Edge 0/1 Input Capture Control Status 2/3 Input Capture Edge 2/3 Input Capture Control Status 4/5 Input Capture Edge 4/5 Input Capture Control Status 6/7 Input Capture Edge 6/7 Output Compare Control Status 0 Output Compare Control Status 1 Output Compare Control Status 2 Output Compare Control Status 3 Output Compare Control Status 4 Output Compare Control Status 5 Output Compare Control Status 6 Output Compare Control Status 7 Abbreviation PPGC8 PPGC9 PPG89 Reserved PPGCA PPGCB PPGAB Reserved PPGCC PPGCD PPGCD Reserved PPGCE PPGCF PPGEF Reserved ICS01 ICE01 ICS23 ICE23 ICS45 ICE45 ICS67 ICE67 OCS0 OCS1 OCS2 OCS3 OCS4 OCS5 OCS6 OCS7 Access W,R/W W,R/W R/W W,R/W W,R/W R/W W,R/W W,R/W R/W W,R/W W,R/W R/W R/W R/W, R R/W R R/W R R/W R/W, R R/W R/W R/W R/W R/W R/W R/W R/W Resource name Initial value 0X000XX1 16-bit PPG 8/9 0X000001 000000X0 0X000XX1 16-bit PPG A/B 0X000001 000000X0 0X000XX1 16-bit PPG C/D 0X000001 000000X0 0X000XX1 16-bit PPG E/F 0X000001 000000X0 00000000 XXX0X0XX 00000000 XXXXXXXX 00000000 XXXXXXXX 00000000 XXX000XX 0000XX00 0XX00000 0000XX00 0XX00000 0000XX00 0XX00000 0000XX00 0XX00000 Input Capture 0/1 Input Capture 2/3 Input Capture 4/5 Input Capture 6/7 Output Compare 0/1 Output Compare 2/3 Output Compare 4/5 Output Compare 6/7 (Continued) 32 MB90340 Series Address 60H 61H 62H 63H 64H 65H 66H 67H 68H 69H 6AH 6BH 6CH 6DH 6EH 6FH 90H to 9AH 9BH 9CH 9DH 9EH 9FH A0H A1H A2H, A3H A4H A5H A6H A7H A8H A9H Register Timer Control Status 0 Timer Control Status 0 Timer Control Status 1 Timer Control Status 1 Timer Control Status 2 Timer Control Status 2 Timer Control Status 3 Timer Control Status 3 A/D Control Status 0 A/D Control Status 1 A/D Data 0 A/D Data 1 ADC Setting 0 ADC Setting 1 ROM Mirror Function Select Abbreviation TMCSR0 TMCSR0 TMCSR1 TMCSR1 TMCSR2 TMCSR2 TMCSR3 TMCSR3 ADCS0 ADCS1 ADCR0 ADCR1 ADSR0 ADSR1 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R R R/W R/W W Resource name 16-bit Reload Timer 0 16-bit Reload Timer 1 16-bit Reload Timer 2 16-bit Reload Timer 3 Initial value 00000000 XXXX0000 00000000 XXXX0000 00000000 XXXX0000 00000000 XXXX0000 000XXXX0 0000000X 00000000 XXXXXX00 00000000 00000000 A/D Converter Reserved ROMM Reserved DMA Descriptor Channel Specified DMA Status L DMA Status H Address Detect Control Register 0 Delayed Interrupt/release Low-power Mode Control Register Clock Selection Register DCSR DSRL DSRH PACSR0 DIRR LPMCR CKSCR R/W R/W R/W R/W R/W W,R/W R,R/W Address Match Detection 0 Delayed Interrupt Low Power Control Circuit Low Power Control Circuit DMA External Memory Access Watchdog Timer Time Base Timer DMA 00000000 00000000 00000000 00000000 XXXXXXX0 00011000 11111100 ROM Mirror XXXXXXX1 70H to 8FH Reserved for CAN Interface 0/1. Refer to “s CAN CONTROLLERS” Reserved DMA Stop Status Automatic ready function select reg. External address output control reg. Bus control signal selection register Watchdog Control Register Time Base Timer Control Register DSSR ARSR HACR ECSR WDTC TBTC R/W W W W R,W W,R/W 00000000 0011XX00 00000000 0000000X XXXXX111 1XX00100 (Continued) 33 MB90340 Series Address AAH ABH ACH ADH AEH AFH B0H B1H B2H B3H B4H B5H B6H B7H B8H B9H BAH BBH BCH BDH BEH BFH C0H C1H C2H C3H C4H, C5H C6H C7H C8H C9H DMA Enable L DMA Enable H Register Watch Timer Control register Abbreviation WTC Access R,R/W R/W R/W R,R/W Resource name Watch Timer Initial value 1X001000 00000000 00000000 000X0000 Reserved DERL DERH FMCS Reserved Interrupt control register 00 Interrupt control register 01 Interrupt control register 02 Interrupt control register 03 Interrupt control register 04 Interrupt control register 05 Interrupt control register 06 Interrupt control register 07 Interrupt control register 08 Interrupt control register 09 Interrupt control register 10 Interrupt control register 11 Interrupt control register 12 Interrupt control register 13 Interrupt control register 14 Interrupt control register 15 D/A Converter data 0 D/A Converter data 1 D/A Control 0 D/A Control 1 External Interrupt Enable 0 External Interrupt Source 0 External Interrupt Level Setting 0 External Interrupt Level Setting 0 ICR00 ICR01 ICR02 ICR03 ICR04 ICR05 ICR06 ICR07 ICR08 ICR09 ICR10 ICR11 ICR12 ICR13 ICR14 ICR15 DAT0 DAT1 DACR0 DACR1 Reserved ENIR0 EIRR0 ELVR0 ELVR0 R/W R/W R/W R/W External Interrupt 0 00000000 XXXXXXXX 00000000 00000000 W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W W,R/W R/W R/W R/W R/W D/A Converter Interrupt Control 00000111 00000111 00000111 00000111 00000111 00000111 00000111 00000111 00000111 00000111 00000111 00000111 00000111 00000111 00000111 00000111 XXXXXXXX XXXXXXXX XXXXXXX0 XXXXXXX0 DMA Flash Control Status (FlashDevices only. Otherwise reserved) Flash Memory (Continued) 34 MB90340 Series Address CAH CBH CCH CDH CEH CFH D0H D1H D2H D3H D4H D5H D6H D7H D8H D9H DAH DBH DCH DDH DEH DFH F0H to FFH Register External Interrupt Enable 1 External Interrupt Source 1 External Interrupt Level Setting 1 External Interrupt Level Setting 1 External Interrupt Source Select PLL/Subclock Control register DMA Buffer Addrss Pointer L DMA Buffer Addrss Pointer M DMA Buffer Addrss Pointer H DMA Control I/O Register Address Pointer L I/O Register Address Pointer H Data Counter L Data Counter H Serial Mode Register 2 Serial Control Register 2 Reception/Transmission Data Register 2 Serial Status Register 2 Extended Communication Control Register 2 Extended Status Control Register 2 Baud Rate Generator Register 20 Baud Rate Generator Register 21 Abbreviation ENIR1 EIRR1 ELVR1 ELVR1 EISSR PSCCR BAPL BAPM BAPH DMACS IOAL IOAH DCTL DCTH SMR2 SCR2 RDR2/ TDR2 SSR2 ECCR2 ESCR2 BGR20 BGR21 Access R/W R/W R/W R/W R/W W R/W R/W R/W R/W R/W R/W R/W R/W W,R/W W,R/W R/W R,R/W R,W, R/W R/W R/W R/W Resource name Initial value 00000000 XXXXXXXX External Interrupt 1 00000000 00000000 00000000 PLL XXXX0000 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 00000000 00000000 00000000 DMA UART2 00001000 000000XX 00000100 00000000 00000000 E0H to EFH Reserved for CAN Interface 2. Refer to “s CAN CONTROLLERS” External (Continued) 35 MB90340 Series Address 7900H 7901H 7902H 7903H 7904H 7905H 7906H 7907H 7908H 7909H 790AH 790BH 790CH 790DH 790EH 790FH 7910H 7911H 7912H 7913H 7914H 7915H 7916H 7917H 7918H 7919H 791AH 791BH 791CH 791DH 791EH 791FH 7920H 7921H 7922H 7923H Register Reload Register L0 Reload Register H0 Reload Register L1 Reload Register H1 Reload Register L2 Reload Register H2 Reload Register L3 Reload Register H3 Reload Register L4 Reload Register H4 Reload Register L5 Reload Register H5 Reload Register L6 Reload Register H6 Reload Register L7 Reload Register H7 Reload Register L8 Reload Register H8 Reload Register L9 Reload Register H9 Reload Register LA Reload Register HA Reload Register LB Reload Register HB Reload Register LC Reload Register HC Reload Register LD Reload Register HD Reload Register LE Reload Register HE Reload Register LF Reload Register HF Input Capture 0 Input Capture 0 Input Capture 1 Input Capture 1 Abbreviation PRLL0 PRLH0 PRLL1 PRLH1 PRLL2 PRLH2 PRLL3 PRLH3 PRLL4 PRLH4 PRLL5 PRLH5 PRLL6 PRLH6 PRLL7 PRLH7 PRLL8 PRLH8 PRLL9 PRLH9 PRLLA PRLHA PRLLB PRLHB PRLLC PRLHC PRLLD PRLHD PRLLE PRLHE PRLLF PRLHF IPCP0 IPCP0 IPCP1 IPCP1 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R R R R Resource name Initial value XXXXXXXX 16-bit PPG 0/1 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 16-bit PPG 2/3 16-bit PPG 4/5 16-bit PPG 6/7 16-bit PPG 8/9 16-bit PPG A/B 16-bit PPG C/D 16-bit PPG E/F Input Capture 0/1 (Continued) 36 MB90340 Series Address 7924H 7925H 7926H 7927H 7928H 7929H 792AH 792BH 792CH 792DH 792EH 792FH 7930H 7931H 7932H 7933H 7934H 7935H 7936H 7937H 7938H 7939H 793AH 793BH 793CH 793DH 793EH 793FH 7940H 7941H 7942H 7943H 7944H 7945H 7946H 7947H Register Input Capture 2 Input Capture 2 Input Capture 3 Input Capture 3 Input Capture 4 Input Capture 4 Input Capture 5 Input Capture 5 Input Capture 6 Input Capture 6 Input Capture 7 Input Capture 7 Output Compare 0 Output Compare 0 Output Compare 1 Output Compare 1 Output Compare 2 Output Compare 2 Output Compare 3 Output Compare 3 Output Compare 4 Output Compare 4 Output Compare 5 Output Compare 5 Output Compare 6 Output Compare 6 Output Compare 7 Output Compare 7 Timer Data 0 Timer Data 0 Timer Control Status 0 Timer Control Status 0 Timer Data 1 Timer Data 1 Timer Control Status 1 Timer Control Status 1 Abbreviation IPCP2 IPCP2 IPCP3 IPCP3 IPCP4 IPCP4 IPCP5 IPCP5 IPCP6 IPCP6 IPCP7 IPCP7 OCCP0 OCCP0 OCCP1 OCCP1 OCCP2 OCCP2 OCCP3 OCCP3 OCCP4 OCCP4 OCCP5 OCCP5 OCCP6 OCCP6 OCCP7 OCCP7 TCDT0 TCDT0 TCCSL0 TCCSH0 TCDT1 TCDT1 TCCSL1 TCCSH1 Access R R R R R R R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Resource name Initial value XXXXXXXX Input Capture 2/3 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 00000000 00000000 00000000 0XXXXXXX 00000000 00000000 00000000 0XXXXXXX Input Capture 4/5 Input Capture 6/7 Output Compare 0/1 Output Compare 2/3 Output Compare 4/5 Output Compare 6/7 I/O Timer 0 I/O Timer 1 (Continued) 37 MB90340 Series Address 7948H 7949H 794AH 794BH 794CH 794DH 794EH 794FH 7950H 7951H 7952H 7953H 7954H 7955H 7956H 7957H 7958H 7959H 795AH 795BH 795CH 795DH 795EH 795FH 7960H to 796BH 796CH 796DH 796EH 796FH Register Timer 0/Reload 0 Timer 1/Reload 1 Timer 2/Reload 2 Timer 3/Reload 3 Serial Mode Register 3 Serial Control Register 3 Reception/Transmission Data Register 3 Serial Status Register 3 Extended Communication Control Register 3 Extended Status Control Register Baud Rate Generator Register 30 Baud Rate Generator Register 31 Serial Mode Register 4 Serial Control Register 4 Reception/Transmission Data Register 4 Serial Status Register 4 Extended Communication Control Register 4 Extended Status Control Register Baud Rate Generator Register 40 Baud Rate generator Register 41 Abbreviation TMR0/ TMRLR0 TMR1/ TMRLR1 TMR2/ TMRLR2 TMR3/ TMRLR3 SMR3 SCR3 RDR3/ TDR3 SSR3 ECCR3 ESCR3 BGR30 BGR31 SMR4 SCR4 RDR4/ TDR4 SSR4 ECCR4 ESCR4 BGR40 BGR41 Access R/W R/W R/W R/W R/W R/W R/W R/W W,R/W W,R/W R/W R,R/W R,W, R/W R/W R/W R/W W,R/W W,R/W R/W R,R/W R,W, R/W R/W R/W R/W Resource name 16-bit Reload Timer 0 16-bit Reload Timer 1 16-bit Reload Timer 2 16-bit Reload Timer 3 Initial value XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 00000000 00000000 00000000 UART3 00001000 000000XX 00000100 00000000 00000000 00000000 00000000 00000000 UART4 00001000 000000XX 00000100 00000000 00000000 Reserved Clock output enable register CAN Direct Mode Register CAN switch register CLKR Reserved CDMR CANSWR R/W R/W CAN clock sync CAN 0/1 XXXXXXX0 XXXXXX00 R/W Clock Monitor XXXX0000 (Continued) 38 MB90340 Series Address 7970H 7971H 7972H 7973H 7974H 7975H 7976H 7977H 7978H 7979H, 797AH 797BH 797CH to 797FH 7980H 7981H 7982H 7983H 7984H 7985H 7986H 7987H 7988H 7989H, 798AH 798BH 798CH to 79C1H 79C2H 79C3H to 79DFH Register I2C bus status register 0 I C bus control register 0 I2C 10 bit slave address register 0 I2C 10 bit slave address mask register 0 I C 7 bit slave address register 0 I C 7 bit slave address mask register 0 I C data register 0 2 2 2 2 Abbreviation IBSR0 IBCR0 ITBAL0 ITBAH0 ITMKL0 ITMKH0 ISBA0 ISMK0 IDAR0 Access R W,R/W R/W R/W R/W R/W R/W R/W R/W Resource name Initial value 00000000 00000000 00000000 00000000 I2C Interface 0 11111111 00111111 00000000 01111111 00000000 Reserved I2C clock control register 0 ICCR0 Reserved I2C bus status register 1 I2C bus control register 1 I2C 10 bit slave address register 1 I2C 10 bit slave address mask register 1 I C 7 bit slave address register 1 I2C 7 bit slave address mask register 1 I2C data register 1 2 R/W I2C Interface 0 00011111 IBSR1 IBCR1 ITBAL1 ITBAH1 ITMKL1 ITMKH1 ISBA1 ISMK1 IDAR1 Reserved R W,R/W R/W R/W R/W R/W R/W R/W R/W I C Interface 1 2 00000000 00000000 00000000 00000000 11111111 00111111 00000000 01111111 00000000 I2C clock control register 1 ICCR1 Reserved R/W I2C Interface 1 00011111 Clock Modulator Control Register CMCR Reserved R,R/W Clock Modulator 0001X000 (Continued) 39 MB90340 Series (Continued) Address 79E0H 79E1H 79E2H 79E3H 79E4H 79E5H 79E6H 79E7H 79E8H 79E9H to 79EFH 79F0H 79F1H 79F2H 79F3H 79F4H 79F5H 79F6H 79F7H 79F8H 79F9H to 79FFH 7A00H to 7AFFH 7B00H to 7BFFH 7C00H to 7CFFH 7D00H to 7DFFH 7E00H to 7EFFH 7F00H to 7FFFH Detect Address Setting 3 Detect Address Setting 3 Detect Address Setting 3 Detect Address Setting 4 Detect Address Setting 4 Detect Address Setting 4 Detect Address Setting 5 Detect Address Setting 5 Detect Address Setting 5 Register Detect Address Setting 0 Detect Address Setting 0 Detect Address Setting 0 Detect Address Setting 1 Detect Address Setting 1 Detect Address Setting 1 Detect Address Setting 2 Detect Address Setting 2 Detect Address Setting 2 Abbreviation PADR0 PADR0 PADR0 PADR1 PADR1 PADR1 PADR2 PADR2 PADR2 Reserved PADR3 PADR3 PADR3 PADR4 PADR4 PADR4 PADR5 PADR5 PADR5 Reserved Reserved for CAN Interface 0. Refer to “s CAN CONTROLLERS” Reserved for CAN Interface 0. Refer to “s CAN CONTROLLERS” Reserved for CAN Interface 1. Refer to “s CAN CONTROLLERS” Reserved for CAN Interface 1. Refer to “s CAN CONTROLLERS” Reserved for CAN Interface 2. Refer to “s CAN CONTROLLERS” Reserved for CAN Interface 2. Refer to “s CAN CONTROLLERS” R/W R/W R/W R/W R/W R/W R/W R/W R/W Address Match Detection 1 XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Access R/W R/W R/W R/W R/W R/W R/W R/W R/W Address Match Detection 0 Resource name Initial value XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Notes : • Initial value of “X” represents unknown value. • Any write access to reserved addresses in I/O map should not be performed. A read access to reserved addresses results in reading “X”. 40 MB90340 Series s CAN CONTROLLERS The CAN controller has the following features : • Conforms to CAN Specification Version 2.0 Part A and B • Supports transmission/reception in standard frame and extended frame formats • Supports transmitting of data frames by receiving remote frames • 16 transmitting/receiving message buffers • 29-bit ID and 8-byte data • Multi-level message buffer configuration • Provides full-bit comparison, full-bit mask, acceptance register 0/acceptance register 1 for each message buffer as ID acceptance mask • Two acceptance mask registers in either standard frame format or extended frame formats • Bit rate programmable from 10 Kbits/s to 2 Mbits/s (when input clock is at 16 MHz) List of Control Registers (1) Address CAN0 000070H 000071H 000072H 000073H 000074H 000075H 000076H 000077H 000078H 000079H 00007AH 00007BH 00007CH 00007DH 00007EH 00007FH CAN1 000080H 000081H 000082H 000083H 000084H 000085H 000086H 000087H 000088H 000089H 00008AH 00008BH 00008CH 00008DH 00008EH 00008FH CAN2 0000E0H 0000E1H 0000E2H 0000E3H 0000E4H 0000E5H 0000E6H 0000E7H 0000E8H 0000E9H 0000EAH 0000EBH 0000ECH 0000EDH 0000EEH 0000EFH Register Message buffer valid register Transmit request register Transmit cancel register Transmission complete register Receive complete register Remote request receiving register Receive overrun register Reception interrupt enable register Abbreviation BVALR TREQR TCANR TCR RCR RRTRR ROVRR RIER Access R/W R/W W R/W R/W R/W R/W R/W Initial Value 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 41 MB90340 Series List of Control Registers (2) Address CAN0 007B00H 007B01H 007B02H 007B03H 007B04H 007B05H 007B06H 007B07H 007B08H 007B09H 007B0AH 007B0BH 007B0CH 007B0DH 007B0EH 007B0FH 007B10H 007B11H 007B12H 007B13H 007B14H 007B15H 007B16H 007B17H 007B18H 007B19H 007B1AH 007B1BH CAN1 007D00H 007D01H 007D02H 007D03H 007D04H 007D05H 007D06H 007D07H 007D08H 007D09H 007D0AH 007D0BH 007D0CH 007D0DH 007D0EH 007D0FH 007D10H 007D11H 007D12H 007D13H 007D14H 007D15H 007D16H 007D17H 007D18H 007D19H 007D1AH 007D1BH CAN2 007F00H 007F01H 007F02H 007F03H 007F04H 007F05H 007F06H 007F07H 007F08H 007F09H 007F0AH 007F0BH 007F0CH 007F0DH 007F0EH 007F0FH 007F10H 007F11H 007F12H 007F13H 007F14H 007F15H 007F16H 007F17H 007F18H 007F19H 007F1AH 007F1BH Acceptance mask register 1 AMR1 R/W XXXXXXXX XXXXXXXX Acceptance mask register 0 AMR0 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Acceptance mask select register AMSR R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Register Control status register Last event indicator register Receive and transmit error counter Bit timing register IDE register Transmit RTR register Remote frame receive waiting register Transmit interrupt enable register Abbreviation CSR LEIR RTEC BTR IDER TRTRR Access R/W, W R/W, R R/W R R/W R/W R/W Initial Value 0XXXX0X1 00XXX000 000X0000 XXXXXXXX 00000000 00000000 11111111 X1111111 XXXXXXXX XXXXXXXX 00000000 00000000 XXXXXXXX XXXXXXXX 00000000 00000000 XXXXXXXX XXXXXXXX RFWTR R/W TIER R/W 42 MB90340 Series List of Message Buffers (ID Registers) (1) Address CAN0 007A00H to 007A1FH 007A20H 007A21H 007A22H 007A23H 007A24H 007A25H 007A26H 007A27H 007A28H 007A29H 007A2AH 007A2BH 007A2CH 007A2DH 007A2EH 007A2FH 007A30H 007A31H 007A32H 007A33H 007A34H 007A35H 007A36H 007A37H 007A38H 007A39H 007A3AH 007A3BH 007A3CH 007A3DH 007A3EH 007A3FH CAN1 007C00H to 007C1FH 007C20H 007C21H 007C22H 007C23H 007C24H 007C25H 007C26H 007C27H 007C28H 007C29H 007C2AH 007C2BH 007C2CH 007C2DH 007C2EH 007C2FH 007C30H 007C31H 007C32H 007C33H 007C34H 007C35H 007C36H 007C37H 007C38H 007C39H 007C3AH 007C3BH 007C3CH 007C3DH 007C3EH 007C3FH CAN2 007E00H to 007E1FH 007E20H 007E21H 007E22H 007E23H 007E24H 007E25H 007E26H 007E27H 007E28H 007E29H 007E2AH 007E2BH 007E2CH 007E2DH 007E2EH 007E2FH 007E30H 007E31H 007E32H 007E33H 007E34H 007E35H 007E36H 007E37H 007E38H 007E39H 007E3AH 007E3BH 007E3CH 007E3DH 007E3EH 007E3FH ID register 7 IDR7 R/W XXXXXXXX XXXXXXXX 43 ID register 6 IDR6 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ID register 5 IDR5 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ID register 4 IDR4 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ID register 3 IDR3 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ID register 2 IDR2 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ID register 1 IDR1 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ID register 0 IDR0 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Register Generalpurpose RAM Abbreviation Access Initial Value XXXXXXXX to XXXXXXXX XXXXXXXX XXXXXXXX  R/W MB90340 Series List of Message Buffers (ID Registers) (2) Address CAN0 007A40H 007A41H 007A42H 007A43H 007A44H 007A45H 007A46H 007A47H 007A48H 007A49H 007A4AH 007A4BH 007A4CH 007A4DH 007A4EH 007A4FH 007A50H 007A51H 007A52H 007A53H 007A54H 007A55H 007A56H 007A57H 007A58H 007A59H 007A5AH 007A5BH 007A5CH 007A5DH 007A5EH 007A5FH CAN1 007C40H 007C41H 007C42H 007C43H 007C44H 007C45H 007C46H 007C47H 007C48H 007C49H 007C4AH 007C4BH 007C4CH 007C4DH 007C4EH 007C4FH 007C50H 007C51H 007C52H 007C53H 007C54H 007C55H 007C56H 007C57H 007C58H 007C59H 007C5AH 007C5BH 007C5CH 007C5DH 007C5EH 007C5FH CAN2 007E40H 007E41H 007E42H 007E43H 007E44H 007E45H 007E46H 007E47H 007E48H 007E49H 007E4AH 007E4BH 007E4CH 007E4DH 007E4EH 007E4FH 007E50H 007E51H 007E52H 007E53H 007E54H 007E55H 007E56H 007E57H 007E58H 007E59H 007E5AH 007E5BH 007E5CH 007E5DH 007E5EH 007E5FH ID register 15 IDR15 R/W XXXXXXXX XXXXXXXX ID register 14 IDR14 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ID register 13 IDR13 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ID register 12 IDR12 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ID register 11 IDR11 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ID register 10 IDR10 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ID register 9 IDR9 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX ID register 8 IDR8 R/W XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX Register Abbreviation Access Initial Value XXXXXXXX XXXXXXXX 44 MB90340 Series List of Message Buffers (DLC Registers and Data Registers) (1) Address CAN0 007A60H 007A61H 007A62H 007A63H 007A64H 007A65H 007A66H 007A67H 007A68H 007A69H 007A6AH 007A6BH 007A6CH 007A6DH 007A6EH 007A6FH 007A70H 007A71H 007A72H 007A73H 007A74H 007A75H 007A76H 007A77H 007A78H 007A79H 007A7AH 007A7BH 007A7CH 007A7DH 007A7EH 007A7FH CAN1 007C60H 007C61H 007C62H 007C63H 007C64H 007C65H 007C66H 007C67H 007C68H 007C69H 007C6AH 007C6BH 007C6CH 007C6DH 007C6EH 007C6FH 007C70H 007C71H 007C72H 007C73H 007C74H 007C75H 007C76H 007C77H 007C78H 007C79H 007C7AH 007C7BH 007C7CH 007C7DH 007C7EH 007C7FH CAN2 007E60H 007E61H 007E62H 007E63H 007E64H 007E65H 007E66H 007E67H 007E68H 007E69H 007E6AH 007E6BH 007E6CH 007E6DH 007E6EH 007E6FH 007E70H 007E71H 007E72H 007E73H 007E74H 007E75H 007E76H 007E77H 007E78H 007E79H 007E7AH 007E7BH 007E7CH 007E7DH 007E7EH 007E7FH Register DLC register 0 DLC register 1 DLC register 2 DLC register 3 DLC register 4 DLC register 5 DLC register 6 DLC register 7 DLC register 8 DLC register 9 DLC register 10 DLC register 11 DLC register 12 DLC register 13 DLC register 14 DLC register 15 Abbreviation DLCR0 DLCR1 DLCR2 DLCR3 DLCR4 DLCR5 DLCR6 DLCR7 DLCR8 DLCR9 DLCR10 DLCR11 DLCR12 DLCR13 DLCR14 DLCR15 Access R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W Initial Value XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 45 MB90340 Series List of Message Buffers (DLC Registers and Data Registers) (2) Address CAN0 007A80H to 007A87H 007A88H to 007A8FH 007A90H to 007A97H 007A98H to 007A9FH 007AA0H to 007AA7H 007AA8H to 007AAFH 007AB0H to 007AB7H 007AB8H to 007ABFH 007AC0H to 007AC7H 007AC8H to 007ACFH 007AD0H to 007AD7H 007AD8H to 007ADFH 007AE0H to 007AE7H 007AE8H to 007AEFH CAN1 007C80H to 007C87H 007C88H to 007C8FH 007C90H to 007C97H 007C98H to 007C9FH 007CA0H to 007CA7H 007CA8H to 007CAFH 007CB0H to 007CB7H 007CB8H to 007CBFH 007CC0H to 007CC7H 007CC8H to 007CCFH 007CD0H to 007CD7H 007CD8H to 007CDFH 007CE0H to 007CE7H 007CE8H to 007CEFH CAN2 007E80H to 007E87H 007E88H to 007E8FH 007E90H to 007E97H 007E98H to 007E9FH 007EA0H to 007EA7H 007EA8H to 007EAFH 007EB0H to 007EB7H 007EB8H to 007EBFH 007EC0H to 007EC7H 007EC8H to 007ECFH 007ED0H to 007ED7H 007ED8H to 007EDFH 007EE0H to 007EE7H 007EE8H to 007EEFH Register Data register 0 (8 bytes) Data register 1 (8 bytes) Data register 2 (8 bytes) Data register 3 (8 bytes) Data register 4 (8 bytes) Data register 5 (8 bytes) Data register 6 (8 bytes) Data register 7 (8 bytes) Data register 8 (8 bytes) Data register 9 (8 bytes) Data register 10 (8 bytes) Data register 11 (8 bytes) Data register 12 (8 bytes) Data register 13 (8 bytes) Abbreviation Access Initial Value XXXXXXXX to XXXXXXXX XXXXXXXX to XXXXXXXX XXXXXXXX to XXXXXXXX XXXXXXXX to XXXXXXXX XXXXXXXX to XXXXXXXX XXXXXXXX to XXXXXXXX XXXXXXXX to XXXXXXXX XXXXXXXX to XXXXXXXX XXXXXXXX to XXXXXXXX XXXXXXXX to XXXXXXXX XXXXXXXX to XXXXXXXX XXXXXXXX to XXXXXXXX XXXXXXXX to XXXXXXXX XXXXXXXX to XXXXXXXX DTR0 R/W DTR1 R/W DTR2 R/W DTR3 R/W DTR4 R/W DTR5 R/W DTR6 R/W DTR7 R/W DTR8 R/W DTR9 R/W DTR10 R/W DTR11 R/W DTR12 R/W DTR13 R/W 46 MB90340 Series List of Message Buffers (DLC Registers and Data Registers) (3) Address CAN0 007AF0H to 007AF7H 007AF8H to 007AFFH CAN1 007CF0H to 007CF7H 007CF8H to 007CFFH CAN2 007EF0H to 007EF7H 007EF8H to 007EFFH Register Data register 14 (8 bytes) Data register 15 (8 bytes) Abbreviation Access Initial Value XXXXXXXX to XXXXXXXX XXXXXXXX to XXXXXXXX DTR14 R/W DTR15 R/W 47 MB90340 Series s INTERRUPT FACTORS, INTERRUPT VECTORS, INTERRUPT CONTROL REGISTER Interrupt cause Reset INT9 instruction Exception CAN 0 RX CAN 0 TX/NS CAN 1 RX / Input Capture 6 CAN 1 TX/NS / Input Capture 7 CAN 2 RX / I2C0 CAN 2 TX/NS 16-bit Reload Timer 0 16-bit Reload Timer 1 16-bit Reload Timer 2 16-bit Reload Timer 3 PPG 0/1/4/5 PPG 2/3/6/7 PPG 8/9/C/D PPG A/B/E/F Time Base Timer External Interrupt 0 to 3, 8 to 11 Watch Timer External Interrupt 4 to 7, 12 to 15 A/D Converter I/O Timer 0 / I/O Timer 1 Input Capture 4/5 / I2C1 Output Compare 0/1/4/5 Input Capture 0 to 3 Output Compare 2/3/6/7 UART 0 RX UART 0 TX UART 1 RX / UART 3 RX UART 1 TX / UART 3 TX EI2OS clear N N N N N Y1 Y1 N N Y1 Y1 Y1 Y1 N N N N N Y1 N Y1 Y1 N Y1 Y1 Y1 Y1 Y2 Y1 Y2 Y1 DMA ch number          0 1 2       3  4 5  6 7 8 9 10 11 12 13 Interrupt vector Number #08 #09 #10 #11 #12 #13 #14 #15 #16 #17 #18 #19 #20 #21 #22 #23 #24 #25 #26 #27 #28 #29 #30 #31 #32 #33 #34 #35 #36 #37 #38 Address FFFFDCH FFFFD8H FFFFD4H FFFFD0H FFFFCCH FFFFC8H FFFFC4H FFFFC0H FFFFBCH FFFFB8H FFFFB4H FFFFB0H FFFFACH FFFFA8H FFFFA4H FFFFA0H FFFF9CH FFFF98H FFFF94H FFFF90H FFFF8CH FFFF88H FFFF84H FFFF80H FFFF7CH FFFF78H FFFF74H FFFF70H FFFF6CH FFFF68H FFFF64H Interrupt control register Number    ICR00 ICR01 ICR02 ICR03 ICR04 ICR05 ICR06 ICR07 ICR08 ICR09 ICR10 ICR11 ICR12 ICR13 Address    0000B0H 0000B1H 0000B2H 0000B3H 0000B4H 0000B5H 0000B6H 0000B7H 0000B8H 0000B9H 0000BAH 0000BBH 0000BCH 0000BDH (Continued) 48 MB90340 Series (Continued) Interrupt cause UART 2 RX / UART 4 RX UART 2 TX / UART 4 TX Flash Memory Delayed interrupt Y1 : Usable Y2 : Usable, with EI2OS stop function N : Unusable Notes : • The peripheral resources sharing the ICR register have the same interrupt level. • When two peripheral resources share the ICR register, only one can use Extended Intelligent I/O Service at a time. • When either of the two peripheral resources sharing the ICR register specifies Extended Intelligent I/O Service, the other one cannot use interrupts. EI2OS clear Y2 Y1 N N DMA ch number 14 15   Interrupt vector Number #39 #40 #41 #42 Address FFFF60H FFFF5CH FFFF58H FFFF54H Interrupt control register Number ICR14 ICR15 Address 0000BEH 0000BFH 49 MB90340 Series s ELECTRICAL CHARACTERISTICS 1. Absolute Maximum Ratings Parameter Symbol VCC Power supply voltage AVCC AVRH, AVRL Input voltage Output voltage Maximum Clamp Current Total Maximum Clamp Current “L” level maximum output current “L” level average output current “L” level maximum overall output current “L” level average overall output current “H” level maximum output current “H” level average output current “H” level maximum overall output current “H” level average overall output current Power consumption Operating temperature Storage temperature VI VO ICLAMP Σ|ICLAMP| IOL IOLAV ΣIOL ΣIOLAV IOH IOHAV ΣIOH ΣIOHAV PD TA TSTG Rating Min VSS − 0.3 VSS − 0.3 VSS − 0.3 VSS − 0.3 VSS − 0.3 −4.0           −40 −55 Max VSS + 6.0 VSS + 6.0 VSS + 6.0 VSS + 6.0 VSS + 6.0 +4.0 40 15 4 100 50 −15 −4 −100 −50 340 +105 +150 Unit V V V V V mA mA mA mA mA mA mA mA mA mA °C °C VCC = AVCC*1 AVCC ≥ AVRH, AVCC ≥ AVRL, AVRH ≥ AVRL *2 *2 *4 *4 *3 *3 *3 *3 *3 *3 *3 *3 (VSS = AVSS = 0 V) Remarks mW MB90F347 (Continued) 50 MB90340 Series (Continued) *1: Set AVCC and VCC to the same voltage. Make sure that AVCC does not exceed VCC and that the voltage at the analog inputs does not exceed AVCC when the power is switched on. *2: VI and VO should not exceed VCC + 0.3 V. VI should not exceed the specified ratings. However if the maximun current to/from an input is limited by some means with external components, the ICLAMP rating supercedes the VI rating. *3: Applicable to pins : P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P47, P50 to P57, P60 to P67, P70 to P77, P80 to P87, P90 to P97, PA0 to PA1 *4: • Applicable to pins: P00 to P07, P10 to P17, P20 to P27, P30 to P37, P40 to P47, P50 to P57 (EVA device : P50 to P55) , P60 to P67, P70 to P77, P80 to P87, P90 to P97, PA0 to PA1 • Use within recommended operating conditions. • Use at DC voltage (current) • The +B signal should always be applied a limiting resistance placed between the +B signal and the microcontroller. • The value of the limiting resistance should be set so that when the +B signal is applied the input current to the microcontroller pin does not exceed rated values, either instantaneously or for prolonged periods. • Note that when the microcontroller drive current is low, such as in the power saving modes, the +B input potential may pass through the protective diode and increase the potential at the VCC pin, and this may affect other devices. • Note that if a +B signal is input when the microcontroller power supply is off (not fixed at 0 V) , the power supply is provided from the pins, so that incomplete operation may result. • Note that if the +B input is applied during power-on, the power supply is provided from the pins and the resulting supply voltage may not be sufficient to operate the power-on reset. • Care must be taken not to leave the +B input pin open. • Sample recommended circuits: • Input/output equivalent circuits Protective diode VCC Limiting resistance +B input (0 V to 16 V) P-ch N-ch R WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. 51 MB90340 Series 2. Recommended Conditions Value Min 4.0 VCC, AVCC 3.5 4.5 3.0 Typ 5.0 5.0 5.0    Max 5.5 5.5 5.5 5.5 (VSS = AVSS = 0 V) Unit V V V V µF °C Remarks Under normal operation Under normal operation, when not using the A/D converter and not Flash programming. When External bus is used. Maintains RAM data in stop mode Use a ceramic capacitor or capacitor of better AC characteristics. Capacitor at the VCC should be greater than this capacitor. Parameter Symbol Power supply voltage Smooth capacitor CS 0.1 −40 1.0 +105 Operating temperature TA C CS C Pin Connection Diagram WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. 52 MB90340 Series 3. DC Characteristics Parameter Symbol Pin (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V) Condition Value Min Typ  Max VCC + 0.3 Unit Remarks Port inputs if CMOS hysteresis input levels are selected (except P12, P44, P45, P46, P47, P50, P82, P83) Port inputs if AUTOMOTIVE input levels are selected Port inputs if TTL input levels are selected P12, P50, P82, P85 inputs if CMOS input levels are selected P44, P45, P46, P47 inputs if CMOS hysteresis input levels are selected RST input pin (CMOS hysteresis) MD input pin Port inputs if CMOS hysteresis input levels are selected (except P12, P44, P45, P46, P47, P50, P82, P83) Port inputs if AUTOMOTIVE input levels are selected Port inputs if TTL input levels are selected P12, P50, P82, P85 inputs if CMOS input levels are selected P44, P45, P46, P47 inputs if CMOS hysteresis input levels are selected RST input pin (CMOS hysteresis) MD input pin VIHS   0.8 VCC V VIHA Input H voltage (At VCC = 5 V ± 10%) VIHT VIHS               0.8 VCC 2.0 0.7 VCC        VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 VCC + 0.3 V V V VIHI VIHR VIHM 0.7 VCC 0.8 VCC VCC − 0.3 VSS − 0.3 V V V VILS 0.2 VCC V VILA Input L voltage (At VCC = 5 V ± 10%) VILT VILS       Normal outputs       VSS − 0.3 VSS − 0.3 VSS − 0.3 VSS − 0.3 VSS − 0.3 VSS − 0.3           0.5 VCC 0.8 0.3 VCC V V V VILI VILR VILM Output H voltage Output H voltage Output L voltage Output L voltage VOH VOHI VOL VOLI 0.3 VCC 0.2 VCC VSS + 0.3   0.4 0.4 V V V V V V V VCC = 4.5 V, VCC − 0.5 IOH = −4.0 mA I2C current VCC = 4.5 V, VCC − 0.5 outputs IOH = −3.0 mA Normal outputs VCC = 4.5 V, IOL = 4.0 mA   I2C current VCC = 4.5 V, outputs IOL = 3.0 mA (Continued) 53 MB90340 Series (Continued) Parameter Input leak current Pull-up resistance Symbol IIL (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V) Pin  P00 to P07, P10 to P17, P20 to P27, P30 to P37, RST MD2 Condition VCC = 5.5 V, VSS < VI < VCC  Value Min −1 Typ  Max 1 Unit Remarks µA kΩ RUP 25 50 100 Pull-down resistance RDOWN  VCC = 5.0 V, Internal frequency : 24 MHz, At normal operation. 25      50 100 Except kΩ Flash devices mA Flash devices Flash devices 55 70 ICC VCC = 5.0 V, Internal frequency : 24 MHz, At writing FLASH memory. VCC = 5.0 V, Internal frequency : 24 MHz, At erasing FLASH memory. 70 85 mA 75 90 mA ICCS VCC = 5.0 V, Internal frequency : 24 MHz, At Sleep mode. VCC = 5.0 V, Internal frequency : 2 MHz, At Main Timer mode VCC VCC = 5.0 V, Internal frequency : 24 MHz, At PLL Timer mode, external frequency = 4 MHz VCC = 5.0V Internal frequency: 8 kHz, At sub operation TA = +25°C VCC = 5.0V Internal frequency: 8 kHz, At sub sleep TA = +25°C VCC = 5.0V Internal frequency: 8 kHz, At watch mode TA = +25°C VCC = 5.0 V, At Stop mode, TA = +25°C Other than C, AVCC, AVSS, AVRH, AVRL, VCC, VSS,  25 35 mA ICTS 0.3 0.8 mA Power supply current* ICTSPLL6  4 7 mA ICCL  70 140 µA ICCLS  20 50 µA ICCT  10 35 µA ICCH  7 25 µA Input capacity CIN  5 15 pF * : The power supply current is measured with an external clock. 54 MB90340 Series 4. AC Characteristics (1) Clock Timing (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V) Symbol Pin X0, X1 Clock frequency fC X0, X1 fCL X0A, X1A X0, X1 Clock cycle time tCYL X0, X1 tCYLL Input clock pulse width Input clock rise and fall time Internal operating clock frequency (machine clock) Internal operating clock cycle time (machine clock) PWH, PWL PWHL, PWLL tCR, tCF fCP fCPL tCP tCPL X0A, X1A X0 X0A X0     41.67 10 10 5  1.5  41.67 20  30.5  15.2   8.192  122.1 333 —   5 24 50 666  ns µs ns µs ns MHz kHz ns µs Duty ratio is about 30% to 70%. When using external clock When using main clock When using sub clock When using main clock When using sub clock 3 — 62.5  32.768  24 100 333 MHz kHz ns When using an oscillation circuit When using an external clock Value Min 3 Typ  Max 16 Unit MHz Remarks When using an oscillation circuit When using an external clock* Parameter * : Whem selecting the PLL clock, the range of clock frequency is limitted. Use this product within range as mentioned in “Relation among external clock frequency and machine clock frequency”. tCYL X0 PWH tCF PWL tCR 0.8 VCC 0.2 VCC tCYLL X0A PWHL tCF PWLL tCR 0.8 VCC 0.2 VCC Clock Timing 55 MB90340 Series Guaranteed operation range 5.5 4.0 3.5 Guaranteed PLL operation range Guaranteed A/D Converter operation range Power supply voltage VCC (V) 1.5 4 Machine clock fCP (MHz) 24 Guaranteed operation range of MB90340 series Guaranteed oscillation frequency range x6 24 x4 x3 x2 x1 Internal clock fCP (MHz) 16 12 8 4.0 1.5 3 4 8 12 16 24 External clock fC (MHz) * x 1/2 (PLL off) * : When using the oscillation circuit, the maximum oscillation clock frequency is 16 MHz External clock frequency and Machine clock frequency 56 MB90340 Series (2) Reset Standby Input (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0.0 V) Pin Value Min 500 Max    Unit ns ns µs Remarks Under normal operation In Stop mode, Sub Clock mode, Sub Sleep mode and Watch mode In Time Timer mode Parameter Symbol Reset input time tRSTL RST Oscillation time of oscillator* + 100 µs 100 * : Oscillation time of oscillator is the time that the amplitude reaches 90%. In the crystal oscillator, the oscillation time is between several ms and to tens of ms. In FAR / ceramic oscillators, the oscillation time is between hundreds of µs to several ms. With an external clock, the oscillation time is 0 ms. Under normal operation: tRSTL RST 0.2 VCC 0.2 VCC In Stop mode, Sub Clock mode, Sub Sleep mode, Watch mode: tRSTL RST 0.2 VCC 90% of amplitude 0.2 VCC X0 Internal operation clock Oscillation time of oscillator 100 µs Oscillation stabilization waiting time Instruction execution Internal reset 57 MB90340 Series (3) Power On Reset (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0.0 V) Pin VCC VCC Condition  Value Min 0.05 1 Max 30  Unit ms ms Due to repetitive operation Remarks Parameter Power on rise time Power off time Symbol tR tOFF tR 2.7 V 0.2 V 0.2 V tOFF If you change the power supply voltage too rapidly, a power on reset may occur. We recommend that you startup smoothly by restraining voltages when changing the power supply voltage during operation, as shown in the figure below. Perform while not using the PLL clock. However, if voltage drops are within 1 V/s, you can operate while using the PLL clock. 0.2 V VCC VCC 3V VSS Holds RAM data We recommend a rise of 50 mV/ms maximum. (4) Clock Output Timing (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz) Pin CLK CLK Condition   Value Min 62.5 41.76 20 13 Max     Unit ns ns ns ns Remarks fCP = 16 MHz fCP = 24 MHz fCP = 16 MHz fCP = 24 MHz Parameter Cycle time CLK ↑ → CLK ↓ Symbol tCYC tCHCL tCYC tCHCL CLK 2.4 V 0.8 V 2.4 V 58 MB90340 Series (5) Bus Timing (Read) Parameter ALE pulse width Symbol tLHLL ALE ALE, A23 to A16, AD15 to AD00 A23 to A16, AD15 to AD00, RD A23 to A16, AD15 to AD00  (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz) Value Pin Condition Unit Remarks Min Max tCP/2 − 10 tCP/2 − 20 tCP/2 − 15 tCP − 15  3 tCP/2 − 20  0 tCP/2 − 15 tCP/2 − 10 tCP/2 − 16 tCP/2 − 15 tCP/2 − 15 tRLCH 2.4 V     5 tCP/2 − 60  3 tCP/2 − 50       ns ns ns ns ns ns ns ns ns ns ns ns ns Valid address ⇒ ALE ↓ time tAVLL ALE ↓ ⇒ Address valid time tLLAX ALE, AD15 to AD00 Valid address ⇒ RD ↓ time Valid address ⇒ Valid data input RD pulse width RD ↓ ⇒ Valid data input RD ↑ ⇒ Data hold time RD ↓ ⇒ ALE ↑ time RD ↑ ⇒ Address valid time tAVRL tAVDV tRLRH RD tRLDV RD, AD15 to AD00 tRHDX RD, AD15 to AD00 tRHLH RD, ALE tRHAX RD, A23 to A16 A23 to A16, AD15 to AD00, CLK Valid address ⇒ CLK ↑ time tAVCH RD ↓ ⇒ CLK ↑ time ALE ↓ ⇒ RD ↓ time tRLCH RD, CLK tLLRL ALE, RD tAVCH CLK 2.4 V tAVLL ALE 2.4 V tLHLL tAVRL RD tLLAX 2.4 V 0.8 V tRLRH 2.4 V 0.8 V tLLRL tRHLH 2.4 V tRHAX A23 to A16 2.4 V 0.8 V tRLDV tAVDV AD15 to AD00 2.4 V 0.8 V 2.4 V Address 0.8 V VIH VIL Read data 2.4 V 0.8 V tRHDX VIH VIL 59 MB90340 Series (6) Bus Timing (Write) Parameter Symbol (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz) Value Pin Condition Unit Remarks Min Max A23 to A16, AD15 to AD00, WR WR AD15 to AD00, WR AD15 to AD00, WR A23 to A16, WR WR, ALE WR, CLK tCP−15 3 tCP/2 − 20 3 tCP/2 − 20  15 tCP/2 − 10 tCP/2 − 15 tCP/2 − 15        ns ns ns ns ns ns ns Valid address ⇒ WR ↓ time WR pulse width Valid data output ⇒ WR ↑ time WR ↑ ⇒ Data hold time WR ↑ ⇒ Address valid time WR ↑ ⇒ ALE ↑ time WR ↓ ⇒ CLK ↑ time tAVWL tWLWH tDVWH tWHDX tWHAX tWHLH tWLCH tWLCH 2.4 V CLK tWHLH ALE 2.4 V tAVWL WR (WRL, WRH) 0.8 V tWLWH 2.4 V tWHAX A23 to A16 2.4 V 0.8 V tDVWH AD15 to AD00 2.4 V 0.8 V 2.4 V Address 0.8 V Write data 2.4 V 0.8 V tWHDX 2.4 V 0.8 V 60 MB90340 Series (7) Ready Input Timing Symbol tRYHS tRYHH Parameter RDY setup time RDY hold time (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz) Rated Value Test Pin Units Remarks Condition Min Max RDY RDY 45  32 0    ns ns ns fCP = 16 MHz fCP = 24 MHz Note : If the RDY setup time is insufficient, use the auto-ready function. CLK 2.4 V ALE RD/WR tRYHS RDY When WAIT is not used. VIH tRYHH VIH RDY When WAIT is used. VIL 61 MB90340 Series (8) Hold Timing Parameter Pin floating ⇒ HAK ↓ time HAK ↑ time ⇒ Pin valid time Symbol tXHAL tHAHV (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz) Value Pin Condition Units Remarks Min Max HAK  HAK tCP 2 tCP ns 30 tCP ns Note : There is more than 1 cycle from when HRQ reads in until the HAK is changed. HAK 0.8 V tXHAL Each pin 2.4 V 0.8 V High-Z 2.4 V tHAHV 2.4 V 0.8 V 62 MB90340 Series (9) UART0/1/2/3/4 Parameter Serial clock cycle time SCK ↓ → SOT delay time Valid SIN → SCK ↑ SCK ↑ → Valid SIN hold time Serial clock “H” pulse width Serial clock “L” pulse width SCK ↓ → SOT delay time Valid SIN → SCK ↑ SCK ↑ → Valid SIN hold time Symbol tSCYC tSLOV tIVSH tSHIX tSHSL tSLSH tSLOV tIVSH tSHIX (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, VSS = 0.0 V, fCP ≤ 24 MHz) Value Pin Condition Unit Remarks Min Max SCK0 to SCK4 SCK0 to SCK4, SOT0 to SOT4 Internal clock operation output SCK0 to SCK4, pins are SIN0 to SIN4 CL = 80 pF + 1 TTL. SCK0 to SCK4, SIN0 to SIN4 SCK0 to SCK4 SCK0 to SCK4 SCK0 to SCK4, External clock SOT0 to SOT4 operation output pins are SCK0 to SCK4, CL = 80 pF + 1 TTL. SIN0 to SIN4 SCK0 to SCK4, SIN0 to SIN4 8 tCP −80 100 60 4 tCP 4 tCP  60 60  +80     150   ns ns ns ns ns ns ns ns ns Notes : • AC characteristic in CLK synchronized mode. • CL is load capacity value of pins when testing. • tCP is the machine cycle (Unit : ns) tSCYC SCK 2.4 V 0.8 V tSLOV SOT 2.4 V 0.8 V tIVSH SIN VIH VIL tSHIX VIH VIL 0.8 V Internal Shift Clock Mode 63 MB90340 Series tSLSH SCK VIL tSLOV SOT 2.4 V 0.8 V tIVSH SIN VIH VIL VIL VIH tSHSL VIH tSHIX VIH VIL External Shift Clock Mode (10) Trigger Input Timing Parameter Symbol tTRGH tTRGL (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = 0.0 V) Value Pin Condition Unit Remarks Min Max INT0 to INT15, INT0R to INT15R, ADTG  5 tCP  ns Input pulse width VIH VIH VIL tTRGH tTRGL VIL INT0 to INT15, INT0R to INT15R, ADTG 64 MB90340 Series (11) Timer Related Resource Input Timing (TA = −40 °C to +105 °C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = 0 V) Value Parameter Symbol Pin Condition Unit Remarks Min Max Input pulse width tTIWH tTIWL TIN0 to TIN3, IN0 to IN7  4 tCP  ns VIH VIH VIL tTIWH tTIWL VIL TIN0 to TIN3, IN0 to IN7 (12) Timer Related Resource Output Timing (TA = –40°C to +105°C, VCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = 0.0 V) Value Parameter Symbol Pin Condition Unit Remarks Min Max CLK ↑ ⇒ TOUT change time tTO TOT0 to TOT3, PPG0 to PPGF  30  ns CLK 2.4 V TOT0 to TOT3, PPG0 to PPGF tTO 2.4 V 0.8 V 65 MB90340 Series (13) I2C Timing Parameter SCL clock frequency Hold time (repeated) START condition SDA↓→SCL↓ “L” width of the SCL clock “H” width of the SCL clock Set-up time for a repeated START condition SCL↑→SDA↓ Data hold time SCL↓→SDA↓↑ Data set-up time SDA↓↑→SCL↑ Set-up time for STOP condition SCL↑→SDA↑ Bus free time between a STOP and START condition Symbol fSCL tHDSTA tLOW tHIGH tSUSTA tHDDAT tSUDAT tSUSTO tBUS (TA = –40°C to +105°C, VCC = 5.0 V ± 10%, VSS = 0.0 V) Standard-mode Fast-mode*4 Unit Condition Min Max Min Max 0 4.0 4.7 4.0 R = 1.7 kΩ, C = 50 pF*1 4.7 0 250 4.0 4.7 100     3.45*2    0 0.6 1.3 0.6 0.6 0 100 0.6 1.3 400     0.9*3    kHz µs µs µs µs µs ns µs µs *1 : R,C : Pull-up resistor and load capacitor of the SCL and SDA lines. *2 : The maximum tHDDAT have only to be met if the device does not stretch the “L” width (tLOW) of the SCL signal. *3 : A Fast-mode I2C-bus device can be used in a Standard-mode I2C-bus system, but the requirement tSUDAT ≥ 250 ns must then be met. *4 : For use at over 100 kHz, set the machine clock to at least 6 MHz. SDA tBUS tLOW SCL tSUDAT tHDSTA tHDSTA tHDDAT tHIGH tSUSTA tSUSTO 66 MB90340 Series 5. A/D Converter (TA = −40 °C to +105 °C, 3.0 V ≤ AVRH − AVRL, VCC = AVCC = 5.0 V ± 10%, fCP ≤ 24 MHz, VSS = AVSS = 0 V) Symbol     VOT VFST   IAIN VAIN   IA IAH IR IRH  Pin     Value Min     Typ     Max 10 ±3.0 ±2.5 ±1.9 Unit bit LSB LSB LSB Remarks Parameter Resolution Total error Nonlinearity error Differential nonlinearity error Zero reading voltage Full scale reading voltage Compare time Sampling time Analog port input current Analog input voltage range Reference voltage range Power supply current Reference voltage current Offset between input channels AN0 to AN23 AVRL − 1.5 AVRL + 0.5 AVRL + 2.5 LSB AN0 to AN23 AVRH − 3.5 AVRH − 1.5 AVRH + 0.5 LSB   AN0 to AN23 AN0 to AN23 AVRH AVRL AVCC AVCC AVRH AVRH AN0 to AN23 1.0 2.0 0.5 1.2 −0.3 AVRL AVRL + 2.7 0            3.5  600   16,500 µs µs µA V V V mA µA µA µA LSB * * 4.5 V ≤ AVCC ≤ 5.5 V 4.0 V ≤ AVCC < 4.5 V 4.5 V ≤ AVCC ≤ 5.5 V 4.0 V ≤ AVCC < 4.5 V ∞ +0.3 AVRH AVCC AVRH − 2.7 7.5 5 900 5 4 * : IF A/D convertor is not operating, a current when CPU is stopped is applicable (VCC = AVCC = AVRH = 5.0 V) . Note : The accuracy gets worse as AVRH − AVRL becomes smaller. 67 MB90340 Series 6. Definition of A/D Converter Terms Resolution Non linearity error Differential linearity error Total error Zero reading voltage Full scale reading voltage : Analog variation that is recognized by an A/D converter. : Deviation between a line across zero-transition line ( “00 0000 0000” ← → “00 0000 0001” ) and full-scale transition line ( “11 1111 1110” ← → “11 1111 1111” ) and actual conversion characteristics. : Deviation of input voltage, which is required for changing output code by 1 LSB, from an ideal value. : Difference between an actual value and an ideal value. A total error includes zero transition error, full-scale transition error, and linear error. : Input voltage which results in the minimum conversion value. : Input voltage which results in the maximum conversion value. Total error 3FF 3FE 3FD Digital output {1 LSB × (N − 1) + 0.5 LSB} Actual conversion characteristics 1.5 LSB 004 003 002 001 0.5 LSB AVRL Analog input VNT (Actually-measured value) Actual conversion characteristics Ideal characteristics AVRH Total error of digital output “N” = VNT − {1 LSB × (N − 1) + 0.5 LSB} 1 LSB AVRH − AVRL 1 LSB = (Ideal value) [V] 1024 VOT (Ideal value) = AVRL + 0.5 LSB [V] [LSB] VFST (Ideal value) = AVRH − 1.5 LSB [V] VNT : A voltage at which digital output transitions from (N − 1) to N. (Continued) 68 MB90340 Series (Continued) Non linearity error 3FF 3FE 3FD Digital output Actual conversion characteristics {1 LSB × (N − 1) + VOT } N+1 VFST (actual measurement value) VNT (actual measurement value) Actual conversion characteristics Actual conversion characteristics Differential linearity error Ideal characteristics Digital output N 004 003 002 N−1 V (N + 1) T (actual measurement value) VNT (actual measurement value) Actual conversion characteristics AVRH Analog input Ideal characteristics 001 VOT (actual measurement value) AVRL Analog input AVRH N−2 AVRL Non linearity error of digital output N = Differential linearity error of digital output N = 1 LSB = VNT − {1 LSB × (N − 1) + VOT} 1 LSB V (N+1) T − VNT 1 LSB VFST − VOT 1022 −1 LSB [LSB] [V] [LSB] VOT : Voltage at which digital output transits from “000H” to “001H.” VFST : Voltage at which digital output transits from “3FEH” to “3FFH.” 69 MB90340 Series 7. Notes on A/D Converter Section Use the device with external circuits of the following output impedance for analog inputs : Recommended output impedance of external circuits are : Approx. 1.5 kΩ or lower (4.0 V ≤ AVCC ≤ 5.5 V, sampling period ≤ 0.5 µs) If an external capacitor is used, in consideration of the effect by tap capacitance caused by external capacitors and on-chip capacitors, capacitance of the external one is recommended to be several thousand times as high as internal capacitor. If output impedance of an external circuit is too high, a sampling period for an analog voltage may be insufficient. • Analog input circuit model Analog input R Comparator C 4.5 V ≤ AVCC ≤ 5.5 V : R = 2.52 kΩ, C = 10.7 pF : : 4.0 V ≤ AVCC < 4.5 V : R = 13.6 kΩ, C = 10.7 pF : : Note : Use the values in the figure only as a guideline. 8. Flash Memory Program/Erase Characteristics Parameter Sector erase time Chip erase time Word (16 bit width) programming time Programs/Erase cycle Flash Data Retension Time  Average TA = +85 °C TA = +25 °C VCC = 5.0 V Conditions Value Min    10,000 20 Typ 1 9 16   Max 15  3,600   Unit s s µs cycle Year * Remarks Excludes programming prior to erasure Excludes programming prior to erasure Except for the over head time of the system * : This value comes from the technology qualification (using Arrhenius equation to translate high temperature measurements into normalized value at +85 °C) . 70 MB90340 Series s EXAMPLE CHARACTERISTICS • MB90F346A, MB90F346AS, MB90F346CA, MB90F346CAS ICC − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 70 60 50 f = 24 MHz f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 5.5 6.5 100 90 80 70 60 50 40 30 20 10 0 ICCL − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICC (mA) 40 30 20 10 0 ICCL ( A) f = 8 kHz 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICCS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 35 30 f = 24 MHz f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 5.5 6.5 50 45 40 35 30 25 20 15 10 5 0 ICCLS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICCS (mA) 20 15 10 5 0 ICCLS ( A) 25 f = 8 kHz 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICTS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 400 350 300 250 200 150 100 50 0 2.5 3.5 4.5 5.5 6.5 20 18 16 14 12 10 8 6 4 2 0 ICCT − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICCT ( A) ICTS ( A) f = 2 MHz f = 8 kHz 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICTSPLL6 − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 10 9 8 7 6 5 4 3 2 1 0 10 9 8 7 6 5 4 3 2 1 0 ICCH − VCC TA = +25 °C, at stop ICTSPLL6 (mA) f = 24 MHz 2.5 3.5 4.5 5.5 6.5 ICCH ( A) 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) 71 MB90340 Series • MB90F347A, MB90F347AS, MB90F347CA, MB90F347CAS ICC − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 70 60 50 f = 24 MHz f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 5.5 6.5 100 90 80 70 60 50 40 30 20 10 0 ICCL − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICC (mA) 40 30 20 10 0 ICCL ( A) f = 8 kHz 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICCS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 35 30 f = 24 MHz f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 5.5 6.5 50 45 40 35 30 25 20 15 10 5 0 ICCLS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICCS (mA) 20 15 10 5 0 ICCLS ( A) 25 f = 8 kHz 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICTS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 400 350 300 250 200 150 100 50 0 2.5 3.5 4.5 5.5 6.5 20 18 16 14 12 10 8 6 4 2 0 ICCT − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICCT ( A) ICTS ( A) f = 2 MHz f = 8 kHz 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICTSPLL6 − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 10 9 8 7 6 5 4 3 2 1 0 10 9 8 7 6 5 4 3 2 1 0 ICCH − VCC TA = +25 °C, at stop ICTSPLL6 (mA) f = 24 MHz 2.5 3.5 4.5 5.5 6.5 ICCH ( A) 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) 72 MB90340 Series • MB90F349A, MB90F349AS, MB90F349CA, MB90F349CAS ICC − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 70 60 50 f = 24 MHz f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 5.5 6.5 100 90 80 70 60 50 40 30 20 10 0 ICCL − VCC TA = +25 °C, at external clock operating f = Internal operation frequency f = 8 kHz ICC (mA) 40 30 20 10 0 ICCL (µA) 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICCS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 35 30 25 f = 24 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 5.5 6.5 50 45 40 35 30 25 20 15 10 5 0 2.5 3.5 ICCLS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICCS (mA) 20 15 10 5 0 ICCLS (µA) f = 20 MHz f = 8 kHz 4.5 5.5 6.5 VCC (V) VCC (V) ICTS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 400 350 300 250 200 150 100 50 0 2.5 3.5 4.5 5.5 6.5 20 18 16 14 12 10 8 6 4 2 0 ICCT − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICTS (µA) ICCT (µA) f = 2 MHz f = 8 kHz 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICTSPLL6 − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 10 9 8 7 6 5 4 3 2 1 0 10 9 8 7 6 5 4 3 2 1 0 ICCH − VCC TA = +25 °C, at stop ICTSPLL6 (mA) f = 24 MHz 2.5 3.5 4.5 5.5 6.5 ICCH (µA) 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) 73 MB90340 Series • MB90F342A, MB90F342AS, MB90F342CA, MB90F342CAS ICC − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 70 60 50 f = 24 MHz f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 5.5 6.5 100 90 80 70 60 50 40 30 20 10 0 ICCL − VCC TA = +25 °C, at external clock operating f = Internal operation frequency f = 8 kHz ICC (mA) 40 30 20 10 0 ICCL (µA) 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICCS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 35 30 25 f = 24 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 5.5 6.5 50 45 40 35 30 25 20 15 10 5 0 2.5 3.5 ICCLS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICCS (mA) 20 15 10 5 0 ICCLS (µA) f = 20 MHz f = 8 kHz 4.5 5.5 6.5 VCC (V) VCC (V) ICTS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 400 350 300 250 200 150 100 50 0 2.5 3.5 4.5 5.5 6.5 20 18 16 14 12 10 8 6 4 2 0 ICCT − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICTS (µA) ICCT (µA) f = 2 MHz f = 8 kHz 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICTSPLL6 − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 10 9 8 7 6 5 4 3 2 1 0 10 9 8 7 6 5 4 3 2 1 0 ICCH − VCC TA = +25 °C, at stop ICTSPLL6 (mA) f = 24 MHz 2.5 3.5 4.5 5.5 6.5 ICCH (µA) 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) 74 MB90340 Series • MB90F345A, MB90F345AS, MB90F345CA, MB90F345CAS ICC − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 70 60 50 f = 24 MHz 100 90 80 70 60 50 40 30 20 10 0 ICCL − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICC (mA) 40 30 20 10 0 2.5 3.5 4.5 5.5 f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 6.5 ICCL ( A) f = 20 MHz f = 16 MHz f = 8 kHz 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICCS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 35 30 25 f = 24 MHz f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 5.5 6.5 50 45 40 35 30 25 20 15 10 5 0 ICCLS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICCS (mA) 20 15 10 5 0 ICCLS ( A) f = 8 kHz 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICTS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 400 350 300 20 18 16 14 12 10 8 6 4 2 0 ICCT − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICTS ( A) 250 200 150 100 50 0 2.5 3.5 4.5 5.5 ICCT ( A) f = 2 MHz f = 8 kHz 6.5 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICTSPLL6 − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 10 9 8 7 6 5 4 3 2 1 0 10 9 8 7 6 5 4 3 2 1 0 ICCH − VCC TA = +25 °C, at stop ICTSPLL6 (mA) f = 24 MHz 2.5 3.5 4.5 5.5 6.5 ICCH ( A) 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) 75 MB90340 Series • MB90346A, MB90346AS, MB90346CA, MB90346CAS ICC − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 70 60 f = 24 MHz 50 100 90 80 70 60 50 40 30 20 10 0 ICCL − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICC (mA) 40 30 20 10 0 2.5 3.5 4.5 5.5 ICCL (µA) f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 6.5 f = 8 kHz 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICCS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 35 30 f = 24 MHz f = 20 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 5.5 6.5 f = 16 MHz 50 45 40 35 30 25 20 15 10 5 0 ICCLS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICCS (mA) 25 20 15 10 5 0 ICCLS (µA) f = 8 kHz 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICTS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 400 350 300 20 18 16 14 12 10 8 6 4 2 0 ICCT − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICTS (µA) 250 200 150 100 50 0 2.5 3.5 4.5 5.5 ICCT (µA) f = 2 MHz f = 8 kHz 6.5 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICTSPLL6 − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 10 9 8 7 6 5 4 3 2 1 0 10 9 8 7 6 5 4 3 2 1 0 ICCH − VCC TA = +25 °C, at stop ICTSPLL6 (mA) f = 24 MHz 2.5 3.5 4.5 5.5 6.5 ICCH (µA) 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) 76 MB90340 Series • MB90347A, MB90347AS, MB90347CA, MB90347CAS ICC − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 70 60 f = 24 MHz 50 100 90 80 70 60 50 40 30 20 10 0 ICCL − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICC (mA) 40 30 20 10 0 2.5 3.5 4.5 5.5 ICCL (µA) f = 20 MHz f = 16 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 6.5 f = 8 kHz 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICCS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 35 30 f = 24 MHz f = 20 MHz f = 12 MHz f = 10 MHz f = 8 MHz f = 4 MHz f = 2 MHz 2.5 3.5 4.5 5.5 6.5 f = 16 MHz 50 45 40 35 30 25 20 15 10 5 0 ICCLS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICCS (mA) 25 20 15 10 5 0 ICCLS (µA) f = 8 kHz 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICTS − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 400 350 300 20 18 16 14 12 10 8 6 4 2 0 ICCT − VCC TA = +25 °C, at external clock operating f = Internal operation frequency ICTS (µA) 250 200 150 100 50 0 2.5 3.5 4.5 5.5 ICCT (µA) f = 2 MHz f = 8 kHz 6.5 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) ICTSPLL6 − VCC TA = +25 °C, at external clock operating f = Internal operation frequency 10 9 8 7 6 5 4 3 2 1 0 10 9 8 7 6 5 4 3 2 1 0 ICCH − VCC TA = +25 °C, at stop ICTSPLL6 (mA) f = 24 MHz 2.5 3.5 4.5 5.5 6.5 ICCH (µA) 2.5 3.5 4.5 5.5 6.5 VCC (V) VCC (V) 77 MB90340 Series • I/O characteristics (VCC−VOH) − IOH TA = +25 °C, VCC = 4.5 V 800 700 1000 900 800 700 600 500 400 300 200 100 0 VOL − IOL TA = +25 °C, VCC = 4.5 V VCC VOH (mV) 600 500 400 300 200 100 0 0 1 2 3 4 5 6 7 8 9 10 VOL (mV) 0 1 2 3 4 5 6 7 8 9 10 IOH (mA) IOL (mA) Automotive VIN − VCC TA = +25 °C 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 CMOS VIN − VCC UART-SIN pin, other than I2C pin TA = +25 °C VIHA VILA VIN (V) VIHS VIN (V) VILS 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 VCC (V) VCC (V) TTL VIN − VCC T = +25 °C A CMOS VIN − VCC UART-SIN pin, I2C pin TA = +25 °C 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 2.5 2.3 2.0 1.8 1.5 1.3 1.0 0.8 0.5 0.3 0.0 VIHS VIN (V) VIHT VILT VIN (V) VILS 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 6.0 6.5 7.0 VCC (V) VCC (V) 78 MB90340 Series s ORDERING INFORMATION Part number MB90F342APF MB90F342ASPF MB90F342CAPF MB90F342CASPF MB90F342APFV MB90F342ASPFV MB90F342CAPFV MB90F342CASPFV MB90F343APF MB90F343ASPF MB90F343CAPF MB90F343CASPF MB90F343APFV MB90F343ASPFV MB90F343CAPFV MB90F343CASPFV MB90F345APF MB90F345ASPF MB90F345CAPF MB90F345CASPF MB90F345APFV MB90F345ASPFV MB90F345CAPFV MB90F345CASPFV MB90F346APF MB90F346ASPF MB90F346CAPF MB90F346CASPF MB90F346APFV MB90F346ASPFV MB90F346CAPFV MB90F346CASPFV 100-pin Plastic LQFP (FPT-100P-M05) 100-pin Plastic QFP (FPT-100P-M06) 100-pin Plastic LQFP (FPT-100P-M05) 100-pin Plastic QFP (FPT-100P-M06) 100-pin Plastic LQFP (FPT-100P-M05) 100-pin Plastic QFP (FPT-100P-M06) 100-pin Plastic LQFP (FPT-100P-M05) 100-pin Plastic QFP (FPT-100P-M06) Package Remarks (Continued) 79 MB90340 Series Part number MB90F347APF MB90F347ASPF MB90F347CAPF MB90F347CASPF MB90F347APFV MB90F347ASPFV MB90F347CAPFV MB90F347CASPFV MB90F349APF MB90F349ASPF MB90F349CAPF MB90F349CASPF MB90F349APFV MB90F349ASPFV MB90F349CAPFV MB90F349CASPFV MB90341APF MB90341ASPF MB90341CAPF MB90341CASPF MB90341APFV MB90341ASPFV MB90341CAPFV MB90341CASPFV MB90342APF MB90342ASPF MB90342CAPF MB90342CASPF MB90342APFV MB90342ASPFV MB90342CAPFV MB90342CASPFV Package Remarks 100-pin Plastic QFP (FPT-100P-M06) 100-pin Plastic LQFP (FPT-100P-M05) 100-pin Plastic QFP (FPT-100P-M06) 100-pin Plastic LQFP (FPT-100P-M05) 100-pin Plastic QFP (FPT-100P-M06) 100-pin Plastic LQFP (FPT-100P-M05) 100-pin Plastic QFP (FPT-100P-M06) 100-pin Plastic LQFP (FPT-100P-M05) (Continued) 80 MB90340 Series (Continued) Part number MB90346APF MB90346ASPF MB90346CAPF MB90346CASPF MB90346APFV MB90346ASPFV MB90346CAPFV MB90346CASPFV MB90347APF MB90347ASPF MB90347CAPF MB90347CASPF MB90347APFV MB90347ASPFV MB90347CAPFV MB90347CASPFV MB90348APF MB90348ASPF MB90348CAPF MB90348CASPF MB90348APFV MB90348ASPFV MB90348CAPFV MB90348CASPFV MB90349APF MB90349ASPF MB90349CAPF MB90349CASPF MB90349APFV MB90349ASPFV MB90349CAPFV MB90349CASPFV MB90V340A-101 MB90V340A-102 299-pin Ceramic PGA (PGA-299C-A01) For evaluation 100-pin Plastic LQFP (FPT-100P-M05) 100-pin Plastic QFP (FPT-100P-M06) 100-pin Plastic LQFP (FPT-100P-M05) 100-pin Plastic QFP (FPT-100P-M06) 100-pin Plastic LQFP (FPT-100P-M05) 100-pin Plastic QFP (FPT-100P-M06) 100-pin Plastic LQFP (FPT-100P-M05) 100-pin Plastic QFP (FPT-100P-M06) Package Remarks 81 MB90340 Series s PACKAGE DIMENSIONS 100-pin Plastic QFP (FPT-100P-M06) 23.90±0.40(.941±.016) * 20.00±0.20(.787±.008) 80 51 Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness including plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 81 50 0.10(.004) 17.90±0.40 (.705±.016) *14.00±0.20 (.551±.008) INDEX Details of "A" part 100 31 1 30 0.25(.010) +0.35 3.00 –0.20 +.014 .118 –.008 (Mounting height) 0~8˚ 0.17±0.06 (.007±.002) 0.80±0.20 (.031±.008) 0.88±0.15 (.035±.006) 0.25±0.20 (.010±.008) (Stand off) 0.65(.026) 0.32±0.05 (.013±.002) 0.13(.005) M "A" C 2002 FUJITSU LIMITED F100008S-c-5-5 Dimensions in mm (inches) Note : The values in parentheses are reference values. (Continued) 82 MB90340 Series (Continued) 100-pin Plastic LQFP (FPT-100P-M05) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 16.00±0.20(.630±.008)SQ * 14.00±0.10(.551±.004)SQ 75 51 76 50 0.08(.003) Details of "A" part INDEX 1.50 –0.10 .059 –.004 (Mounting height) 26 +0.20 +.008 100 0.10±0.10 (.004±.004) (Stand off) 0.25(.010) 0˚~8˚ "A" 0.50±0.20 (.020±.008) 0.60±0.15 (.024±.006) 1 25 0.50(.020) 0.20±0.05 (.008±.002) 0.08(.003) M 0.145±0.055 (.0057±.0022) C 2003 FUJITSU LIMITED F100007S-c-4-6 Dimensions in mm (inches) Note : The values in parentheses are reference values. 83 MB90340 Series FUJITSU LIMITED All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party’s intellectual property right or other right by using such information. Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. F0405 © FUJITSU LIMITED Printed in Japan