MB9BF104RPMC-G-JNE1

FUJITSU SEMICONDUCTOR DATA SHEET DS706-00007-1v0-E 32-bit ARMTM CortexTM-M3 based Microcontroller FM3 MB9B100 Series MB9BF104N/R, F105N/R, F106N/R  DESCRIPTION The MB9B100 Series are a highly integrated 32-bit microcontroller that target for high-performance and cost-sensitive embedded control applications. The MB9B100 Series are based on the ARM Cortex-M3 Processor and on-chip Flash memory and SRAM, and peripheral functions, including Motor Control Timers, ADCs and Communication Interfaces (UART, SIO, I2C, LIN). Note: ARM and Cortex-M3 are the trademarks of ARM Limited in the EU and other countries. Copyright2010-2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2011.1 FUJITSU SEMICONDUCTOR CONFIDENTIAL r2.1 MB9B100 Series  FEATURES  32-bit ARM Cortex-M3 Core ・ Processor version: r2p0 ・ Up to 80MHz Frequency Operation ・ Memory Protection Unit (MPU): improve the reliability of an embedded system ・ Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels ・ 24-bit System timer (Sys Tick): System timer for OS task management  On-chip Memories [Flash memory] ・ Up to 512 Kbyte ・ Read cycle: 0wait-cycle@up to 60MHz, 2wait-cycle* above *: Instruction pre-fetch buffer is included. So when CPU access continuously, it becomes 0wait-cycle ・ Security function for code protection [SRAM] MB9B100 Series contain a total of up to 64Kbyte on-chip SRAM memories. This is composed of two independent SRAM for CPU and DMA Controller can process simultaneously. ・ Up to 32 Kbyte SRAM for high-performance CPU ・ Up to 32 Kbyte SRAM for CPU/DMA Controller  External Bus Interface ・ Supports SRAM, NOR& NAND Flash device ・ Up to 8 chip selects ・ 8/16-bit Data width ・ Up to 25-bit Address bit  Multi-function Serial Interface (Max. 8channels) ・ 4 channels with 16-byte FIFO (ch.4-ch.7), 4 channels without FIFO (ch.0-ch.3) ・ Operation mode is selectable from the followings for each channel. ・ UART ・ CSIO ・ LIN ・ I 2C [UART] ・ Full-duplex double buffer ・ Selection with or without parity supported ・ Built-in dedicated baud rate generator ・ External clock available as a serial clock ・ Hardware Flow control : Automatically control the transmission by CTS/RTS (only ch.4) ・ Various error detect functions available (parity errors, framing errors, and overrun errors) [CSIO] ・ Full-duplex double buffer ・ Built-in dedicated baud rate generator ・ Overrun error detect function available 2 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.1 MB9B100 Series [LIN] ・ LIN protocol Rev.2.1 supported ・ Full-duplex double buffer ・ Master/Slave mode supported ・ LIN break field generate (can be changed 13-16bit length) ・ LIN break delimiter generate (can be changed 1-4bit length) ・ Various error detect functions available (parity errors, framing errors, and overrun errors) [I2C] ・ Standard mode (Max.100kbps) / High-speed mode (Max.400Kbps) supported  DMA Controller (8channels) DMA Controller has an independent bus for CPU, so CPU and DMA Controller can process simultaneously. ・ 8 independently configured and operated channels ・ Transfer can be started by software or request from the built-in peripherals ・ Transfer address area: 32bit(4Gbyte) ・ Transfer mode: Block transfer/Burst transfer/Demand transfer ・ Transfer data type: byte/half-word/word ・ Transfer block count: 1 to 16 ・ Number of transfers: 1 to 65536  A/D Converter (Max. 16channels) [12-bit A/D Converter] ・ Successive Approximation Register type ・ Built-in 3unit ・ Conversion time: 1.0μs@5V ・ Priority conversion available (priority at 2levels) ・ Scanning conversion mode ・ Built-in FIFO for conversion data storage (for SCAN conversion: 16steps, for Priority conversion: 4steps)  Base Timer (Max. 8channels) Operation mode is selectable from the followings for each channel. ・ 16-bit PWM timer ・ 16-bit PPG timer ・ 16/32-bit reload timer ・ 16/32-bit PWC timer  General Purpose I/O Port MB9B100 series can use its pins as I/O ports when they are not used for external bus or peripherals. Moreover, the port relocate function is built in. It can set which I/O port the peripheral function can be allocated. ・ Capable of pull-up control per pin ・ Capable of reading pin level directly ・ Built-in the port relocate function ・ Up to 100 fast I/O Ports@120pin Package DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 3 r2.1 MB9B100 Series  Multi-function Timer (Max. 2unit) The Multi-function timer is composed of the following blocks. ・ 16-bit free-run timer × 3ch/unit ・ Input capture × 4ch/unit ・ Output compare × 6ch/unit ・ A/D activating compare × 3ch/unit ・ Waveform generator × 3ch/unit ・ 16-bit PPG timer × 3ch/unit The following function can be used to achieve the motor control. ・ PWM signal output function ・ DC chopper waveform output function ・ Dead time function ・ Input capture function ・ A/D convertor activate function ・ DTIF (Motor emergency stop) interrupt function  Quadrature Position/Revolution Counter (QPRC) (Max. 2unit) The Quadrature Position/Revolution Counter (QPRC) is used to measure the position of the position encoder. Moreover, it is possible to use up/down counter. ・ The detection edge of the three external event input pins AIN, BIN and ZIN is configurable. ・ 16-bit position counter ・ 16-bit revolution counter ・ Two 16-bit compare registers  Dual Timer (Two 32/16bit Down Counter) The Dual Timer consists of two programmable 32/16-bit down counters. Operation mode is selectable from the followings for each channel. ・ Free-running ・ Periodic (=Reload) ・ One-shot  Watch Counter The Watch counter is used for wake up from power saving mode. ・ Interval timer: up to 64s(Max.)@ Sub Clock : 32.768kHz  External Interrupt Controller Unit ・ Up to 16 external vectors ・ Include one non-maskable interrupt(NMI)  Watch dog Timer (2channels) A watchdog timer can generate interrupts or a reset when a time-out value is reached. MB9B100 series consists of two different watchdogs, a "Hardware" watchdog and a "Software" watchdog. "Hardware" watchdog timer is clocked by low speed CR oscillator. Therefore,”Hardware" watchdog is active in any power saving mode except STOP. 4 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.1 MB9B100 Series  CRC (Cyclic Redundancy Check) Accelerator The CRC accelerator helps a verify data transmission or storage integrity. CCITT CRC16 and IEEE-802.3 CRC32 are supported. ・ CCITT CRC16 Generator Polynomial: 0x1021 ・ IEEE-802.3 CRC32 Generator Polynomial: 0x04C11DB7  Clock and Reset [Clocks] Five clock sources (2 ext. osc, 2 CR osc, and PLL) that are dynamically selectable. ・ Main Clock ・ Sub Clock ・ High-speed CR Clock ・ Low-speed CR Clock ・ PLL Clock : 4 to 48MHz : 32.768kHz : 4MHz : 100kHz [Resets] Reset requests from INITX pins, Power on reset, Software reset, watchdog timers reset, low voltage detector reset and clock supervisor reset.  Clock Super Visor (CSV) Clocks generated by CR oscillators are used to supervise abnormality of the external clocks. ・ External OSC clock failure (clock stop) is detected, reset is asserted. ・ External OSC frequency anomaly is detected, interrupt or reset is asserted.  Low Voltage Detector (LVD) MB9B100 Series include 2-stage monitoring of voltage on the VCC. When the voltage falls below the voltage has been set, Low Voltage Detector generates an interrupt or reset. ・ LVD1: error reporting via interrupt ・ LVD2: auto-reset operation  Low Power Mode Three power saving modes supported. ・ SLEEP ・ TIMER ・ STOP  Debug ・ Serial Wire JTAG Debug Port (SWJ-DP) ・ Embedded Trace Macrocells (ETM) provide comprehensive debug and trace facilities. ・ Trace Port Interface Unit (TPIU) for bridging to a Trace Port Analyzer.  Power Supply Two Power Supplies ・ VCC = 2.7V to 5.5V: Correspond to the wide range voltage. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 5 r2.1 MB9B100 Series  PRODUCT LINEUP  Memory size Product device MB9BF104N/R MB9BF105N/R MB9BF106N/R 256Kbyte 32Kbyte 384Kbyte 48Kbyte 512Kbyte 64Kbyte On-chip Flash On-chip RAM  Function Product device MB9BF104N MB9BF105N MB9BF106N Pin count MB9BF104R MB9BF105R MB9BF106R 100 120 Cortex-M3 80MHz 2.7V to 5.5V 8ch CPU Freq. Power supply voltage range DMAC External Bus Interface MF Serial Interface (UART/CSIO/LIN/I2C) Base Timer (PWC/Reload timer/PWM/PPG) A/D activation 3ch compare Input 4ch capture MF- Free-run 3ch Timer timer Output 6ch compare Waveform 3ch generator PPG 3ch QPRC Dual Timer Watch Counter CRC Accelerator Watchdog timer External Interrupts I/O ports 12 bit A/D converter CSV (Clock Super Visor) LVD (Low Voltage Detector) Internal High-speed OSC Low-speed Debug Function Addr:25bit (Max.) Data:8/16 bit CS:5(Max.) Support:SRAM, NOR Flash Addr:25bit (Max.) Data:8/16 bit CS:8(Max.) Support:SRAM, NOR & NAND Flash 8ch (Max.) 8ch (Max.) 2 units (Max.) 2ch (Max.) 1 unit 1 unit Yes 1ch(SW) + 1ch(HW) 16pins (Max.)+ NMI × 1 80pins (Max.) 100pins (Max.) 16ch (3 units) Yes 2ch 4MHz (± 2%) 100kHz (Typ) SWJ-DP/TPIU/ETM Note: All signals of the peripheral function in each product cannot be allocated by limiting the pins of package. It is necessary to use the port relocate function of the General I/O port according to your function use. 6 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.1 MB9B100 Series  PACKAGES Product name Package LQFP: LQFP: BGA: FPT-100P-M20*/M23 FPT-120P-M21 BGA-112P-M04 MB9BF104N MB9BF105N MB9BF106N MB9BF104R MB9BF105R MB9BF106R    - : Supported * : ES product only Note : Refer to "PACKAGE DIMENSIONS" for detailed information on each package. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 7 r2.1 MB9B100 Series  PIN ASSIGNMENT  FPT-100P-M20/M23 (TOP VIEW) The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. 8 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series  FPT-120P-M21 (TOP VIEW) The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 9 r2.0 MB9B100 Series  BGA-112P-M04 The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. 10 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series  PIN DESCRIPTION The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Pin no. LQFP-100 BGA-112 LQFP-120 1 B1 1 2 C1 2 3 C2 3 4 B3 4 5 D1 5 6 D2 6 DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin name VCC P50 INT00_0 AIN0_2 SIN3_1 RTO10_0 (PPG10_0) MDATA0 P51 INT01_0 BIN0_2 SOT3_1 (SDA3_1) RTO11_0 (PPG10_0) MDATA1 P52 INT02_0 ZIN0_2 SCK3_1 (SCL3_1) RTO12_0 (PPG12_0) MDATA2 P53 SIN6_0 TIOA1_2 INT07_2 RTO13_0 (PPG12_0) MDATA3 P54 SOT6_0 (SDA6_0) TIOB1_2 RTO14_0 (PPG14_0) MDATA4 I/O circuit type Pin state type - E H E H E H E H E I 11 r2.0 MB9B100 Series Pin no. LQFP-100 BGA-112 LQFP-120 I/O circuit type Pin state type E I E H 9 MCSX7 P57 SOT1_0 (SDA1_0) E I 10 MNALE P58 SCK1_0 (SCL1_0) E I E H E I E I E H Pin name P55 SCK6_0 (SCL6_0) 7 D3 7 ADTG_1 RTO15_0 (PPG14_0) MDATA5 P56 SIN1_0 (120pin only) 8 D5 8 INT08_2 DTTI1X_0 - - - - - - - - - - 11 12 13 MNCLE P59 SIN7_0 INT09_2 MNWEX P5A SOT7_0 (SDA7_0) MNREX P5B SCK7_0 (SCL7_0) P30 AIN0_0 9 E1 14 TIOB0_1 INT03_2 MDATA6 12 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series Pin no. LQFP-100 BGA-112 LQFP-120 10 E2 15 11 E3 16 12 E4 17 13 F1 18 14 F2 19 15 F3 20 16 G1 21 17 G2 22 DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin name P31 BIN0_0 TIOB1_1 SCK6_1 (SCL6_1) INT04_2 MDATA7 P32 ZIN0_0 TIOB2_1 SOT6_1 (SDA6_1) INT05_2 MDQM0 P33 INT04_0 TIOB3_1 SIN6_1 ADTG_6 MDQM1 P34 FRCK0_0 TIOB4_1 MAD24 P35 IC03_0 TIOB5_1 INT08_1 MAD23 P36 IC02_0 SIN5_2 INT09_1 MCSX3 P37 IC01_0 SOT5_2 (SDA5_2) INT10_1 MCSX2 P38 IC00_0 SCK5_2 (SCL5_2) INT11_1 I/O circuit type Pin state type E H E H E H E I E H E H E H E H 13 r2.0 MB9B100 Series Pin no. LQFP-100 BGA-112 LQFP-120 18 F4 23 19 G3 24 - B2 - 20 H1 25 21 H2 26 22 G4 27 23 H3 28 24 J2 29 25 26 L1 J1 30 31 27 J4 32 28 L5 33 14 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin name P39 DTTI0X_0 ADTG_2 P3A RTO00_0 (PPG00_0) TIOA0_1 VSS P3B RTO01_0 (PPG00_0) TIOA1_1 P3C RTO02_0 (PPG02_0) TIOA2_1 P3D RTO03_0 (PPG02_0) TIOA3_1 P3E RTO04_0 (PPG04_0) TIOA4_1 P3F RTO05_0 (PPG04_0) TIOA5_1 VSS VCC P40 TIOA0_0 RTO10_1 (PPG10_1) INT12_1 MAD22 P41 TIOA1_0 RTO11_1 (PPG10_1) INT13_1 MAD21 I/O circuit type Pin state type E I G I - G I G I G I G I G I - G H G H DS706-00007-1v0-E r2.0 MB9B100 Series Pin no. LQFP-100 BGA-112 LQFP-120 29 K5 34 30 J5 35 - K2 J3 H4 - 31 H5 36 Pin name P42 TIOA2_0 RTO12_1 (PPG12_1) MAD20 P43 TIOA3_0 RTO13_1 (PPG12_1) ADTG_7 MAD19 VSS VSS VSS P44 TIOA4_0 RTO14_1 (PPG14_1) I/O circuit type Pin state type G I G I - G I G I MAD18 P45 TIOA5_0 32 L6 37 33 34 35 L2 L4 K1 38 39 40 36 L3 41 37 K3 42 38 K4 43 39 K6 44 RTO15_1 (PPG14_1) MAD17 C VSS VCC P46 X0A P47 X1A INITX P48 DTTI1X_1 INT14_1 D M D N B C E H E I SIN3_2 MAD16 P49 TIOB0_0 IC10_1 40 J6 45 AIN0_1 SOT3_2 (SDA3_2) MAD15 DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 15 r2.0 MB9B100 Series Pin no. LQFP-100 BGA-112 LQFP-120 Pin name I/O circuit type Pin state type E I E I E I E I E I E I E H E H P4A TIOB1_0 IC11_1 41 L7 46 BIN0_1 SCK3_2 (SCL3_2) 42 K7 47 43 H6 48 MAD14 P4B TIOB2_0 IC12_1 ZIN0_1 MAD13 P4C TIOB3_0 IC13_1 SCK7_1 (SCL7_1) AIN1_2 MAD12 P4D TIOB4_0 FRCK1_1 44 J7 49 SOT7_1 (SDA7_1) BIN1_2 MAD11 P4E TIOB5_0 45 K8 50 INT06_2 SIN7_1 ZIN1_2 - - 51 - - 52 MAD10 P70 TIOA4_2 P71 INT13_2 TIOB4_2 - - 53 P72 SIN2_0 INT14_2 16 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series Pin no. LQFP-100 BGA-112 LQFP-120 - - 54 Pin name P73 SOT2_0 (SDA2_0) I/O circuit type Pin state type E H INT15_2 - - 55 P74 SCK2_0 (SCL2_0) E I 46 K9 56 MD1 C D 47 L8 57 MD0 C D 48 L9 58 X0 A A 49 L10 59 X1 A B 50 L11 60 VSS - 51 K11 61 VCC - 52 J11 62 P10 AN00 F K F L P11 53 J10 63 AN01 SIN1_1 INT02_1 - K10 - VSS - - J9 - VSS - 54 55 56 J8 H10 H9 64 65 66 P12 AN02 SOT1_1 (SDA1_1) MAD09 P13 AN03 SCK1_1 (SCL1_1) MAD08 P14 AN04 SIN0_1 F K F K F L F K INT03_1 57 H7 67 MCSX1 P15 AN05 SOT0_1 (SDA0_1) MCSX0 DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 17 r2.0 MB9B100 Series Pin no. LQFP-100 BGA-112 LQFP-120 58 59 G10 G9 68 69 Pin name P16 AN06 SCK0_1 (SCL0_1) MOEX P17 AN07 SIN2_2 I/O circuit type Pin state type F K F L INT04_1 60 61 62 H11 F11 G11 70 71 72 63 G8 73 64 F10 74 65 F9 75 - H8 - 66 E11 76 67 E10 77 18 FUJITSU SEMICONDUCTOR CONFIDENTIAL MWEX AVCC AVRH AVSS P18 AN08 SOT2_2 (SDA2_2) MDATA8 P19 AN09 SCK2_2 (SCL2_2) MDATA9 P1A AN10 SIN4_1 INT05_1 IC00_1 MDATA10 VSS P1B AN11 SOT4_1 (SDA4_1) IC01_1 MDATA11 P1C AN12 SCK4_1 (SCL4_1) IC02_1 MDATA12 - F K F K F L - F K F K DS706-00007-1v0-E r2.0 MB9B100 Series Pin no. LQFP-100 BGA-112 LQFP-120 68 F8 78 69 E9 79 70 D11 80 - - 81 - - 82 - - 83 - - 84 - B10 C9 - - - 85 Pin name P1D AN13 CTS4_1 IC03_1 MDATA13 P1E AN14 RTS4_1 DTTI0X_1 MDATA14 P1F AN15 ADTG_5 FRCK0_1 MDATA15 P28 ADTG_4 RTO05_1 (PPG04_1) MCSX6 P27 INT02_2 RTO04_1 (PPG04_1) MCSX5 P26 SCK2_1 (SCL2_1) RTO03_1 (PPG02_1) MCSX4 P25 SOT2_1 (SDA2_1) RTO02_1 (PPG02_1) VSS VSS P24 SIN2_1 INT01_2 I/O circuit type Pin state type F K F K F K E I E H E I E I - E H RTO01_1 (PPG00_1) DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 19 r2.0 MB9B100 Series Pin no. LQFP-100 BGA-112 LQFP-120 71 D10 86 Pin name P23 SCK0_0 (SCL0_0) TIOA7_1 I/O circuit type Pin state type E I E I E H E H RTO00_1 (PPG00_1) 72 E8 87 P22 SOT0_0 (SDA0_0) TIOB7_1 ZIN1_1 73 C11 88 P21 SIN0_0 INT06_1 BIN1_1 74 C10 89 75 76 A11 A10 90 91 77 A9 92 78 B9 93 79 B11 94 80 A8 95 81 B8 96 82 C8 97 - D8 - 20 FUJITSU SEMICONDUCTOR CONFIDENTIAL P20 INT05_0 CROUT AIN1_1 VSS VCC P00 TRSTX P01 TCK SWCLK P02 TDI P03 TMS SWDIO P04 TDO SWO P05 TRACED0 TIOA5_2 SIN4_2 INT00_1 VSS E E E E E E E E E E E F - DS706-00007-1v0-E r2.0 MB9B100 Series Pin no. LQFP-100 BGA-112 LQFP-120 83 D9 98 Pin name P06 TRACED1 TIOB5_2 SOT4_2 (SDA4_2) I/O circuit type Pin state type E F E G E G E G E H E I E I E I INT01_1 84 A7 99 P07 TRACED2 ADTG_0 SCK4_2 (SCL4_2) 85 B7 100 P08 TRACED3 TIOA0_2 CTS4_2 86 C7 101 P09 TRACECLK TIOB0_2 RTS4_2 P0A SIN4_0 87 D7 102 INT00_2 FRCK1_0 88 A6 103 MAD07 P0B SOT4_0 (SDA4_0) TIOB6_1 IC10_0 89 B6 104 90 C6 105 DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL MAD06 P0C SCK4_0 (SCL4_0) TIOA6_1 IC11_0 MAD05 P0D RTS4_0 TIOA3_2 IC12_0 MAD04 21 r2.0 MB9B100 Series Pin no. LQFP-100 BGA-112 LQFP-120 91 A5 106 - D4 C3 - 92 B5 107 - - 108 - - 109 - - 110 - - 111 - - 112 93 D6 113 94 C5 114 95 B4 115 22 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin name P0E CTS4_0 TIOB3_2 IC13_0 MAD03 VSS VSS P0F NMIX MAD02 P68 SCK3_0 (SCL3_0) TIOB7_2 INT12_2 P67 SOT3_0 (SDA3_0) TIOA7_2 P66 SIN3_0 ADTG_8 INT11_2 P65 TIOB7_0 SCK5_1 (SCL5_1) P64 TIOA7_0 SOT5_1 (SDA5_1) INT10_2 P63 INT03_0 SIN5_1 MAD01 P62 SCK5_0 (SCL5_0) ADTG_3 MAD00 P61 SOT5_0 (SDA5_0) TIOB2_2 I/O circuit type Pin state type E I E J E H E I E H E I E H E H E I E I DS706-00007-1v0-E r2.0 MB9B100 Series Pin no. LQFP-100 BGA-112 LQFP-120 96 C4 116 97 98 99 100 A4 A3 A2 A1 117 118 119 120 DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin name P60 SIN5_0 TIOA2_2 INT15_1 VCC P80 P81 VSS I/O circuit type Pin state type E H H H O O - 23 r2.0 MB9B100 Series  SIGNAL DESCRIPTION The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name ADC ADTG_0 ADTG_1 ADTG_2 ADTG_3 ADTG_4 ADTG_5 ADTG_6 ADTG_7 ADTG_8 AN00 AN01 AN02 AN03 AN04 AN05 AN06 AN07 AN08 AN09 AN10 AN11 AN12 AN13 AN14 AN15 TIOA0_0 TIOA0_1 TIOA0_2 TIOB0_0 TIOB0_1 TIOB0_2 TIOA1_0 TIOA1_1 TIOA1_2 TIOB1_0 TIOB1_1 TIOB1_2 TIOA2_0 TIOA2_1 TIOA2_2 TIOB2_0 TIOB2_1 TIOB2_2 Base Timer 0 Base Timer 1 Base Timer 2 Function A/D converter external trigger input pin. A/D converter analog input pin. ANxx describes ADC ch.xx. Base timer ch.0 TIOA pin. Base timer ch.0 TIOB pin. Base timer ch.1 TIOA pin. Base timer ch.1 TIOB pin. Base timer ch.2 TIOA pin. Base timer ch.2 TIOB pin. 24 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No. LQFP- BGA- LQFP100 112 120 84 7 18 94 70 12 30 52 53 54 55 56 57 58 59 63 64 65 66 67 68 69 70 27 19 85 40 9 86 28 20 5 41 10 6 29 21 96 42 11 95 A7 D3 F4 C5 D11 E4 J5 J11 J10 J8 H10 H9 H7 G10 G9 G8 F10 F9 E11 E10 F8 E9 D11 J4 G3 B7 J6 E1 C7 L5 H1 D1 L7 E2 D2 K5 H2 C4 K7 E3 B4 99 7 23 114 81 80 17 35 110 62 63 64 65 66 67 68 69 73 74 75 76 77 78 79 80 32 24 100 45 14 101 33 25 5 46 15 6 34 26 116 47 16 115 DS706-00007-1v0-E r2.0 MB9B100 Series The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name Base Timer 3 TIOA3_0 TIOA3_1 TIOA3_2 TIOB3_0 TIOB3_1 TIOB3_2 TIOA4_0 TIOA4_1 TIOA4_2 TIOB4_0 TIOB4_1 TIOB4_2 TIOA5_0 TIOA5_1 TIOA5_2 TIOB5_0 TIOB5_1 TIOB5_2 TIOA6_1 TIOB6_1 TIOA7_0 TIOA7_1 TIOA7_2 TIOB7_0 TIOB7_1 TIOB7_2 Base Timer 4 Base Timer 5 Base Timer 6 Base Timer 7 Function Base timer ch.3 TIOA pin. Base timer ch.3 TIOB pin. Base timer ch.4 TIOA pin. Base timer ch.4 TIOB pin. Base timer ch.5 TIOA pin. Base timer ch.5 TIOB pin. Base timer ch.6 TIOA pin. Base timer ch.6 TIOB pin. Base timer ch.7 TIOA pin. Base timer ch.7 TIOB pin. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No. LQFP- BGA- LQFP100 112 120 30 22 90 43 12 91 31 23 44 13 32 24 82 45 14 83 89 88 71 72 - J5 G4 C6 H6 E4 A5 H5 H3 J7 F1 L6 J2 C8 K8 F2 D9 B6 A6 D10 E8 - 35 27 105 48 17 106 36 28 51 49 18 52 37 29 97 50 19 98 104 103 112 86 109 111 87 108 25 r2.0 MB9B100 Series The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name Debugger SWCLK SWDIO SWO TCK TDI TDO TMS TRACECLK TRACED0 TRACED1 TRACED2 TRACED3 TRSTX MAD00 MAD01 MAD02 MAD03 MAD04 MAD05 MAD06 MAD07 MAD08 MAD09 MAD10 MAD11 MAD12 MAD13 MAD14 MAD15 MAD16 MAD17 MAD18 MAD19 MAD20 MAD21 MAD22 MAD23 MAD24 MCSX0 MCSX1 MCSX2 MCSX3 MCSX4 MCSX5 MCSX6 MCSX7 External Bus Function Serial wire debug interface clock input. Serial wire debug interface data input / output. Serial wire viewer output. J-TAG test clock input. J-TAG test data input. J-TAG debug data output. J-TAG test mode state input/output. Trace CLK output of ETM. Trace data output of ETM. J-TAG test reset Input. External bus interface address bus. External bus interface chip select output pin. 26 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No. LQFP- BGA- LQFP100 112 120 78 80 81 78 79 81 80 86 82 83 84 85 77 94 93 92 91 90 89 88 87 55 54 45 44 43 42 41 40 39 32 31 30 29 28 27 14 13 57 56 16 15 8 B9 A8 B8 B9 B11 B8 A8 C7 C8 D9 A7 B7 A9 C5 D6 B5 A5 C6 B6 A6 D7 H10 J8 K8 J7 H6 K7 L7 J6 K6 L6 H5 J5 K5 L5 J4 F2 F1 H7 H9 G1 F3 D5 93 95 96 93 94 96 95 101 97 98 99 100 92 114 113 107 106 105 104 103 102 65 64 50 49 48 47 46 45 44 37 36 35 34 33 32 19 18 67 66 21 20 83 82 81 8 DS706-00007-1v0-E r2.0 MB9B100 Series The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name External Bus MDATA0 MDATA1 MDATA2 MDATA3 MDATA4 MDATA5 MDATA6 MDATA7 MDATA8 MDATA9 MDATA10 MDATA11 MDATA12 MDATA13 MDATA14 MDATA15 MDQM0 MDQM1 MNALE MNCLE MNREX MNWEX MOEX MWEX Function External bus interface data bus. External bus interface byte mask signal output. External bus interface ALE signal to control NAND Flash output pin. External bus interface CLE signal to control NAND Flash output pin. External bus interface read enable signal to control NAND Flash. External bus interface write enable signal to control NAND Flash. External bus interface read enable signal for SRAM. External bus interface write enable signal for SRAM. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No. LQFP- BGA- LQFP100 112 120 2 3 4 5 6 7 9 10 63 64 65 66 67 68 69 70 11 12 C1 C2 B3 D1 D2 D3 E1 E2 G8 F10 F9 E11 E10 F8 E9 D11 E3 E4 2 3 4 5 6 7 14 15 73 74 75 76 77 78 79 80 16 17 - - 9 - - 10 - - 12 - - 11 58 59 G10 G9 68 69 27 r2.0 MB9B100 Series The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name External Interrupt INT00_0 INT00_1 INT00_2 INT01_0 INT01_1 INT01_2 INT02_0 INT02_1 INT02_2 INT03_0 INT03_1 INT03_2 INT04_0 INT04_1 INT04_2 INT05_0 INT05_1 INT05_2 INT06_1 INT06_2 INT07_2 INT08_1 INT08_2 INT09_1 INT09_2 INT10_1 INT10_2 INT11_1 INT11_2 INT12_1 INT12_2 INT13_1 INT13_2 INT14_1 INT14_2 INT15_1 INT15_2 NMIX Function External interrupt request 00 input pin. External interrupt request 01 input pin. External interrupt request 02 input pin. External interrupt request 03 input pin. External interrupt request 04 input pin. External interrupt request 05 input pin. External interrupt request 06 input pin. External interrupt request 07 input pin. External interrupt request 08 input pin. External interrupt request 09 input pin. External interrupt request 10 input pin. External interrupt request 11 input pin. External interrupt request 12 input pin. External interrupt request 13 input pin. External interrupt request 14 input pin. External interrupt request 15 input pin. Non-Maskable Interrupt input. 28 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No. LQFP- BGA- LQFP100 112 120 2 82 87 3 83 4 53 93 56 9 12 59 10 74 65 11 73 45 5 14 8 15 16 17 27 28 39 96 92 C1 C8 D7 C2 D9 B3 J10 D6 H9 E1 E4 G9 E2 C10 F9 E3 C11 K8 D1 F2 D5 F3 G1 G2 J4 L5 K6 C4 B5 2 97 102 3 98 85 4 63 82 113 66 14 17 69 15 89 75 16 88 50 5 19 8 20 11 21 112 22 110 32 108 33 52 44 53 116 54 107 DS706-00007-1v0-E r2.0 MB9B100 Series The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name GPIO P00 P01 P02 P03 P04 P05 P06 P07 P08 P09 P0A P0B P0C P0D P0E P0F P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P1A P1B P1C P1D P1E P1F P20 P21 P22 P23 P24 P25 P26 P27 P28 Function General-purpose I/O port 0. General-purpose I/O port 1. General-purpose I/O port 2. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No. LQFP- BGA- LQFP100 112 120 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 52 53 54 55 56 57 58 59 63 64 65 66 67 68 69 70 74 73 72 71 - A9 B9 B11 A8 B8 C8 D9 A7 B7 C7 D7 A6 B6 C6 A5 B5 J11 J10 J8 H10 H9 H7 G10 G9 G8 F10 F9 E11 E10 F8 E9 D11 C10 C11 E8 D10 - 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 62 63 64 65 66 67 68 69 73 74 75 76 77 78 79 80 89 88 87 86 85 84 83 82 81 29 r2.0 MB9B100 Series The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name GPIO P30 P31 P32 P33 P34 P35 P36 P37 P38 P39 P3A P3B P3C P3D P3E P3F P40 P41 P42 P43 P44 P45 P46 P47 P48 P49 P4A P4B P4C P4D P4E P50 P51 P52 P53 P54 P55 P56 P57 P58 P59 P5A P5B Function General-purpose I/O port 3. General-purpose I/O port 4. General-purpose I/O port 5. 30 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No. LQFP- BGA- LQFP100 112 120 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 27 28 29 30 31 32 36 37 39 40 41 42 43 44 45 2 3 4 5 6 7 8 - E1 E2 E3 E4 F1 F2 F3 G1 G2 F4 G3 H1 H2 G4 H3 J2 J4 L5 K5 J5 H5 L6 L3 K3 K6 J6 L7 K7 H6 J7 K8 C1 C2 B3 D1 D2 D3 D5 - 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 32 33 34 35 36 37 41 42 44 45 46 47 48 49 50 2 3 4 5 6 7 8 9 10 11 12 13 DS706-00007-1v0-E r2.0 MB9B100 Series The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name GPIO P60 P61 P62 P63 P64 P65 P66 P67 P68 P70 P71 P72 P73 P74 P80 P81 SIN0_0 SIN0_1 Multi Function Serial 0 SOT0_0 (SDA0_0) SOT0_1 (SDA0_1) SCK0_0 (SCL0_0) Multi Function Serial 1 SCK0_1 (SCL0_1) SIN1_0 SIN1_1 SOT1_0 (SDA1_0) SOT1_1 (SDA1_1) SCK1_0 (SCL1_0) SCK1_1 (SCL1_1) Function General-purpose I/O port 6. General-purpose I/O port 7. General-purpose I/O port 8. Multifunction serial interface ch.0 input pin. Multifunction serial interface ch.0 output pin. This pin operates as SOT0 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA0 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.0 clock I/O pin. This pin operates as SCK0 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL0 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.1 input pin. Multifunction serial interface ch.1 output pin. This pin operates as SOT1 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA1 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.1 clock I/O pin. This pin operates as SCK1 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL1 when it is used in an I2C (operation mode 4). DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No. LQFP- BGA- LQFP100 112 120 96 95 94 93 98 99 73 56 C4 B4 C5 D6 A3 A2 C11 H9 116 115 114 113 112 111 110 109 108 51 52 53 54 55 118 119 88 66 72 E8 87 57 H7 67 71 D10 86 58 G10 68 53 J10 8 63 - - 9 54 J8 64 - - 10 55 H10 65 31 r2.0 MB9B100 Series The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name Multi Function Serial 2 SIN2_0 SIN2_1 SIN2_2 SOT2_0 (SDA2_0) SOT2_1 (SDA2_1) SOT2_2 (SDA2_2) SCK2_0 (SCL2_0) SCK2_1 (SCL2_1) SCK2_2 (SCL2_2) SIN3_0 SIN3_1 SIN3_2 SOT3_0 (SDA3_0) SOT3_1 (SDA3_1) SOT3_2 (SDA3_2) SCK3_0 (SCL3_0) SCK3_1 (SCL3_1) SCK3_2 (SCL3_2) Multi Function Serial 3 Function Multifunction serial interface ch.2 input pin. Multifunction serial interface ch.2 output pin. This pin operates as SOT2 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA2 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.2 clock I/O pin. This pin operates as SCK2 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL2 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.3 input pin. Multifunction serial interface ch.3 output pin. This pin operates as SOT3 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA3 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.3 clock I/O pin. This pin operates as SCK3 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL3 when it is used in an I2C (operation mode 4). 32 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No. LQFP- BGA- LQFP100 112 120 59 G9 53 85 69 - - 54 - - 84 63 G8 73 - - 55 - - 83 64 F10 74 2 39 C1 K6 110 2 44 - - 109 3 C2 3 40 J6 45 - - 108 4 B3 4 41 L7 46 DS706-00007-1v0-E r2.0 MB9B100 Series The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name Multi Function Serial 4 SIN4_0 SIN4_1 SIN4_2 SOT4_0 (SDA4_0) SOT4_1 (SDA4_1) SOT4_2 (SDA4_2) SCK4_0 (SCL4_0) SCK4_1 (SCL4_1) SCK4_2 (SCL4_2) RTS4_0 RTS4_1 RTS4_2 CTS4_0 CTS4_1 CTS4_2 SIN5_0 SIN5_1 SIN5_2 SOT5_0 (SDA5_0) SOT5_1 (SDA5_1) SOT5_2 (SDA5_2) SCK5_0 (SCL5_0) SCK5_1 (SCL5_1) SCK5_2 (SCL5_2) Multi Function Serial 5 Function Multifunction serial interface ch.4 input pin. Multifunction serial interface ch.4 output pin. This pin operates as SOT4 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA4 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.4 clock I/O pin. This pin operates as SCK4 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL4 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.4 RTS output pin. Multifunction serial interface ch.4 CTS input pin. Multifunction serial interface ch.5 input pin. Multifunction serial interface ch.5 output pin. This pin operates as SOT5 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA5 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.5 clock I/O pin. This pin operates as SCK5 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL5 when it is used in an I2C (operation mode 4). DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No. LQFP- BGA- LQFP100 112 120 87 65 82 D7 F9 C8 102 75 97 88 A6 103 66 E11 76 83 D9 98 89 B6 104 67 E10 77 84 A7 99 90 69 86 91 68 85 96 93 15 C6 E9 C7 A5 F8 B7 C4 D6 F3 105 79 101 106 78 100 116 113 20 95 B4 115 - - 112 16 G1 21 94 C5 114 - - 111 17 G2 22 33 r2.0 MB9B100 Series The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name Multi Function Serial 6 SIN6_0 SIN6_1 SOT6_0 (SDA6_0) SOT6_1 (SDA6_1) SCK6_0 (SCL6_0) SCK6_1 (SCL6_1) SIN7_0 SIN7_1 Multi Function Serial 7 SOT7_0 (SDA7_0) SOT7_1 (SDA7_1) SCK7_0 (SCL7_0) SCK7_1 (SCL7_1) Function Multifunction serial interface ch.6 input pin. Multifunction serial interface ch.6 output pin. This pin operates as SOT6 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA6 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.6 clock I/O pin. This pin operates as SCK6 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL6 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.7 input pin. Multifunction serial interface ch.7 output pin. This pin operates as SOT7 when it is used in a UART/CSIO (operation modes 0 to 2) and as SDA7 when it is used in an I2C (operation mode 4). Multifunction serial interface ch.7 clock I/O pin. This pin operates as SCK7 when it is used in a UART/CSIO (operation modes 0 to 2) and as SCL7 when it is used in an I2C (operation mode 4). 34 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No. LQFP- BGA- LQFP100 112 120 5 12 D1 E4 5 17 6 D2 6 11 E3 16 7 D3 7 10 E2 15 45 K8 11 50 - - 12 44 J7 49 - - 13 43 H6 48 DS706-00007-1v0-E r2.0 MB9B100 Series The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name Multi Function Timer 0 DTTI0X_0 DTTI0X_1 FRCK0_0 FRCK0_1 IC00_0 IC00_1 IC01_0 IC01_1 IC02_0 IC02_1 IC03_0 IC03_1 RTO00_0 (PPG00_0) RTO00_1 (PPG00_1) RTO01_0 (PPG00_0) RTO01_1 (PPG00_1) RTO02_0 (PPG02_0) RTO02_1 (PPG02_1) RTO03_0 (PPG02_0) RTO03_1 (PPG02_1) RTO04_0 (PPG04_0) RTO04_1 (PPG04_1) RTO05_0 (PPG04_0) RTO05_1 (PPG04_1) Function Input signal controlling wave form generator outputs RTO00 to RTO05 of multi-function timer 0. Pin No. LQFP- BGA- LQFP100 112 120 18 69 13 70 17 65 16 66 15 67 14 68 F4 E9 F1 D11 G2 F9 G1 E11 F3 E10 F2 F8 23 79 18 80 22 75 21 76 20 77 19 78 19 G3 24 71 D10 86 Wave form generator output of multi-function timer 0. This pin operates as PPG00 when it is used in PPG 0 output modes. 20 H1 25 - - 85 Wave form generator output of multi-function timer 0. This pin operates as PPG02 when it is used in PPG 0 output modes. 21 H2 26 - - 84 Wave form generator output of multi-function timer 0. This pin operates as PPG02 when it is used in PPG 0 output modes. 22 G4 27 - - 83 Wave form generator output of multi-function timer 0. This pin operates as PPG04 when it is used in PPG 0 output modes. 23 H3 28 - - 82 Wave form generator output of multi-function timer 0. This pin operates as PPG04 when it is used in PPG 0 output modes. 24 J2 29 - - 81 16-bit free-run timer ch.0 external clock input pin. 16-bit input capture ch.0 input pin of multi-function timer 0. ICxx desicribes chanel number. Wave form generator output of multi-function timer 0. This pin operates as PPG00 when it is used in PPG 0 output modes. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 35 r2.0 MB9B100 Series The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name Multi Function Timer 1 DTTI1X_0 DTTI1X_1 FRCK1_0 FRCK1_1 IC10_0 IC10_1 IC11_0 IC11_1 IC12_0 IC12_1 IC13_0 IC13_1 RTO10_0 (PPG10_0) RTO10_1 (PPG10_1) RTO11_0 (PPG10_0) RTO11_1 (PPG10_1) RTO12_0 (PPG12_0) RTO12_1 (PPG12_1) RTO13_0 (PPG12_0) RTO13_1 (PPG12_1) RTO14_0 (PPG14_0) RTO14_1 (PPG14_1) RTO15_0 (PPG14_0) RTO15_1 (PPG14_1) Function Input signal controlling wave form generator outputs RTO10 to RTO15 of multi-function timer 1. 16-bit free-run timer ch.1 external clock input pin. 16-bit input capture ch.0 input pin of multi-function timer 1. ICxx desicribes chanel number. Wave form generator output of multi-function timer 1. This pin operates as PPG10 when it is used in PPG 1 output modes. Wave form generator output of multi-function timer 1. This pin operates as PPG10 when it is used in PPG 1 output modes. Wave form generator output of multi-function timer 1. This pin operates as PPG12 when it is used in PPG 1 output modes. Wave form generator output of multi-function timer 1. This pin operates as PPG12 when it is used in PPG 1 output modes. Wave form generator output of multi-function timer 1. This pin operates as PPG14 when it is used in PPG 1 output modes. Wave form generator output of multi-function timer 1. This pin operates as PPG14 when it is used in PPG 1 output modes. 36 FUJITSU SEMICONDUCTOR CONFIDENTIAL Pin No. LQFP- BGA- LQFP100 112 120 8 39 87 44 88 40 89 41 90 42 91 43 D5 K6 D7 J7 A6 J6 B6 L7 C6 K7 A5 H6 8 44 102 49 103 45 104 46 105 47 106 48 2 C1 2 27 J4 32 3 C2 3 28 L5 33 4 B3 4 29 K5 34 5 D1 5 30 J5 35 6 D2 6 31 H5 36 7 D3 7 32 L6 37 DS706-00007-1v0-E r2.0 MB9B100 Series The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name Quadrature Position/ Revolution Counter 0 AIN0_0 AIN0_1 Function QPRC ch.0 AIN input pin. AIN0_2 BIN0_0 BIN0_1 QPRC ch.0 BIN input pin. BIN0_2 ZIN0_0 ZIN0_1 Quadrature Position/ Revolution Counter 1 QPRC ch.0 ZIN input pin. Pin No. LQFP- BGA- LQFP100 112 120 9 E1 14 40 J6 45 2 C1 2 10 E2 15 41 L7 46 3 11 C2 E3 3 16 42 K7 47 ZIN0_2 4 B3 4 AIN1_1 74 C10 89 43 H6 48 73 44 C11 J7 88 49 72 E8 87 45 K8 50 AIN1_2 BIN1_1 BIN1_2 ZIN1_1 ZIN1_2 QPRC ch.1 AIN input pin. QPRC ch.1 BIN input pin. QPRC ch.1 ZIN input pin. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 37 r2.0 MB9B100 Series The number after the underscore ("_") in pin names such as XXX_1 and XXX_2 indicates the relocated port number. For these pins, there are multiple pins that provide the same function for the same channel. Use the extended port function register (EPFR) to select the pin. Module Pin name Function RESET Mode INITX External Reset Input. A reset is valid when INITX=L. Mode 0 pin. During normal operation, MD0=L must be input. During serial programming to flash memory, MD0=H must be input. Mode 1 pin. Input must always be at the "L" level. Power Pin. Power Pin. Power pin. Power pin. Power pin. Power pin. GND Pin. GND pin. GND pin. GND pin. GND pin. GND pin. GND pin. GND pin. GND pin. GND pin. GND pin. GND pin. GND pin. GND pin. GND pin. GND pin. GND pin. Main clock (oscillation) input pin. Sub clock (oscillation) input pin. Main clock (oscillation) I/O pin. Sub clock (oscillation) I/O pin. Internal CR-osc clock output port. A/D converter analog power pin. A/D converter analog reference voltage input pin. MD0 POWER GND CLOCK ADC POWER ADC GND C-pin MD1 VCC VCC VCC VCC VCC VCC VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS X0 X0A X1 X1A CROUT AVCC AVRH AVSS C Pin No. LQFP- BGA- LQFP100 112 120 38 K4 43 47 L8 57 46 1 26 35 51 76 97 25 34 50 75 100 48 36 49 37 74 60 61 K9 B1 J1 K1 K11 A10 A4 B2 L1 K2 J3 H4 L4 L11 K10 J9 H8 B10 C9 A11 D8 D4 C3 A1 L9 L3 L10 K3 C10 H11 F11 56 1 31 40 61 91 117 30 39 60 90 120 58 41 59 42 89 70 71 A/D converter GND pin. 62 G11 72 Power stabilization capacity pin. 33 L2 38 38 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series  I/O CIRCUIT TYPE Type Circuit Remarks A X1 Clock input ・ Oscillation feedback resistor : Approximately 1MΩ ・ With Standby mode control X0 Standby mode control B ・ CMOS level hysteresis input ・ pull-up resistor : Approximately 50kΩ Pull-up resistor CMOS level hysteresis input C ・ CMOS level input ・ With high-voltage control for flash memory test Control pin Mode input DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 39 r2.0 MB9B100 Series Type Circuit Remarks D ・ It is possible to select the low speed oscillation / GPIO function. P-ch X1A P-ch Digital output N-ch Digital output R Pull-up resistor control Digital input Standby mode control Clock input When the low speed oscillation is selected. ・ Oscillation feedback resistor : Approximately 20MΩ ・ With Standby mode control When the GPIO is selected. ・ CMOS level output. ・ CMOS level hysteresis input ・ With pull-up resistor control ・ With standby mode control ・ pull-up resistor : Approximately 50kΩ ・ IOH=-4mA, IOL=4mA Standby mode control Digital input Standby mode control R X0A P-ch P-ch Digital output N-ch Digital output Pull-up resistor control 40 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series Type Circuit Remarks E P-ch P-ch N-ch Digital output ・ CMOS level output ・ CMOS level hysteresis input ・ With pull-up resistor control ・ With standby mode control ・ pull-up resistor : Approximately 50kΩ ・ IOH=-4mA, IOL=4mA Digital output Pull-up resistor control Digital input Standby mode control F P-ch P-ch Digital output N-ch Digital output ・ CMOS level output ・ CMOS level hysteresis input ・ With input control ・ Analog input ・ With pull-up resistor control ・ With standby mode control ・ pull-up resistor : Approximately 50kΩ ・ IOH=-4mA, IOL=4mA Pull-up resistor control Digital input Standby mode control Analog input Input control DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 41 r2.0 MB9B100 Series Type Circuit Remarks G P-ch P-ch N-ch ・ CMOS level output ・ CMOS level hysteresis input ・ With pull-up resistor control ・ With standby mode control ・ pull-up resistor : Approximately 50kΩ ・ IOH=-12mA, IOL=12mA Digital output Digital output Pull-up resistor control Digital input Standby mode control H ・ CMOS level output ・ CMOS level hysteresis input ・ With standby mode control P-ch N-ch Digital output Digital output Digital input Standby mode control 42 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series  PRECAUTIONS FOR HANDLING THE DEVICES Any semiconductor devices have inherently a certain rate of failure. The possibility of failure is greatly affected by the conditions in which they are used (circuit conditions, environmental conditions, etc.). This page describes precautions that must be observed to minimize the chance of failure and to obtain higher reliability from your FUJITSU semiconductor devices.  Precautions for Product Design This section describes precautions when designing electronic equipment using semiconductor devices. ・ Absolute Maximum Ratings Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. ・ Recommended Operating Conditions The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device’s electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand. ・ Processing and Protection of Pins These precautions must be followed when handling the pins which connect semiconductor devices to power supply and input/output functions. 1. Preventing Over-Voltage and Over-Current Conditions Exposure to voltage or current levels in excess of maximum ratings at any pin is likely to cause deterioration within the device, and in extreme cases leads to permanent damage of the device. Try to prevent such overvoltage or over-current conditions at the design stage. 2. Protection of Output Pins Shorting of output pins to supply pins or other output pins, or connection to large capacitance can cause large current flows. Such conditions if present for extended periods of time can damage the device. Therefore, avoid this type of connection. 3. Handling of Unused Input Pins Unconnected input pins with very high impedance levels can adversely affect stability of operation. Such pins should be connected through an appropriate resistance to a power supply pin or ground pin. ・ Latch-up Semiconductor devices are constructed by the formation of P-type and N-type areas on a substrate. When subjected to abnormally high voltages, internal parasitic PNPN junctions (called thyristor structures) may be formed, causing large current levels in excess of several hundred mA to flow continuously at the power supply pin. This condition is called latch-up. Note: The occurrence of latch-up not only causes loss of reliability in the semiconductor device, but can cause injury or damage from high heat, smoke or flame. To prevent this from happening, do the following: (a) Be sure that voltages applied to pins do not exceed the absolute maximum ratings. This should include attention to abnormal noise, surge levels, etc. (b) Be sure that abnormal current flows do not occur during the power-on sequence. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 43 r2.0 MB9B100 Series ・ Observance of Safety Regulations and Standards Most countries in the world have established standards and regulations regarding safety, protection from electromagnetic interference, etc. Customers are requested to observe applicable regulations and standards in the design of products. ・ Fail-Safe Design Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. ・ Precautions Related to Usage of Devices FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. 44 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series  Precautions for Package Mounting Package mounting may be either lead insertion type or surface mount type. In either case, for heat resistance during soldering, you should only mount under FUJITSU's recommended conditions. For detailed information about mount conditions, contact your FUJITSU sales representative. ・ Lead Insertion Type Mounting of lead insertion type packages onto printed circuit boards may be done by two methods: direct soldering on the board, or mounting by using a socket. Direct mounting onto boards normally involves processes for inserting leads into through-holes on the board and using the flow soldering (wave soldering) method of applying liquid solder. In this case, the soldering process usually causes leads to be subjected to thermal stress in excess of the absolute ratings for storage temperature. Mounting processes should conform to FUJITSU recommended mounting conditions. If socket mounting is used, differences in surface treatment of the socket contacts and IC lead surfaces can lead to contact deterioration after long periods. For this reason it is recommended that the surface treatment of socket contacts and IC leads be verified before mounting. ・ Surface Mount Type Surface mount packaging has longer and thinner leads than lead-insertion packaging, and therefore leads are more easily deformed or bent. The use of packages with higher pin counts and narrower pin pitch results in increased susceptibility to open connections caused by deformed pins, or shorting due to solder bridges. You must use appropriate mounting techniques. FUJITSU recommends the solder reflow method, and has established a ranking of mounting conditions for each product. Users are advised to mount packages in accordance with FUJITSU ranking of recommended conditions. ・ Lead-Free Packaging Note: When ball grid array (BGA) packages with Sn-Ag-Cu balls are mounted using Sn-Pb eutectic soldering, junction strength may be reduced under some conditions of use. ・ Storage of Semiconductor Devices Because plastic chip packages are formed from plastic resins, exposure to natural environmental conditions will cause absorption of moisture. During mounting, the application of heat to a package that has absorbed moisture can cause surfaces to peel, reducing moisture resistance and causing packages to crack. To prevent, do the following: ・ Avoid exposure to rapid temperature changes, which cause moisture to condense inside the product. Store products in locations where temperature changes are slight. ・ Use dry boxes for product storage. Products should be stored below 70% relative humidity, and at temperatures between 5 C and 30 C When you open Dry Package that recommends humidity 40% to 70% relative humidity. ・ When necessary, FUJITSU packages semiconductor devices in highly moisture-resistant aluminum laminate bags, with a silica gel desiccant. Devices should be sealed in their aluminum laminate bags for storage. ・ Avoid storing packages where they are exposed to corrosive gases or high levels of dust. ・ Baking Packages that have absorbed moisture may be de-moisturized by baking (heat drying). Follow the FUJITSU recommended conditions for baking. Condition:+125 C/24 h DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 45 r2.0 MB9B100 Series ・ Static Electricity Because semiconductor devices are particularly susceptible to damage by static electricity, you must take the following precautions: ・ Maintain relative humidity in the working environment between 40% and 70%. Use of an apparatus for ion generation may be needed to remove electricity. ・ Electrically ground all conveyors, solder vessels, soldering irons and peripheral equipment. ・ Eliminate static body electricity by the use of rings or bracelets connected to ground through high resistance (on the level of 1 M). Wearing of conductive clothing and shoes, use of conductive floor mats and other measures to minimize shock loads is recommended. ・ Ground all fixtures and instruments, or protect with anti-static measures. ・ Avoid the use of styrofoam or other highly static-prone materials for storage of completed board assemblies. ・ Precautions for Use Environment Reliability of semiconductor devices depends on ambient temperature and other conditions as described above. For reliable performance, do the following: 1. Humidity Prolonged use in high humidity can lead to leakage in devices as well as printed circuit boards. If high humidity levels are anticipated, consider anti-humidity processing. 2. Discharge of Static Electricity When high-voltage charges exist close to semiconductor devices, discharges can cause abnormal operation. In such cases, use anti-static measures or processing to prevent discharges. 3. Corrosive Gases, Dust, or Oil Exposure to corrosive gases or contact with dust or oil may lead to chemical reactions that will adversely affect the device. If you use devices in such conditions, consider ways to prevent such exposure or to protect the devices. 4. Radiation, Including Cosmic Radiation Most devices are not designed for environments involving exposure to radiation or cosmic radiation. Users should provide shielding as appropriate. 5. Smoke, Flame Note: Plastic molded devices are flammable, and therefore should not be used near combustible substances. If devices begin to smoke or burn, there is danger of the release of toxic gases. Customers considering the use of FUJITSU products in other special environmental conditions should consult with FUJITSU sales representatives. Please check the latest handling precautions at the following URL. http://edevice.fujitsu.com/fj/handling-e.pdf 46 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series  HANDLING DEVICES  Power supply pins In products with multiple VCC and VSS pins, respective pins at the same potential are interconnected within the device in order to prevent malfunctions such as latch-up. However, all of these pins should be connected externally to the power supply or ground lines in order to reduce electromagnetic emission levels, to prevent abnormal operation of strobe signals caused by the rise in the ground level, and to conform to the total output current rating. Moreover, connect the current supply source with the VCC and VSS pins of this device at low impedance. It is also advisable that a ceramic capacitor of approximately 0.1 µF be connected as a bypass capacitor between VCC and VSS near this device.  Crystal oscillator circuit Noise near the X0/X1 and X0A/X1A pins may cause the device to malfunction. Design the printed circuit board so that X0/X1, X0A/X1A pins, the crystal oscillator (or ceramic oscillator), and the bypass capacitor to ground are located as close to the device as possible. It is strongly recommended that the PC board artwork be designed such that the X0/X1 and X0A/X1A pins are surrounded by ground plane as this is expected to produce stable operation.  Using an external clock When using an external clock, the clock signal should be input to the X0,X0A pin only and the X1,X1A pin should be kept open. ・Example of Using an External Clock Device X0(X0A) Open X1(X1A)  Handling when using Multi function serial pin as I2C pin If it is using multi function serial pin as I2C pins, P-ch transistor of digital output is always disable. However, I2C pins need to keep the electrical characteristic like other pins and not to connect to external I2C bus system with power OFF. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 47 r2.0 MB9B100 Series  C Pin As this series includes an internal regulator, always connect a bypass capacitor of approximately 4.7 µF to the C pin for use by the regulator. C Device 4.7μF VSS GND  Mode pins (MD0, MD1) Connect the MD pin (MD0, MD1) directly to VCC or VSS pins. Design the printed circuit board such that the pull-up/down resistance stays low, as well as the distance between the mode pins and VCC pins or VSS pins is as short as possible and the connection impedance is low, when the pins are pulled-up/down such as for switching the pin level and rewriting the Flash memory data. It is because of preventing the device erroneously switching to test mode due to noise.  Notes on power-on Turn power on/off in the following order or at the same time. If not using the A/D converter, connect AVCC =VCC and AVSS = VSS. Turning on : VCC  AVCC  AVRH Turning off : AVRH  AVCC  VCC  Serial Communication There is a possibility to receive wrong data due to the noise or other causes on the serial communication. Therefore, design a printed circuit board so as to avoid noise. Consider the case of receiving wrong data due to noise, perform error detection such as by applying a checksum of data at the end. If an error is detected, restransmit the data.  Differences in features among the products with different memory sizes and between FLASH products and MASK products The electric characteristics including power consumption, ESD, latch-up, noise characteristics, and oscillation characteristics among the products with different memory sizes and between FLASH products and MASK products are different because chip layout and memory structures are different. If you are switching to use a different product of the same series, please make sure to evaluate the electric characteristics. 48 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series  BLOCK DIAGRAM MB9BF104/105/106 TRSTX,TCK TDI,TMS TDO TRACED[3:0], TRACECLK SWJ-DP ETM TPIU ROM Table Code RAM 16/24/32 Kbyte Cortex-M3 Core I @80MHz(Max.) D Multi-layer AHB (Max.80MHz) MPU NVIC Flash I/F Sys AHB-APB Bridge: APB0(Max.40MHz) Dual-Timer WatchDog Timer (Software) Clock Reset Generator INITX WatchDog Timer (Hardware) Security On-Chip SRAM 16/24/32 Kbyte DMAC 8ch CSV X1 X0A X1A Main Osc Sub. Osc AHB-AHB Bridge RST CLK X0 On-Chip Flash 256/384/512 Kbyte PLL CR 4MHz CR 100KHz MAD[24:0] AVCC, AVSS,AVRH AN[15:0] A/D Converter x3 External Bus IF MCSX[7:0], MOEX,MWEX, MNALE, MNCLE MNWEX, MNREX, MDQM[1:0] 12bit A/D Converter 12bit A/D Converter Regurator Ctrl 12bit A/D Converter Base Timer 16-bit 8ch /32-bit 4ch TIOB[7:0] AIN[1:0] QPRC 2ch BIN[1:0] ZIN[1:0] A/D Activation Compare 3ch IC0[3:0] IC1[3:0] 16-bit Input Capture 4ch FRCK[1:0] 16-bit FreeRun Timer 3ch Power On Reset AHB-APB Bridge : APB2 ( Max.40MHz) TIOA[7:0] AHB-APB Bridge : APB1 (Max.40MHz) ADTG[8:0] MDATA[15:0] 16-bit Output Compare 6ch Waveform Generator 3ch DTTI[1:0]X RTO0[5:0] RTO1[5:0] Regurator + LVD VCC,VSS C CRC Accelerator Watch Counter External Interrupt Controller 16-pin + NMI INT[15:0] NMIX MODE-Ctrl GPIO MD[1:0] PIN-Function-Ctrl ・ ・ Px[x:0], SCK[7:0] SIN[7:0] SOT[7:0] Multi Serial IF 8ch (with FIFO ch.4～7) CTS4 RTS4 *HW flow control(ch.4) Multi Function Timer x2 On-Chip Flash Code SRAM On-Chip SRAM Regurator + LVD P0[F:0], P1[F:0], 16-bit PPG 3ch Product device IRQ-Monitor MB9BF104 MB9BF105 MB9BF106 256Kbyte 16Kbyte 16Kbyte 384Kbyte 24Kbyte 24Kbyte 512Kbyte 32Kbyte 32Kbyte DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 49 r2.0 MB9B100 Series  MEMORY MAP  MB9B100 Series Memory Map(1) Peripherals Area 0x41FF_FFFF Reserved 0xFFFF_FFFF 0xE010_0000 0xE000_0000 Reserved 0x4006_4000 Cortex-M3 Private Peripherals 0x4006_3000 0x4006_2000 0x4006_1000 0x4006_0000 Reserved Reserved Reserved DMAC Reserved 0x4005_0000 Reserved External Device Area 0x4004_0000 0x4003_F000 EXT-bus I/F Reserved 0x4003_B000 0x6000_0000 Reserved 0x4400_0000 32Mbyte Bit band alias 0x4200_0000 Peripherals 0x4000_0000 Reserved 0x2400_0000 0x2200_0000 32Mbyte Bit band alias 0x2000_0000 0x1FF8_0000 Please refer to the next page for the memory size details. On Chip SRAM Code SRAM Reserved 0x0010_2000 0x0010_0000 0x4003_2000 0x4003_1000 0x4003_0000 0x4002_F000 0x4002_E000 Security/CR Trim Watch Counter CRC MFS Reserved Reserved LVD Reserved GPIO Reserved Int-Req. Read EXTI Reserved CR Trim Reserved 0x4002_8000 Reserved 0x2008_0000 0x4003_A000 0x4003_9000 0x4003_8000 0x4003_7000 0x4003_6000 0x4003_5000 0x4003_4000 0x4003_3000 0x4002_7000 0x4002_6000 0x4002_5000 0x4002_4000 A/DC QPRC Base Timer PPG Reserved 0x4002_2000 0x4002_1000 0x4002_0000 MFT unit1 MFT unit0 Reserved FLASH 0x4001_6000 0x4001_5000 Dual Timer Reserved 0x0000_0000 0x4001_3000 0x4001_2000 0x4001_1000 0x4001_0000 SW WDT HW WDT Clock/Reset Reserved 0x4000_1000 0x4000_0000 50 FUJITSU SEMICONDUCTOR CONFIDENTIAL FLASH I/F DS706-00007-1v0-E r2.0 MB9B100 Series  MB9B100 Series Memory Map(2) 0x2008_0000 0x2008_0000 Reserved 0x2008_0000 Reserved Reserved 0x2000_8000 On Chip SRAM 32kbyte 0x2000_6000 On Chip SRAM 24kbyte 0x2000_0000 0x2000_0000 0x2000_0000 Code SRAM 32Kbyte 0x2000_4000 Code SRAM 24kbyte 0x1FFF_C000 On Chip SRAM 16kbyte Code SRAM 16kbyte 0x1FFF_A000 0x1FFF_8000 0x0010_2000 0x0010_1000 0x0010_0000 CR triming Security Reserved Reserved Reserved 0x0010_2000 0x0010_1000 0x0010_0000 CR triming Security 0x0010_2000 0x0010_1000 0x0010_0000 CR triming Security Reserved Reserved Reserved 0x0008_0000 0x0006_0000 FLASH 512Kbyte 0x0004_0000 FLASH 384Kbyte FLASH 256Kbyte 0x0000_0000 0x0000_0000 MB9BF106N/R DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 0x0000_0000 MB9BF105N/R MB9BF104N/R 51 r2.0 MB9B100 Series  Peripheral Address Map Start address End address Bus 0x4000_0000 0x4000_0FFF 0x4000_1000 0x4000_FFFF 0x4001_0000 0x4001_0FFF Clock/Reset Control 0x4001_1000 0x4001_1FFF Hardware Watchdog timer 0x4001_2000 0x4001_2FFF 0x4001_3000 0x4001_4FFF 0x4001_5000 0x4001_5FFF Dual-Timer 0x4001_6000 0x4001_FFFF Reserved 0x4002_0000 0x4002_0FFF Multi-function timer unit0 0x4002_1000 0x4002_1FFF Multi-function timer unit1 0x4002_2000 0x4002_3FFF Reserved AHB APB0 Peripherals Flash I/F register Reserved Software Watchdog timer Reserved 0x4002_4000 0x4002_4FFF PPG 0x4002_5000 0x4002_5FFF Base Timer 0x4002_6000 0x4002_6FFF 0x4002_7000 0x4002_7FFF A/D Converter 0x4002_8000 0x4002_DFFF Reserved 0x4002_E000 0x4002_EFFF Internal CR trimming 0x4002_F000 0x4002_FFFF Reserved 0x4003_0000 0x4003_0FFF External Interrupt Controller 0x4003_1000 0x4003_1FFF Interrupt Request Batch-Read Function 0x4003_2000 0x4003_2FFF Reserved 0x4003_3000 0x4003_3FFF GPIO 0x4003_4000 0x4003_4FFF Reserved 0x4003_5000 0x4003_5FFF Low Voltage Detector 0x4003_6000 0x4003_6FFF 0x4003_7000 0x4003_7FFF Reserved 0x4003_8000 0x4003_8FFF Multi-function serial Interface 0x4003_9000 0x4003_9FFF CRC 0x4003_A000 0x4003_AFFF Watch Counter 0x4003_B000 0x4003_EFFF Reserved 0x4003_F000 0x4003_FFFF External Memory interface 0x4004_0000 0x4004_FFFF Reserved 0x4005_0000 0x4005_FFFF Reserved 0x4006_0000 0x4006_0FFF APB1 APB2 Quadrature Position/Revolution Counter Reserved DMAC register AHB 0x4006_1000 0x4006_1FFF 0x4006_2000 0x4006_2FFF Reserved 0x4006_3000 0x4006_3FFF Reserved 0x4006_4000 0x41FF_FFFF Reserved 52 FUJITSU SEMICONDUCTOR CONFIDENTIAL Reserved DS706-00007-1v0-E r2.0 MB9B100 Series  PIN STATUS IN EACH CPU STATE The terms used for pin status have the following meanings. ・ INITX=0 This is the period when the INITX pin is the "L" level. ・ INITX=1 This is the period when the INITX pin is the "H" level. ・ SPL=0 This is the status that standby pin level setting bit (SPL) in standby mode control register (STB_CTL) is set to "0". ・ SPL=1 This is the status that standby pin level setting bit (SPL) in standby mode control register (STB_CTL) is set to "1". ・ Input enabled Indicates that the input function can be used. ・ Internal input fixed at "0" This is the status that the input function cannot be used. Internal input is fixed at "L". ・ Hi-Z Indicates that the output drive transistor is disabled and the pin is put in the Hi-Z state. ・ Setting disabled Indicates that the setting is disabled. ・ Maintain previous state Maintains the state that was immediately prior to entering the current mode. If a built-in peripheral function is operating, the output follows the peripheral function. If the pin is being used as a port, that output is maintained. ・ Analog input is enabled Indicates that the analog input is enabled. ・ Trace output Indicates that the trace function can be used. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 53 r2.0 MB9B100 Series  LIST OF PIN STATUS Pin status type A B C D E F Device Run mode or Power-on reset Timer mode or sleep mode INITX input internal reset sleep mode or low voltage state state state state detection state Function group Power supply Power supply Power supply stable Power supply stable unstable stable INITX=0 INITX=1 INITX=1 INITX=1 SPL=0 SPL=1 Input enabled Input Input Input Input Input Main crystal enabled enabled enabled enabled enabled oscillator input pin Maintain Maintain Maintain H output/ H output/ H output/ Main crystal previous previous previous Internal Internal Internal input oscillator output state/ state/ state/ input fixed input fixed fixed at "0"/ pin H output at H output at H output at at "0" at "0" or Input oscillation oscillation oscillation enabled stop (*1)/ stop (*1)/ stop (*1)/ Internal Internal Internal input fixed input fixed input fixed at "0" at "0" at "0" Pull-up/ Pull-up/ Pull-up/ Pull-up/ INITX input pin Pull-up/ Input Pull-up/ Input Input Input Input enabled Input enabled enabled enabled enabled enabled Mode input pin Input enabled Input Input Input Input Input enabled enabled enabled enabled enabled Maintain Pull-up/ Maintain JTAG Hi-Z Pull-up/ Maintain previous Input previous selected Input previous state enabled state enabled state Output GPIO Setting Setting Setting Hi-Z/ selected disabled disabled disabled Internal input fixed at "0" Maintain Maintain Setting Setting Setting Trace selected Trace output previous previous disabled disabled disabled Maintain External interrupt state state previous enabled selected state Hi-Z/ Hi-Z/ Hi-Z Hi-Z/ GPIO Internal Input Input selected, or other input fixed enabled enabled than above at "0" resource selected 54 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series Pin status type G H I J Device Run mode or Power-on reset Timer mode or sleep mode INITX input internal reset sleep mode or low voltage state state state state detection state Function group Power supply Power supply Power supply stable Power supply stable unstable stable INITX=0 INITX=1 INITX=1 INITX=1 SPL=0 SPL=1 Maintain Maintain Trace selected Setting Setting Setting Trace output previous previous disabled disabled disabled state state Hi-Z/ Hi-Z/ Hi-Z Hi-Z/ GPIO selected, Internal Input Input or other than input fixed enabled enabled above resource at "0" selected Maintain Maintain External interrupt Setting Setting Setting Maintain previous previous enabled selected disabled disabled disabled previous state state state Hi-Z/ Hi-Z/ Hi-Z Hi-Z/ GPIO selected, Internal Input Input or other than input fixed enabled enabled above resource at "0" selected Output Maintain Maintain Hi-Z/ GPIO selected, Hi-Z Hi-Z/ Hi-Z/ previous previous Input resource selected Input Internal state state enabled enabled input fixed at "0" Maintain Maintain NMIX selected Setting Setting Setting Maintain previous previous disabled disabled disabled previous state state state Hi-Z/ Hi-Z/ Hi-Z Hi-Z/ GPIO selected, Internal Input Input or other than input fixed enabled enabled above resource at "0" selected DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 55 r2.0 MB9B100 Series Pin status type K L M Device Run mode or Power-on reset Timer mode or sleep mode INITX input internal reset sleep mode or low voltage state state state state detection state Function group Power supply Power supply Power supply stable Power supply stable unstable stable INITX=0 INITX=1 INITX=1 INITX=1 SPL=0 SPL=1 Hi-Z/ Hi-Z/ Hi-Z/ Hi-Z/ Analog input Hi-Z Hi-Z/ Internal Internal Internal Internal selected Internal input fixed input fixed input fixed input fixed input fixed at "0"/ at "0"/ at "0"/ at "0"/ at "0"/ Analog Analog Analog Analog Analog input input input input input enabled enabled enabled enabled enabled Hi-Z/ Maintain Setting Setting Setting Maintain GPIO selected, Internal previous disabled disabled disabled previous or other than input fixed state state above resource at "0" selected Maintain Maintain External interrupt Setting Setting Setting Maintain previous previous enabled selected disabled disabled disabled previous state state state Hi-Z/ Hi-Z/ Hi-Z/ Hi-Z/ Analog input Hi-Z Hi-Z/ Internal Internal Internal Internal selected Internal input fixed input fixed input fixed input fixed input fixed at "0"/ at "0"/ at "0"/ at "0"/ at "0"/ Analog Analog Analog Analog Analog input input input input input enabled enabled enabled enabled enabled Hi-Z/ Maintain Setting Setting Setting Maintain GPIO selected, Internal previous disabled disabled disabled previous or other than input fixed state state above resource at "0" selected Output Maintain GPIO selected Setting Setting Setting Maintain Hi-Z/ previous disabled disabled disabled previous Internal state state input fixed at "0" Input Input Input Input Sub crystal Input Input enabled enabled enabled enabled oscillator input enabled enabled pin 56 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series Pin status type N O Device Run mode Power-on reset Timer mode or sleep mode INITX input internal reset or sleep or low voltage state state state mode state detection state Power Function group Power supply supply Power supply stable Power supply stable unstable stable INITX=0 INITX=1 INITX=1 INITX=1 SPL=0 SPL=1 Maintain Output GPIO selected Setting Setting Setting Maintain previous state Hi-Z/ disabled disabled disabled previous Internal input state fixed at "0" Maintain Maintain Maintain Hi-Z/ Hi-Z/ Hi-Z/ Sub crystal previous previous previous Internal Internal Internal input oscillator output state/ Hi-Z at state/ Hi-Z at state input fixed input fixed fixed at "0" pin oscillation oscillation at "0" at "0" stop (*2)/ stop (*2)/ Internal input Internal input fixed at "0" fixed at "0" Maintain Output Maintain Hi-Z/ GPIO selected Hi-Z Hi-Z/ previous state Hi-Z/ Internal previous Input Input input fixed at state enabled enabled "0" *1 : Oscillation is stopped at sub timer, sub CR timer mode, and stop mode. *2 : Oscillation is stopped at stop mode. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 57 r2.0 MB9B100 Series  ELECTRICAL CHARACTERISTICS This section describes the electrical characteristics of MB9B100 series.  Absolute Maximum Ratings / Recommended Operating Conditions The following tables show the absolute maximum ratings and recommended operating conditions. 1. Absolute Maximum Ratings (Vss = AVss = 0.0V) Parameter Symbol Rating Min Max Vcc AVcc AVRH Vss - 0.5 Vss - 0.5 Vss - 0.5 Input voltage VI Vss - 0.5 Analog pin input voltage VIA Vss - 0.5 Output voltage VO Vss - 0.5 "L" level maximum output current *3 IOL - IOLAV - ∑IOL ∑IOLAV - IOH - IOHAV - Vss + 6.5 Vss + 6.5 Vss + 6.5 Vcc + 0.5 ( 6.5V) AVcc + 0.5 ( 6.5V) Vcc + 0.5 ( 6.5V) 10 20 4 12 100 50 - 10 - 20 -4 - 12 - 100 - 50 800 + 150 Power supply voltage*1 Analog power supply voltage *2 Analog reference voltage *2 "L" level average output current *4 "L" level total maximum output current "L" level total average output current *5 "H" level maximum output current *3 "H" level average output current *4 Unit Remarks V V V V V V mA mA mA mA mA mA mA mA mA mA mA mA mW C 4mA type 12mA type 4mA type 12mA type 4mA type 12mA type 4mA type 12mA type "H" level total maximum output current ∑IOH "H" level total average output current *5 ∑IOHAV Power consumption PD Storage temperature TSTG - 55 *1 : Vcc must not drop below Vss - 0.5V. *2 : Be careful not to exceed Vcc + 0.5 V, for example, when the power is turned on. *3 : The maximum output current is the peak value for a single pin. *4 : The average output is the average current for a single pin over a period of 100 ms. *5 : The total average output current is the average current for all pins over a period of 100 ms. Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. 58 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.1 MB9B100 Series 2. Recommended Operating Conditions (Vss = AVss = 0.0V) Parameter Power supply voltage Analog power supply voltage Analog reference voltage Operating Temperature FPT-120P-M21 FPT-100P-M20 FPT-100P-M23 BGA-112P-M04 Symbol Conditions Vcc AVcc AVRH When mounted on four-layer PCB When mounted on double-sided single-layer PCB Ta Value Min Max Unit Remarks 2.7 2.7 AVss 5.5 5.5 AVcc V V V - 40 + 85 C - 40 + 85 C Icc  100mA - 40 + 70 C Icc > 100mA AVcc = Vcc The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 59 r2.1 MB9B100 Series  DC Characteristics The following tables show the DC characteristics. 1. Current rating (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V Ta = - 40C to + 85C) Pin Parameter Symbol name Conditions Min Value Typ Max Unit 96 118 mA - 76 94 mA - 66 82 mA - 52 65 mA Normal operation (built-in high-speed CR) - 6.0 9.2 mA Normal operation (sub oscillation) - 0.2 2.24 mA Normal operation (built-in low-speed CR) - 0.3 2.36 mA - 43 54 mA - 3.5 6.2 mA Peripheral : 4MHz *1, *2 - 0.15 2.18 mA Peripheral : 32kHz *1 - 0.22 2.27 mA Peripheral : 100kHz *1 Icc Vcc Iccs CPU : 80MHz, Peripheral : 40MHz, FLASH 2Wait FRWTR.RWT = 10 FSYNDN.SD = 000 *1 CPU : 60MHz, Peripheral : 30MHz, FLASH 0Wait FRWTR.RWT = 00 FSYNDN.SD = 000 *1 CPU : 80MHz, Peripheral : 40MHz, FLASH 5Wait FRWTR.RWT = 10 FSYNDN.SD = 011 *1 CPU : 60MHz, Peripheral : 30MHz, FLASH 3Wait FRWTR.RWT = 00 FSYNDN.SD = 011 *1 CPU/ Peripheral : 4MHz *1, *2 FLASH 0Wait FRWTR.RWT = 00 FSYNDN.SD = 000 CPU/ Peripheral : 32kHz FLASH 0Wait FRWTR.RWT = 00 FSYNDN.SD = 000 *1 CPU/ Peripheral : 100kHz FLASH 0Wait FRWTR.RWT = 00 FSYNDN.SD = 000 *1 Peripheral : 40MHz *1 - Normal operation (PLL) Power supply current Remarks SLEEP operation (PLL) SLEEP operation (built-in high-speed CR) SLEEP operation (sub oscillation) SLEEP operation (built in low-speed CR) 60 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.1 MB9B100 Series (Continued) Parameter Symbol Pin name ICCH Conditions Value Typ Max Unit - 50 200 μA - - 2 mA - 110 300 μA - - 2.2 mA - 2 10 μA STOP mode Power supply current ICCT Min Vcc Timer mode (sub oscillation) Low voltage detection At operation circuit (LVD) ICCLVD power supply current *1:When all ports are fixed. *2: When setting it to 4MHz by trimming. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Remarks Ta = + 25C, When LVD is off *1 Ta = + 85C, When LVD is off *1 Ta = + 25C, When LVD is off *1 Ta = + 85C, When LVD is off *1 for occurrence of interrupt 61 r2.1 MB9B100 Series 2. Pin Characteristics (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V Ta = - 40C to + 85C) Parameter Symbol Pin name "H" level input voltage (hysteresis input) "L" level input voltage (hysteresis input) "H" level output voltage "L" level output voltage Input leak current Pull-up resistance value Input capacitance Conditions Value Min Typ Max Unit VIHS CMOS hysteresis input pin, MD0,1 - Vcc × 0.8 - Vcc + 0.3 V VILS CMOS hysteresis input pin, MD0,1 - Vss - 0.3 - Vcc × 0.2 V Vcc - 0.5 - Vcc V Vcc - 0.5 - Vcc V Vcc - 0.4 - Vcc V Vss - 0.4 V Vss - 0.4 V Vss - 0.4 V - -5 - 5 μA Vcc  4.5 V 25 50 100 Vcc  4.5 V 30 80 200 - - 5 15 VOH VOL Vcc  4.5 V IOH = - 4mA 4mA type Vcc < 4.5 V IOH = - 2mA Vcc  4.5 V IOH = - 12mA 12mA type Vcc  4.5 V IOH = - 8mA Vcc  4.5 V IOH = - 25.3mA P80, P81 Vcc < 4.5 V IOH = - 13.4mA Vcc  4.5 V IOL = 4mA 4mA type Vcc < 4.5 V IOL = 2mA Vcc  4.5 V IOL = 12mA 12mA type Vcc  4.5 V IOL = 8mA Vcc  4.5 V IOL = 19.7mA P80, P81 Vcc < 4.5 V IOL = 11.9mA IIL - RPU Pull-up pin CIN Other than Vcc, Vss, AVcc, AVss, AVRH 62 FUJITSU SEMICONDUCTOR CONFIDENTIAL Remarks kΩ pF DS706-00007-1v0-E r2.1 MB9B100 Series  AC Characteristics The following tables show the AC characteristics. (1) Main Clock Input Characteristics (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Symbol Input frequency FCH Input clock cycle tCYLH Input clock pulse width Input clock rise time and fall time Internal operating clock frequency Internal operating clock cycle time Value Min Max Pin Conditions name X0 X1 - Unit Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V PWH/tCYLH PWL/tCYLH 4 4 4 4 20.83 50 48 20 48 20 250 250 MHz 45 55 % - - 5 ns MHz ns tCF tCR FCC - - - 80 MHz FCP0 - - - 40 MHz FCP1 - - - 40 MHz FCP2 - - - 40 MHz tCYCC - - 12.5 - ns tCYCP0 - - 25 - ns tCYCP1 - - 25 - ns tCYCP2 - - 25 - ns Remarks When crystal oscillator is connected When using external clock When using external clock When using external clock When using external clock CPU/AHB bus clock Peripheral bus clock 0 (APB0) Peripheral bus clock 1 (APB1) Peripheral bus clock 1 (APB2) CPU/AHB bus clock Peripheral bus clock 0 (APB0) Peripheral bus clock 1 (APB1) Peripheral bus clock 1 (APB2) tCYLH X0 0.8×Vcc 0.8×Vcc 0.8×Vcc 0.2×Vcc PW H P WL tCF DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 0.2×Vcc tCR 63 r2.1 MB9B100 Series (2) Sub Clock Input Characteristics (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Input frequency Symbol Min Value Typ Max - - 32.768 - kHz - 32 - 100 kHz Pin Conditions name Unit FCL X0A X1A Input clock cycle tCYLL - 10 - 31.25 μs Input clock pulse width - PWH/tCYLL PWL/tCYLL 45 - 55 % Remarks When crystal oscillator is connected When using external clock When using external clock When using external clock tCYLL X0A 0.8×Vcc 0.8×Vcc 0.8×Vcc 0.2×Vcc PW H 0.2×Vcc P WL (3) Built-in CR Oscillation Characteristics ・ Built-in high-speed CR (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Symbol Conditions Ta = + 25C Clock frequency FCRH Ta = 0C to + 70C Ta = - 40C to + 85C Ta = - 40C to + 85C Min Value Typ Max 3.92 4 4.08 3.84 4 4.16 3.8 4 4.2 3 4 5 Unit Remarks When trimming MHz When trimming When not trimming ・ Built-in low-speed CR (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Clock frequency Symbol Conditions FCRL - 64 FUJITSU SEMICONDUCTOR CONFIDENTIAL Min Value Typ Max 50 100 150 Unit Remarks kHz DS706-00007-1v0-E r2.1 MB9B100 Series (4) Operating Conditions of PLL (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Symbol Value Unit Min Typ Max Remarks PLL oscillation stabilization wait time μs tLOCK 100 (LOCK UP time)* PLL input clock frequency fPLLI 4 30 MHz PLL multiple rate 4 30 multiple PLL macro oscillation clock frequency fPLLO 60 120 MHz *: Time from when the PLL starts operating until the oscillation stabilizes. (5) Reset Input Characteristics (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Symbol Reset input time tINITX Value Pin Conditions name Min Max INITX 500 - - Unit Remarks ns (6) Power-on Reset Timing (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Symbol Power supply rising time Power supply shut down time Tr Toff Pin name Vcc Tr Value Unit Min Max 0 - ms 1 - ms Remarks Toff 2.7V Vcc 0.2V 0.2V DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 0.2V 65 r2.1 MB9B100 Series (7) External Bus Timing ・ Asynchronous SRAM Mode (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Symbol Pin name MOEX MOEX tOEW Min pulse width MOEX MOEX   tOEL - AV MAD24 to 00 Address delay time MOEX MOEX   tOEH - AX MAD24 to 00 Address delay time MOEX MOEX   tOEL - CSL MCSX MCSX  delay time MOEX MOEX   tOEH - CSH MCSX MCSX  delay time Data set up MOEX tDS - OE MDATA15 to 0 MOEX  time MOEX MOEX   tDH - OE MDATA15 to 0 Data hold time MCSX MCSX   tCSL - WEL MWEX MWEX  delay time MCSX MWEX   tWEH - CSH MWEX MCSX  delay time MWEX Address  tAV - WEL MAD24 to 00 MWEX  delay time MWEX MWEX   tWEH - AX MAD24 to 00 Address delay time MWEX MWEX   t MDQM  delay time WEL - DQML MDQM0 to 1 MWEX MWEX   tWEH - DQMH MDQM0 to 1 MDQM  delay time MWEX MWEX tWEW Min pulse width MWEX MWEX   tWEL - DV MDATA15 to 0 Data delay time MWEX MWEX   tWEH - DX MDATA15 to 0 Data delay time Note: When the external load capacitance = 50pF. 66 FUJITSU SEMICONDUCTOR CONFIDENTIAL Conditions Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Value Unit Remarks Min Max THCLK×1 - 3 - 0 0 0 0 10 20 10 20 0 10 ns 0 10 ns 20 38 - ns 0 - ns THCLK×1 - 5 THCLK×1 - 10 THCLK×1 - 5 THCLK×1 - 10 THCLK×1 - 5 THCLK×1 - 15 THCLK×1 - 5 THCLK×1 - 15 0 0 0 0 5 10 5 10 THCLK×1 - 3 - -5 -15 THCLK×1 - 5 THCLK×1 - 15 5 15 - ns ns ns ns ns ns ns ns ns ns ns ns DS706-00007-1v0-E r2.1 MB9B100 Series (Continued) S RAM read tCY C H C LK V OH V OH tO E H-CS H tOE L- CSL M C SX 0 t o 7 VO H VO L tOE L- AV tO EH- AX VO H VO L MAD 24 to 00 V OH V OL tO EW MO E X V OH VO L tDS- O E V IH M D ATA 15 to 0 tDH-O E V IH R ea d V IL V IL S RA M w rite t CY C H C LK t W E H-CS H tCS L-W EL MC S X 0 to 7 VO H VO L tAV-W EL M AD 24 to 00 tW E H-A X V OH V OL VO H VO L t W E H-DQ M H tW EL- DQ M L M D QM 0 to 1 VO H V OL t W EW MW EX V OL V OH tW EH- DX t W EL -DV M D ATA 15 to 0 V OH V OL DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL W rite V OH V OL 67 r2.1 MB9B100 Series ・ NAND FLASH mode (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Symbol Pin name MNREX MNREX tNREW Min pulse width Data set up MNREX tDS - NRE MDATA15 to 0  MNREX  tiime MNREX MNREX   tDH - NRE MDATA15 to 0 Data hold time MNALE MNALE   t MNWEX MNWEX delay time ALEH - NWEL MNALE MNWEX   tNWEH - ALEL MNWEX MNALE delay time MNCLE MNCLE   t MNWEX MNWEX delay time CLEH - NWEL MNCLE MNWEX   tNWEH - CLEL MNWEX MNCLE delay time MNWEX MNWEX tNWEW Min pulse width MNWEX MNWEX   tNWEL - DV MDATA15 to 0 Data delay time MNWEX MNWEX   tNWEH - DX MDATA15 to 0 Data delay time Note: when the external load capacitance = 50pF. 68 FUJITSU SEMICONDUCTOR CONFIDENTIAL Conditions Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Value Min Max THCLK×1 - 3 - 20 38 0 0 THCLK×1 - 5 THCLK×1 - 15 THCLK×1 - 5 THCLK×1 - 15 THCLK×1 - 5 THCLK×1 - 15 THCLK×1 - 5 THCLK×1 - 15 - THCLK×1 - 3 - -5 -15 THCLK×1 - 5 THCLK×1 - 15 +5 +15 - Unit Remarks ns ns ns ns ns ns ns ns ns ns DS706-00007-1v0-E r2.1 MB9B100 Series (Continued) N AN D F LAS H read tCY C H C LK V OH V OH t NREW MN R EX V OH VO L tDS- NRE V IH MD ATA15 to 0 tDH-NR E V IH Rea d V IL V IL N AN D F LAS H wr ite t CYC H C LK t NW EH - AL EL t A LE H-NW EL V OH V OL MN A LE t NW EH- CLEL t CLE H -NW E L V OH V OL M N C LE t NW EW MN W E X V OH V OL t NW E H-DX t NW EL -D V MD ATA 15 to 0 V OH V OL DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL W rite V OH V OL 69 r2.1 MB9B100 Series (8) Base Timer Input Timing ・ Timer input timing (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Input pulse width Symbol Pin name Conditions tTIWH tTIWL TIOAn/TIOBn (when using as ECK,TIN) - Min Max 2tCYCP - Unit Remarks ns tTIWL tTIWH ECK Value VIHS VIHS VILS TIN VILS ・ Trigger input timing (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Input pulse width Symbol Pin name Conditions tTRGH tTRGL TIOAn/TIOBn (when using as TGIN) - VIHS Min Max 2tCYCP - Unit Remarks ns tTRGL tTRGH TGIN Value VIHS VILS 70 FUJITSU SEMICONDUCTOR CONFIDENTIAL VILS DS706-00007-1v0-E r2.1 MB9B100 Series (9) UART Timing ・ Synchronous serial (SPI = 0, SCINV = 0) (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Serial clock cycle time SCK   SOT delay time SIN  SCK  setup time SCK   SIN hold time Symbol Pin Conditions name tSCYC SCKx SCKx tSLOVI SOTx Internal shift clock SCKx tIVSHI operation SINx SCKx tSHIXI SINx Serial clock "L" pulse width tSLSH SCKx Serial clock "H" pulse width tSHSL SCKx Vcc  4.5V Min Max tSLOVE DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Unit 4tcycp - 4tcycp - ns -30 +30 - 20 + 20 ns 50 - 30 - ns 0 - 0 - ns - ns - ns - 30 ns 10 - ns 20 - ns - 5 5 ns ns 2tcycp 10 tcycp + 10 - SCKx 50 External shift SOTx clock SCKx operation tIVSHE 10 SIN  SCK  setup time SINx SCKx tSHIXE 20 SCK   SIN hold time SINx SCK fall time tF SCKx 5 SCK rise time tR SCKx 5 Notes: ・The above characteristics apply to CLK synchronous mode. ・tCYCP indicates the peripheral clock cycle time. ・These characteristics only guarantee the same relocate port number. For example, the combination of SCLKx_0 and SOTx_1 is not guaranteed. ・When the external load capacitance = 50pF. SCK   SOT delay time Vcc  4.5V Min Max 2tcycp 10 tcycp + 10 71 r2.1 MB9B100 Series t SCY C VO H S CK VOL t SL OV I V OH SOT V OL tIV SH I tSH IXI VI H V IH VI L V IL S IN M S b it = 0 tS LSH tSH SL V IH V IH SCK VIL VI L t R t F t SLOVE V OH SOT V OL tIV SH E tSH IXE VI H V IH VI L V IL S IN M S b it = 1 72 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.1 MB9B100 Series ・ Synchronous serial(SPI = 0, SCINV = 1) (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Serial clock cycle time SCK   SOT delay time SIN  SCK  setup time SCK   SIN hold time Symbol Pin Conditions name tSCYC SCKx SCKx tSHOVI SOTx Internal shift clock SCKx tIVSLI operation SINx SCKx tSLIXI SINx Serial clock "L" pulse width tSLSH SCKx Serial clock "H" pulse width tSHSL SCKx Vcc  4.5V Min Max tSHOVE DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Unit 4tcycp - 4tcycp - ns -30 +30 - 20 + 20 ns 50 - 30 - ns 0 - 0 - ns - ns - ns - 30 ns 10 - ns 20 - ns - 5 5 ns ns 2tcycp - 10 tcycp + 10 - SCKx 50 External shift SOTx clock SCKx operation tIVSLE 10 SIN  SCK  setup time SINx SCKx tSLIXE 20 SCK   SIN hold time SINx SCK fall time tF SCKx 5 SCK rise time tR SCKx 5 Notes: ・The above characteristics apply to CLK synchronous mode. ・tCYCP indicates the peripheral clock cycle time. ・These characteristics only guarantee the same relocate port number. For example, the combination of SCLKx_0 and SOTx_1 is not guaranteed. ・When the external load capacitance = 50pF. SCK   SOT delay time Vcc  4.5V Min Max 2tcycp 10 tcycp + 10 73 r2.1 MB9B100 Series tSC YC VO H S C K VOL t SHO VI VOH S O T VOL t IVS LI tS LIX I VIH VIH VIL VIL S IN M S b it = 0 tS HSL tSL SH VIH S C K VI H V IL V IL VI L tF tR tSH OV E V OH S O T tIV SL E t SLI XE S IN M S b it= 1 74 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.1 MB9B100 Series ・ Synchronous serial(SPI = 1, SCINV = 0) (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Serial clock cycle time SCK   SOT delay time SIN  SCK  setup time SCK   SIN hold time SOT  SCK  delay time Symbol Pin Conditions name tSCYC SCKx SCKx tSHOVI SOTx SCKx Internal shift tIVSLI clock SINx operation SCKx tSLIXI SINx SCKx tSOVLI SOTx Serial clock "L" pulse width tSLSH SCKx Serial clock "H" pulse width tSHSL SCKx Vcc  4.5V Min Max tSHOVE DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL Unit 4tcycp - 4tcycp - ns -30 +30 - 20 + 20 ns 50 - 30 - ns 0 - 0 - ns - ns - ns - ns - 30 ns 10 - ns 20 - ns - 5 5 ns ns 2tcycp - 30 2tcycp - 10 tcycp + 10 - SCKx 50 External shift SOTx clock SCKx operation tIVSLE 10 SIN  SCK  setup time SINx SCKx tSLIXE 20 SCK   SIN hold time SINx SCK fall time tF SCKx 5 SCK rise time tR SCKx 5 Notes: ・The above characteristics apply to CLK synchronous mode. ・tCYCP indicates the peripheral clock cycle time. ・These characteristics only guarantees the same relocate port number. For example, the combination of SCLKx_0 and SOTx_1 is not guaranteed. ・When the external load capacitance = 50pF. SCK   SOT delay time Vcc  4.5V Min Max 2tcycp 30 2tcycp 10 tcycp + 10 75 r2.1 MB9B100 Series tSCYC VOH SCK VOL VOL tSHOVI tSOVLI SOT VOH VOH VOL VOL tIVSLI SIN tSLIXI VIH VIH VIL VIL MS bit=0 tSLSH tSHSL VIH VIH SCK VIL VIL ｔF tR *2 SOT VIL tSHOVE VOH V OH VO L VOL tIVSLE SIN VIH tSLIXE VIH VIH VIL VIL *2 : Changes when writing to TDR register MS bit=1 76 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.1 MB9B100 Series ・ Synchronous serial(SPI = 1, SCINV = 1) (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Symbol Pin Conditions name Vcc  4.5V Min Max Vcc  4.5V Min Max Unit Serial clock cycle time tSCYC SCKx 4tcycp - 4tcycp - ns SCK   SOT delay time tSLOVI SCKx SOTx -30 +30 - 20 + 20 ns 50 - 30 - ns 0 - 0 - ns - ns - ns - ns - 30 ns 10 - ns 20 - ns - 5 5 ns ns SIN  SCK  setup time SCK  SIN hold time SOT  SCK  delay time SCKx Internal shift clock SINx operation SCKx tSHIXI SINx SCKx tSOVHI SOTx tIVSHI Serial clock "L" pulse width tSLSH SCKx Serial clock "H" pulse width tSHSL SCKx 2tcycp - 30 2tcycp - 10 tcycp + 10 - SCKx 50 External shift SOTx clock SCKx operation tIVSHE 10 SIN  SCK  setup time SINx SCKx tSHIXE 20 SCK   SIN hold time SINx SCK fall time tF SCKx 5 SCK rise time tR SCKx 5 Notes: ・The above characteristics apply to CLK synchronous mode. ・tCYCP indicates the peripheral clock cycle time. ・These characteristics only guarantee the same relocate port number. For example, the combination of SCLKx_0 and SOTx_1 is not guaranteed. ・When the external load capacitance = 50pF. SCK   SOT delay time tSLOVE DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 2tcycp 30 2tcycp 10 tcycp + 10 77 r2.1 MB9B100 Series tSCYC VOH SCK VOH VOL tSOV HI I t SLOVI VOH VOL SOT VOH VOL tSHIXI tIVSHI VIH VIL SIN VIH VIL MS bit=0 tR tS HSL VIH SCK tF tSLSH VIH VIL I t SLOVE VOH VOL SOT VOH VOL tI VSHE tSHIXE VIH VIL SIN VIH VIL MS bit =1 ・ External clock(EXT = 1) : asynchronous only (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Serial clock "L" pulse width Serial clock "H" pulse width SCK fall time SCK rise time Symbol Conditions tSLSH tSHSL tF tR CL = 50pF tR SCK VIL tSHSL VIH 78 FUJITSU SEMICONDUCTOR CONFIDENTIAL Min Max tcycp + 10 tcycp + 10 - 5 5 ns ns ns ns tF tSLSH VIH VIL Unit Remarks VIL VIH DS706-00007-1v0-E r2.1 MB9B100 Series (10) External input timing (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Symbol Pin name Conditions Value Unit Min Max ADTG FRCKx Input pulse width tINH tINL - 2tCYCP *1 - ns - 2tCYCP *1 - ns ICxx DTTIxX 2tCYCP + 100 *1 INT00 to INT15, NMIX 500 *2 *1 : tCYCP indicates the peripheral clock cycle time except stop when in stop mode. *2 : When in stop mode, in timer mode. tINH VILS ns ns Remarks A/D converter trigger input Free-run timer input clock Input capture Wave form generator External interrupt NMI tINL VILS DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL VIHS VIHS 79 r2.1 MB9B100 Series (11) Quadrature Position/Revolution Counter timing (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Symbol Value Conditions Min AIN pin "H" width tAHL AIN pin "L" width tALL BIN pin "H" width tBHL BIN pin "L" width tBLL BIN rise time from PC_Mode2 or tAUBU AIN pin "H" level PC_Mode3 AIN fall time from PC_Mode2 or tBUAD BIN pin "H" level PC_Mode3 BIN fall time from PC_Mode2 or tADBD AIN pin "L" level PC_Mode3 AIN rise time from PC_Mode2 or tBDAU BIN pin "L" level PC_Mode3 AIN rise time from PC_Mode2 or 2tCYCP * tBUAU BIN pin "H" level PC_Mode3 BIN fall time from PC_Mode2 or tAUBD AIN pin "H" level PC_Mode3 AIN fall time from PC_Mode2 or tBDAD BIN pin "L" level PC_Mode3 BIN rise time from PC_Mode2 or tADBU AIN pin "L" level PC_Mode3 ZIN pin "H" width tZHL QCR:CGSC="0" ZIN pin "L" width tZLL QCR:CGSC="0" AIN/BIN rise and fall time tZABE QCR:CGSC="1" from determined ZIN level Determined ZIN level from tABEZ QCR:CGSC="1" AIN/BIN rise and fall time * : tCYCP indicates the peripheral clock cycle time except stop when in stop mode. Max - Unit ns tALL tAHL AIN tAUBU tBUAD tADBD tBDAU BIN tBHL tBLL 80 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.1 MB9B100 Series tBLL tBHL BIN tBUAU tAUBD tBDAD tADBU AIN tAHL tALL tZHL ZIN tZLL ZIN tABEZ tZABE AIN/BIN DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 81 r2.1 MB9B100 Series (12) I2C timing (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Symbol SCL clock frequency (Repeated) START condition hold time SDA   SCL  SCLclock "L" width SCLclock "H" width (Repeated) START setup time SCL   SDA  Data hold time SCL   SDA   Data setup time SDA    SCL  STOP condition setup time SCL   SDA  Bus free time between "STOP condition" and "START condition" fSCL 0 100 0 400 kHz tHDSTA 4.0 - 0.6 - μs tLOW tHIGH 4.7 4.0 - 1.3 0.6 - μs μs 4.7 - 0.6 - μs 0 3.45 (*2) 0 0.9 (*3) μs tSUDAT 250 - 100 - ns tSUSTO 4.0 - 0.6 - μs tBUF 4.7 - 1.3 - μs tSUSTA tHDDAT Conditions Typical High-speed mode mode Unit Remarks Min Max Min Max CL = 50pF, R = (Vp/IOL) (*1) 2 tCYCP 2 tCYCP ns (*4) (*4) *1 : R and C represent the pull-up resistance and load capacitance of the SCL and SDA lines, respectively. Vp indicates the power supply voltage of the pull-up resistance and IOL indicates VOL guaranteed current. *2 : The maximum tHDDAT must satisfy that it doesn't extend at least "L" period (tLOW) of device's SCL signal. *3 : A high-speed mode I2C bus device can be used on a standard mode I2C bus system as long as the device satisfies the requirement of "tSUDAT ≥ 250 ns". *4 : tCYCP is the peripheral clock cycle time. To use I2C, set the peripheral bus clock at 8 MHz or more. Noise filter tSP - SDA tSUDAT tSUSTA tBUF tLOW SCL tHDSTA tHDDAT tHIGH 82 FUJITSU SEMICONDUCTOR CONFIDENTIAL tHDSTA tSP tSUSTO DS706-00007-1v0-E r2.1 MB9B100 Series (13) ETM timing (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Value Unit Min Max Symbol Pin name Conditions tETMH TRACECLK TRACED3 - 0 Vcc  4.5V 2 9 Vcc  4.5V 2 15 Data hold Remarks ns Note: When the external load capacitance = 50pF. tC YC HC LK VOH tE T M H T R A C E D 3 -0 V OH VOL TRA C E CLK tE T M H VOH VOH VOL VOL DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 83 r2.1 MB9B100 Series (14) JTAG timing (Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40C to + 85C) Parameter Symbol Pin name TCK TMS,TDI TCK TMS,TDI hold time tJTAGH TMS,TDI TCK TDO delay time tJTAGD TDO Note: When the external load capacitance = 50pF. TMS,TDI setup time TCK tJTAGS Value Min Max Conditions Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Vcc  4.5V Unit 15 - ns 15 - ns - 25 45 ns Remarks VOH VOL t JTA G S T M S /TM I t JTA G H VO H VO H VO L VOL tJ T A G D TDO VOH VOL 84 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.1 MB9B100 Series  12bit A/D Converter This chapter shows the electrical characteristics for the A/D converter. 1. Electrical characteristics for the A/D converter. (Vcc = AVcc = 2.7V to 5.5V, Vss = AVss = 0V Ta = - 40C to + 85C) Parameter Resolution Linearity error Differential linearity error Zero transition voltage Full transition voltage Conversion time Sampling time Compare clock cycle *3 State transition time to operation permission Power supply current (analog + digital) Reference power supply current (between AVRH to AVSS) Pin name Min - - 4.5 - 12 + 4.5 bit LSB - -2.5 - + 2.5 LSB - 20 - + 20 mV - 20 - + 20 mV 1.0 (*1) *2 *2 55.5 166.7 - - μs - 10000 ns Tstt 2.5 - - μs AVCC - 2.3 0.1 3.6 2 - 2.2 3.0 - 0.03 0.6 μA When XSTB is 0 (3unit) 14.5 pF AN0 to AN15 AN0 to AN15 Ts Tcck Value Typ Max AVRH Analog input capacity Cin - - Analog input resistance Rin - - Interchannel disparity Analog port input current 0.93 2.04 4 Unit ns Remarks AVRH = 2.7V to 5.5V AVcc  4.5V AVcc  4.5V AVcc < 4.5V AVcc  4.5V AVcc < 4.5V mA A/D 1unit operation μA When XSTB is 0 (3unit) A/D 1unit operation mA AVRH=5.5V kΩ AVcc  4.5V AVcc < 4.5V LSB AN0 5 μA to AN15 AN0 Analog input voltage AVSS AVRH V to AN15 Reference voltage AVRH AVSS AVCC V *1: Conversion time is the value of sampling time(Ts) + compare time(Tc). The condition of the minimum conversion time is when HCLK=72MHz, the value of sampling time: 0.222μs, the value of sampling time: 778ns (AVcc  4.5V) Ensure that it satisfies the value of sampling time(Ts) and compare clock cycle (Tcck). For setting of sampling time and compare clock cycle, see chapter "12-bit A/D Converter" in "Peripheral Manual". *2: A necessary sampling time changes by external impedance. Ensure that it set the sampling time to satisfy (Equation 1) *3: Compare time (Tc) is the value of (Equation 2) DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 85 r2.1 MB9B100 Series (Continued) Analog signal source Rext AN0 to AN15 Analog input pin comparator Rin Cin (Equation 1) Ts  ( Rin + Rext ) × Cin × 9 Ts : Sampling time Rin : input resistance of A/D = 0.93kΩ 4.5  AVCC  5.5 input resistance of A/D = 2.04kΩ 2.7  AVCC < 4.5 Cin : input capacity of A/D = 14.5pF 2.7  AVCC  5.5 Rext : Output impedance of external circuit (Equation 2) Tc = Tcck × 14 Tc : Compare time Tcck : Comrare clock cycle 86 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.1 MB9B100 Series ・Definition of 12-bit A/D Converter Terms ・ Resolution ・ Linearity error : Analog variation that is recognized by an A/D converter. : Deviation of the line between the zero-transition point (0b0000000000000b000000000001) and the full-scale transition point (0b1111111111100b111111111111) from the actual conversion characteristics. ・ Differential linearity error : Deviation from the ideal value of the input voltage that is required to change the output code by 1 LSB. Linearity error 0xFFF Actual conversion characteristics 0xFFE Actual conversion characteristics 0x(N+1) {1 LSB(N-1) + VOT} VFST VNT 0x004 (Actuallymeasured value) (Actually-measured value) 0x003 Digital output Digital output 0xFFD Differential linearity error Actual conversion characteristics Ideal characteristics 0x002 0x001 0xN Ideal characteristics VNT Actual conversion characteristics AVRH AVss AVRH Analog input Linearity error of digital output N = Analog input VNT - {1LSB × (N - 1) + VOT} 1LSB Differential linearity error of digital output N = : : : : V(N + 1) T - VNT 1LSB [LSB] - 1 [LSB] VFST - VOT 4094 1LSB = N VOT VFST VNT (Actually-measured value) (Actually-measured value) 0x(N-2) VOT (Actually-measured value) AVss V(N+1)T 0x(N-1) A/D converter digital output value. Voltage at which the digital output changes from 0x000 to 0x001. Voltage at which the digital output changes from 0xFFE to 0xFFF. Voltage at which the digital output changes from 0x(N − 1) to 0xN. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 87 r2.1 MB9B100 Series  Low voltage detection characteristics 1. Low voltage detection reset (Ta = - 40C to + 85C) Parameter Detected voltage Released voltage Symbol Conditions VDL VDH - Min Value Typ Max 2.20 2.30 2.40 2.50 Unit 2.60 2.70 V V Remarks When voltage drops When voltage rises 2. Interrupt of low voltage detection (Ta = - 40C to + 85C) Parameter Symbol Conditions Detected voltage Released voltage Detected voltage Released voltage Detected voltage Released voltage Detected voltage Released voltage Detected voltage Released voltage Detected voltage Released voltage Detected voltage Released voltage Detected voltage Released voltage VDL VDH VDL VDH VDL VDH VDL VDH VDL VDH VDL VDH VDL VDH VDL VDH LVD stabilization wait time TLVDW SVHI = 0000 SVHI = 0001 SVHI = 0010 SVHI = 0011 SVHI = 0100 SVHI = 0111 SVHI = 1000 SVHI = 1001 Min Value Typ Max Unit 2.58 2.67 2.76 2.85 2.94 3.04 3.31 3.40 3.40 3.50 3.68 3.77 3.77 3.86 3.86 3.96 2.8 2.9 3.0 3.1 3.2 3.3 3.6 3.7 3.7 3.8 4.0 4.1 4.1 4.2 4.2 4.3 3.02 3.13 3.24 3.34 3.45 3.56 3.88 3.99 3.99 4.10 4.32 4.42 4.42 4.53 4.53 4.64 V V V V V V V V V V V V V V V V - - 2040 × tcycp * μs - Remarks When voltage drops When voltage rises When voltage drops When voltage rises When voltage drops When voltage rises When voltage drops When voltage rises When voltage drops When voltage rises When voltage drops When voltage rises When voltage drops When voltage rises When voltage drops When voltage rises * : tCYCP indicates the peripheral clock cycle time. Voltage Vcc VDH VDL dV dt Time 88 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.1 MB9B100 Series  Flash Memory Write/Erase Characteristics (Vcc = 2.7V to 5.5V, Ta = - 40C to + 85C) Parameter Sector erase time Large Sector Small Sector Min - Value Typ Max 0.6 3.1 0.3 1.6 Value s Half word (16 bit) write time - 25 400 μs Chip erase time - 7.2 37.6 s Remarks Excludes write time prior to internal erase Not including system-level overhead time. Excludes write time prior to internal erase Erase/write cycles and data hold time Erase/write cycles (cycle) Data hold time (year) 1,000 20 * Remarks 10,000 10 * 100,000 5* *: This value comes from the technology qualification (using Arrhenius equation to translate high temperature measurements into normalized value at + 85C) . DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 89 r2.1 MB9B100 Series  EXAMPLE OF CHARACTERISTIC Power supply current (PLL run mode, PLL sleep mode) Iccs sleep operation(PLL) temperature characteristics Vcc:5.5V, Peripheral:40MHｚ Icc normal operation(PLL) temperature characteristics Vcc:5.5V, CPU:80MHｚ, Peripheral:40MHｚ,FLASH 2Wait 60 120 100 Power supply current [mA] Power supply current [mA] 110 90 80 70 60 50 40 30 20 50 40 30 20 10 10 0 -40 -30 -20 -10 0 0 10 20 30 40 50 60 70 -40 -30 -20 -10 80 0 10 20 30 40 50 60 70 80 Temperature Ta[℃] Temperature Ta[℃] Power supply current (Sub run mode) Icc normal operation(sub oscillation) temperature characteristics(semi-log) Vcc:5.5V, CPU/Peripheral:32KHz Icc normal operation(sub oscillation) temperature characteristics Vcc:5.5V, CPU/Peripheral:32KHz 1000 500 Power supply current [μA] (log) Power supply current [μA] 450 400 350 300 250 200 150 100 100 10 50 1 0 -40 -30 -20 -10 0 10 20 30 40 Temperature Ta[℃] 50 60 70 -40 -30 -20 -10 80 0 10 20 30 40 50 60 70 80 70 80 Temperature Ta[℃] Power supply current (Sub sleep mode) Iccs sleep operation(sub oscillation) temperature characteristics(semi-log) Vcc:5.5V, Peripheral:32KHz Iccs sleep operation(sub oscillation) temperature characteristics Vcc:5.5V, Peripheral:32KHz 1000 500 Power supply current [μA] (log) Power supply current [μA] 450 400 350 300 250 200 150 100 100 10 50 1 0 -40 -30 -20 -10 0 10 20 30 40 Temperature Ta[℃] 50 60 70 80 90 FUJITSU SEMICONDUCTOR CONFIDENTIAL -40 -30 -20 -10 0 10 20 30 40 50 60 Temperature Ta[℃] DS706-00007-1v0-E r2.1 MB9B100 Series Power supply current (Sub timer mode) ICCT timer mode(sub oscillation) temperature characteristics(semi-log) Vcc:5.5V, LVD is Off ICCT timer mode(sub oscillation) temperature characteristics Vcc:5.5V, LVD is Off 1000 500 Power supply current [μA] (log) Power supply current [μA] 450 400 350 300 250 200 150 100 100 10 50 1 0 -40 -30 -20 -10 0 10 20 30 40 Temperature Ta[℃] 50 60 70 -40 -30 -20 -10 80 0 10 20 30 40 50 60 70 80 70 80 Temperature Ta[℃] Power supply current (Stop mode) ICCH stop mode (sub oscillation) temperature characteristics(semi-log) Vcc:5.5V, LVD is Off ICCH stop mode (sub oscillation) temperature characteristics Vcc:5.5V, LVD is Off 1000 500 Power supply current [μA] (log) Power supply current [μA] 450 400 350 300 250 200 150 100 100 10 50 1 0 -40 -30 -20 -10 0 10 20 30 40 Temperature Ta[℃] 50 60 70 80 DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL -40 -30 -20 -10 0 10 20 30 40 50 60 Temperature Ta[℃] 91 r2.1 MB9B100 Series  ORDERING INFORMATION Part number Package MB9BF104NPMC Plastic・LQFP(0.5mm pitch),100-pin (FPT-100P-M20*/M23) MB9BF105NPMC Plastic・LQFP(0.5mm pitch),100-pin (FPT-100P-M20*/M23) MB9BF106NPMC Plastic・LQFP(0.5mm pitch),100-pin (FPT-100P-M20*/M23) MB9BF104RPMC Plastic・LQFP(0.5mm pitch),120-pin (FPT-120P-M21) MB9BF105RPMC Plastic・LQFP(0.5mm pitch),120-pin (FPT-120P-M21) MB9BF106RPMC Plastic・LQFP(0.5mm pitch),120-pin (FPT-120P-M21) MB9BF104NBGL Plastic・PFBGA(0.8mm pitch),112-pin (BGA-112P-M04) MB9BF105NBGL Plastic・PFBGA(0.8mm pitch),112-pin (BGA-112P-M04) MB9BF106NBGL Plastic・PFBGA(0.8mm pitch),112-pin (BGA-112P-M04) * : ES product only 92 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.1 MB9B100 Series  PACKAGE DIMENSIONS 100-pin plastic LQFP Lead pitch 0.50 mm Package width × package length 14.0 mm × 14.0 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.70 mm Max Weight 0.65 g Code (Reference) P-LFQFP100-14×14-0.50 (FPT-100P-M20) 100-pin plastic LQFP (FPT-100P-M20) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 16.00±0.20(.630±.008)SQ *14.00±0.10(.551±.004)SQ 75 51 76 50 0.08(.003) Details of "A" part +0.20 26 100 "A" 1 25 0.50(.020) C +.008 1.50 –0.10 .059 –.004 (Mounting height) INDEX 0.20 ±0.05 (.008 ±.002) 0.08(.003) M 0.145±0.055 (.006 ±.002) 2005 -2010 FUJITSU SEMICONDUCTOR LIMITED F100031S-c-3-5 0°~8° 0.50 ±0.20 (.020 ±.008) 0.60 ±0.15 (.024 ±.006) 0.10 ±0.10 (.004 ±.004) (Stand off) 0.25(.010) Dimensions in mm (inches). Note: The values in parentheses are reference values Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 93 r2.0 MB9B100 Series (Continued) 100-pin plastic LQFP Lead pitch 0.50 mm Package width × package length 14.00 mm × 14.00 mm Lead shape Gullwing Lead bend direction Normal bend Sealing method Plastic mold Mounting height 1.70 mm MAX Weight 0.65 g (FPT-100P-M23) 100-pin plastic LQFP (FPT-100P-M23) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 16.00±0.20(.630±.008)SQ *14.00±0.10(.551±.004)SQ 75 51 76 50 0.08(.003) Details of "A" part 1.50 +0.20 - 0.10 (.059+.008 -.004) (Mounting height) INDEX 100 26 "A" 1 C 0.60±0.15 (.024±.006) 25 0.50(.020) 0.22±0.05 (.009±.002) 0.08(.003) M 0°~8° 0.50±0.20 (.020±.008) 0.10±0.10 (.004±.004) (Stand off) 0.25(.010) 0.145±0.055 (.006±.002) 2009-2010 FUJITSU SEMICONDUCTOR LIMITED F100034S-c-3-4 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ 94 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series (Continued) 120-pin plastic LQFP Lead pitch 0.50 mm Package width × package length 16.0 × 16.0 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 1.70 mm MAX Weight 0.88 g Code (Reference) P-LFQFP120-16×16-0.50 (FPT-120P-M21) 120-pin plastic LQFP (FPT-120P-M21) Note 1) * : These dimensions do not include resin protrusion. Resin protrusion is +0.25(.010) MAX(each side). Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 18.00±0.20(.709±.008)SQ * 16.00 +0.40 –0.10 .630 +.016 –.004 SQ 90 61 91 60 0.08(.003) Details of "A" part 1.50 .059 +0.20 –0.10 +.008 –.004 (Mounting height) INDEX 0~8° 120 LEAD No. 31 1 30 0.50(.020) C "A" 0.22±0.05 (.009±.002) 0.08(.003) M 0.145 .006 2002-2010 FUJITSU SEMICONDUCTOR LIMITED F120033S-c-4-7 +0.05 –0.03 +.002 –.001 0.60±0.15 (.024±.006) 0.10±0.05 (.004±.002) (Stand off) 0.25(.010) Dimensions in mm (inches). Note: The values in parentheses are reference values. Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 95 r2.0 MB9B100 Series (Continued) 112-ball plastic PFBGA Ball pitch 0.80 mm Package width × package length 10.00 × 10.00 mm Lead shape Soldering ball Sealing method Plastic mold Ball size Ф 0.45 mm Mounting height 1.45 mm Max. Weight 0.22 g (BGA-112P-M04) 112-ball plastic PFBGA (BGA-112P-M04) 10.00±0.10(.394±.004) 0.20(.008) S B 0.80(.031) REF B 11 10 9 8 7 6 5 4 3 2 0.80(.031) REF A 10.00±0.10 (.394±.004) 1 L K J H G F (INDEX AREA) 0.35±0.10 (.014±.004) (Stand off) 0.20(.008) S A 1.25±0.20 (.049±.008) (Seated height) ED C B A INDEX 112-Ф0.45±010 (112-Ф0.18±.004) Ф0.08(.003)M S A B S 0.10(.004) S C 2003-2010 FUJITSU SEMICONDUCTOR LIMITED B112004S-c-2-3 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please check the latest package dimension at the following URL. http://edevice.fujitsu.com/package/en-search/ 96 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series  MAJOR CHANGES IN THIS EDITION Page Section Change Results - All Added package : LQFP100(FPT-100P-M23). 64 ELECTRICAL CHARACTERISTICS AC Characteristics (3) Built-in CR Oscillation Characteristics Changed the value of "・Built-in high-speed CR". (TBD  Fixed value) 85 12bit A/D Converter Changed the value and remarks of Tcck, AVCC, AVRH. 90, 91 EXAMPLE OF CHARACTERISTIC Added a new section. 92 ORDERING INFORMATION Added a new section. In the previous revision, the number at the upper-right of the page is DS706-00007-0v01-E. DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 97 r2.1 MB9B100 Series 98 FUJITSU SEMICONDUCTOR CONFIDENTIAL DS706-00007-1v0-E r2.0 MB9B100 Series DS706-00007-1v0-E FUJITSU SEMICONDUCTOR CONFIDENTIAL 99 r2.0 FUJITSU SEMICONDUCTOR LIMITED Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome, Kohoku-ku Yokohama Kanagawa 222-0033, Japan Tel: +81-45-415-5858 http://jp.fujitsu.com/fsl/en/ For further information please contact: North and South America FUJITSU SEMICONDUCTOR AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://us.fujitsu.com/micro/ Asia Pacific FUJITSU SEMICONDUCTOR ASIA PTE. LTD. 151 Lorong Chuan, #05-08 New Tech Park 556741 Singapore Tel : +65-6281-0770 Fax : +65-6281-0220 http://www.fujitsu.com/sg/services/micro/semiconductor/ Europe FUJITSU SEMICONDUCTOR EUROPE GmbH Pittlerstrasse 47, 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/semiconductor/ FUJITSU SEMICONDUCTOR SHANGHAI CO., LTD. Rm. 3102, Bund Center, No.222 Yan An Road (E), Shanghai 200002, China Tel : +86-21-6146-3688 Fax : +86-21-6335-1605 http://cn.fujitsu.com/fss/ Korea FUJITSU SEMICONDUCTOR KOREA LTD. 206 Kosmo Tower Building, 1002 Daechi-Dong, Gangnam-Gu, Seoul 135-280, Republic of Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://kr.fujitsu.com/fmk/ FUJITSU SEMICONDUCTOR PACIFIC ASIA LTD. 10/F., World Commerce Centre, 11 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel : +852-2377-0226 Fax : +852-2376-3269 http://cn.fujitsu.com/fsp/ Specifications are subject to change without notice. For further information please contact each office. All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of FUJITSU SEMICONDUCTOR device; FUJITSU SEMICONDUCTOR does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. FUJITSU SEMICONDUCTOR assumes no liability for any damages whatsoever arising out of the use of the information. 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The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of overcurrent levels and other abnormal operating conditions. Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws. The company names and brand names herein are the trademarks or registered trademarks of their respective owners. Edited: Sales Promotion Department