GL827-HHG

Genesys Logic, Inc. GL827 USB 2.0 Single Slot SD/MMC/MS/SM/xD-Picture Card Reader Controller Datasheet Revision 1.09 Sep. 06, 2007 GL827 USB 2.0 Single Slot Card Reader Controller Copyright: Copyright © 2007 Genesys Logic Incorporated. All rights reserved. No part of the materials may be reproduced in any form or by any means without prior written consent of Genesys Logic Inc. Disclaimer: ALL MATERIALS ARE PROVIDED “AS IS” WITHOUT EXPRESS OR IMPLIED WARRANTY OF ANY KIND. NO LICENSE OR RIGHT IS GRANTED UNDER ANY PATENT OR TRADEMARK OF GENESYS LOGIC INC.. GENESYS LOGIC HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS IN REGARD TO MATERIALS, INCLUDING ALL WARRANTIES, IMPLIED OR EXPRESS, OF MERCHANTABILITY, FITNESS FOR ANY PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF INTELLECTUAL PROPERTY, INCLUDING, WITHOUT LIMITATION, THE X-D PICTURE CARDTM LICENSE. IN NO EVENT SHALL GENESYS LOGIC BE LIABLE FOR ANY DAMAGES INCLUDING, WITHOUT LIMITATION, DAMAGES RESULTING FROM LOSS OF INFORMATION OR PROFITS. PLEASE BE ADVISED THAT THE MATERIALS MAY CONTAIN ERRORS OR OMMISIONS. GENESYS LOGIC MAY MAKE CHANGES TO THE MATERIALS OR TO THE PRODUCTS DESCRIBED THEREIN AT ANY TIME WITHOUT NOTICE. Trademarks: is a registered trademark of Genesys Logic, Inc. All trademarks are the properties of their respective owners. Office: Genesys Logic, Inc. 12F, No. 205, Sec. 3, Beishin Rd., Shindian City, Taipei, Taiwan Tel: (886-2) 8913-1888 Fax: (886-2) 6629-6168 http://www.genesyslogic.com ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 2 GL827 USB 2.0 Single Slot Card Reader Controller Revision History Revision 1.00 1.01 1.03 1.04 1.05 Date 2006/04/11 2006/05/05 2006/06/06 2006/06/06 2006/08/28 First formal release Add Reset Timing 1. Add Clock source selection 2. Add Reset pull up with DVDD 3. Modify DVDD(Pin15) on 48Pin package 4. Check PMOS output current Add Micro SD / MMC Micro / MS PRO Micro support 1. Add 5V to 3.3 V regulator characteristic 2. Remove all the description of over-current protection 3. Delete AVDD1~4 (Pin15) on 100Pin package 1. Add 48Pin LQFN package 2. Add QFN24 package and CSP23 package 3. Modify pin name for simplification and pin type 4. Support MMCv4.2 1. Add Vista submission number 1218426, p8. 2. Modify xD 1.2B to 1.2C, p8. 3. Supports Slew Rate Control (SRC) to reduce EMI effect 1. Add SSOP28, p7,8,14,18,19,45,46 1. Update reset timing in section 6.6.8, p.38 Description 1.06 2006/10/12 1.07 1.08 1.09 2007/03/23 2007/08/30 2007/09/06 ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 3 GL827 USB 2.0 Single Slot Card Reader Controller TABLE OF CONTENTS CHAPTER 1 GENERAL DESCRIPTION................................................... 7 CHAPTER 2 FEATURES .............................................................................. 8 CHAPTER 3 PIN ASSIGNMENT ................................................................ 9 3.1 PINOUT ....................................................................................................... 9 3.2 PIN LIST.................................................................................................... 15 3.3 PIN DESCRIPTIONS ................................................................................... 19 CHAPTER 4 BLOCK DIAGRAM.............................................................. 22 CHAPTER 5 FUNCTION DESCRIPTION ............................................... 23 CHAPTER 6 ELECTRICAL CHARACTERISTICS............................... 24 6.1 ABSOLUTE MAXIMUM RATINGS .............................................................. 24 6.2 OPERATING CONDITIONS......................................................................... 24 6.3 DC CHARACTERISTICS ............................................................................ 24 6.4 PMOS CHARACTERISTICS ...................................................................... 25 6.5 5V TO 3.3 V REGULATOR CHARACTERISTICS ........................................ 25 6.6 AC CHARACTERISTICS ............................................................................ 25 6.6.1 UTMI Transceiver .......................................................................... 25 6.6.2 External Flash ................................................................................. 26 6.6.3 SmartMedia ..................................................................................... 28 6.6.4 xD...................................................................................................... 33 6.6.5 Memory Stick .................................................................................. 34 6.6.6 Memory Stick PRO......................................................................... 35 6.6.7 Secure Digital................................................................................... 36 6.6.8 Reset Timing.................................................................................... 38 6.6.9 EEPROM 93C46 Timing................................................................ 39 CHAPTER 7 PACKAGE DIMENSION..................................................... 41 CHAPTER 8 ORDERING INFORMATION ............................................ 47 ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 4 GL827 USB 2.0 Single Slot Card Reader Controller LIST OF FIGURES FIGURE 3.1 – 100 PIN LQFP PINOUT DIAGRAM ................................................................. 9 FIGURE 3.2 – 48 PIN LQFP/LQFN PINOUT DIAGRAM..................................................... 10 FIGURE 3.3 – 24 PIN QFN PINOUT DIAGRAM ................................................................... 11 FIGURE 3.4 – 24 PIN QFN PINOUT DIAGRAM ................................................................... 12 FIGURE 3.5 – 23 PIN CSP PINOUT DIAGRAM .................................................................... 13 FIGURE 3.6 – 28 PIN SSOP PINOUT DIAGRAM ................................................................. 14 FIGURE 4.1 - BLOCK DIAGRAM ......................................................................................... 22 FIGURE 6.1 - EMBEDDED PMOS SWITCH ARCHITECTURE .............................................. 25 FIGURE 6.2 - TIMING DIAGRAM OF EXTERNAL FLASH .................................................... 26 FIGURE 6.3 - TIMING DIAGRAM OF SMARTMEDIA ........................................................... 31 FIGURE 6.4 - MEMORYSTICK PARALLEL TRANSFER OPERATION TIMING ..................... 34 FIGURE 6.5 - MEMORYSTICK PRO PARALLEL TRANSFER OPERATION TIMING ............ 35 FIGURE 6.6 - TIMING DIAGRAM OF SECURE DIGITAL (DEFAULT)................................... 36 FIGURE 6.7 - TIMING DIAGRAM OF SECURE DIGITAL (HIGH-SPEED MODE).................. 37 FIGURE 6.8 - TIMING DIAGRAM OF RESET WIDTH ........................................................... 38 FIGURE 6.9 - TIMING DIAGRAM OF EEPROM 93C46 ..................................................... 39 FIGURE 7.1 - GL827 100 PIN LQFP PACKAGE ................................................................. 41 FIGURE 7.2 - GL827 48 PIN LQFP PACKAGE ................................................................... 42 FIGURE 7.3 - GL827 48 PIN LQFN PACKAGE .................................................................. 43 FIGURE 7.4 - GL827 24 PIN QFN PACKAGE ..................................................................... 44 FIGURE 7.5 - GL827 23 PIN CSP PACKAGE ...................................................................... 45 FIGURE 7.6 - GL827 28 PIN SSOP PACKAGE ................................................................... 46 ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 5 GL827 USB 2.0 Single Slot Card Reader Controller LIST OF TABLES TABLE 3.1 – LQFP 100 PIN LIST ....................................................................................... 15 TABLE 3.2 – LQFP48 /LQFN48 PIN LIST ........................................................................ 16 TABLE 3.3 – QFN24 PIN LIST ............................................................................................ 17 TABLE 3.4 – QFN24 PIN LIST ............................................................................................ 17 TABLE 3.5 – CSP23 PIN LIST............................................................................................. 18 TABLE 3.6 – SSOP28 PIN LIST .......................................................................................... 18 TABLE 3.7 - PIN DESCRIPTIONS ......................................................................................... 19 TABLE 6.1 - ABSOLUTE MAXIMUM RATINGS .................................................................... 24 TABLE 6.2 - OPERATING CONDITIONS .............................................................................. 24 TABLE 6.3 - DC CHARACTERISTICS .................................................................................. 24 TABLE 6.4 - PMOS DRIVING STRENGTH VERSUS JUNCTION TEMPERATURE ................. 25 TABLE 6.5 – REGULATOR OUTPUT CURRENT ................................................................... 25 TABLE 8.1 - ORDERING INFORMATION ............................................................................. 47 ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 6 GL827 USB 2.0 Single Slot Card Reader Controller CHAPTER 1 GENERAL DESCRIPTION The GL827 is USB 2.0 Single Interface Flash Card Reader controller. It supports USB 2.0 high-speed TM TM transmission to Secure Digital (SD), SDHC, Mini SDTM, Micro SDTM , T-Flash , MultiMediaCard (MMC), TM RS MultiMediaCardTM (RS MMC), MMC Micro , HS-MMC, MMC-Mobile , Memory Stick (MS), Memory TM TM TM Stick Duo (MS Duo), High Speed Memory Stick (HS MS), Memory Stick PRO (MS PRO), Memory TM Stick PROTM Duo (MS PRO Duo), Memory Stick ROM, MS PRO Micro, SmartMedia (SM) , and TM xD-Picture Card (xD) on one chip. As a single chip solution for USB 2.0 flash card reader, the GL827 complies with Universal Serial Bus specification rev. 2.0, USB Storage Class specification ver.1.0, and flash card interface specification each. The GL827 can support different kinds of interfaces in single slot. For the best performance consideration, the GL827 integrates high efficiency card interface hardware engine for data transfer. The GL827 also supports firmware upgrade via USB interface (100 Pin LQFP), and external flash read/ write for firmware upgrade and other applications. The GL827 pin assignment design fits to card sockets to provide easier PCB layout. 100 Pin LQFP (14mmx14mm), 48 Pin LQFP/LQFN (7mm x 7mm), QFN24 (4mm x 4mm), SSOP28 (150mil) are available package types. ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 7 GL827 USB 2.0 Single Slot Card Reader Controller CHAPTER 2 FEATURES USB specification compliance - Comply with 480Mbps Universal Serial Bus specification rev. 2.0. - Comply with USB Storage Class specification rev. 1.0. Support 1 device address and up to 4 endpoints: Control (0)/ Bulk Read (1)/ Bulk Write (2)/Interrupt (3). Integrated USB building blocks - USB2.0 transceiver macro (UTM), Serial Interface Engine (SIE), Build-in power-on reset (POR) and low-voltage detector (LVD) Embedded 8051 micro-controller - Operate @ 60 MHz clock, 12 clocks per instruction cycle - Embedded 48K Byte mask ROM and internal 256 byte SRAM - Embedded 4K Byte external SRAM - Support up to external 48K code ROM Supports firmware upgrade to external flash via USB ( ISP : In System Programming ) (Only for LQFP100) USB 2.0 certified (USB-IF Pass, TID: 40000207/ 40550012) WHQL submission number 1062005. Vista submission number 1218426. xD-Picture (Only for LQFP100/ LQFP48/ LQFN48) - xD-Picture specification v1.2C. Type-M / Type-H SmartMediaTM (Only for LQFP100/ LQFP48/ LQFN48) - 8 bit data width and different speed - Support different page size, and automatic append redundant area data (8 / 16 bytes) Memory StickTM / Memory Stick PRO / Memory Stick PRO Duo / Memory Stick Micro (For all packages) - Comply with Memory Stick specification - Support INS signal - Support automatic CRC16 generation and verification (For all packages) Secure Digital and MultiMediaCard - Supports SD specification v1.0 / v1.1 / v2.0 - Supports MMC specification v3.X / v4.0 / v4.1 / v4.2. - x1 / x4 / x8 data transmission. (For QFN24 and CSP23 up to x4) - Automatic CRC7 generation for command and CRC7 verification for response on CMD - Support automatic CRC16 generation and verification on DAT0:7 In addition to full packet transaction, optional single byte / bit operation on both CMD and DAT line / lines TM TM - Process data in block or byte On board 12 MHz Crystal driver circuit or 12/48 MHz Clock input. On-Chip 5V to 3.3V regulator. No external regulator required. On-Chip power MOSFETs for supplying flash media card power. Available in 100 Pin LQFP (14x14 mm) package Available in 48 Pin LQFP/LQFN (7x7 mm) package Available in 24 Pin QFN (4x4 mm) package Available in 28 Pin SSOP (150mil) package Order in Advance in 23 Pin CSP (2x2 mm) package ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 8 3.1 Pinout MD0 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 GND GND SM_CLE /MS_BS D6 GPIO0(SM_CE) D5 D3 D4 MA9 MA8 MA7 GND GND DVDD DVDD VP3 VP3 VP5 VP5 DVDD DVDD PMOSI PMOSI PMOSO PMOSO 1 MD1 2 MD2 3 MD3 4 XD_CDZ 5 6 7 SM_CDZ SM_WPDZ/SD _WPZ MD4 8 MD5 9 MD6 10 CHAPTER 3 PIN ASSIGNMENT ©2000-2007 Genesys Logic Inc. - All rights reserved. MD7 11 VDD18O 12 GND 13 GND 14 N/C 15 GND 16 AVDD 17 DM 18 DP 19 Figure 3.1 – 100 Pin LQFP Pinout Diagram GND 20 GND 21 RREF 22 AVDD 23 AVDD 24 GL827 USB 2.0 Single Slot Card Reader Controller N/C 25 Page 9 GL827 USB 2.0 Single Slot Card Reader Controller Figure 3.2 – 48 Pin LQFP/LQFN Pinout Diagram ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 10 GL827 USB 2.0 Single Slot Card Reader Controller Figure 3.3 – 24 Pin QFN Pinout Diagram Note: With Access LED / Without SD Write Protect ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 11 GL827 USB 2.0 Single Slot Card Reader Controller Figure 3.4 – 24 Pin QFN Pinout Diagram Note: With SD Write Protect / Without Access LED (For combo card application) ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 12 GL827 USB 2.0 Single Slot Card Reader Controller Figure 3.5 – 23 Pin CSP Pinout Diagram ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 13 GL827 USB 2.0 Single Slot Card Reader Controller Figure 3.6 – 28 Pin SSOP Pinout Diagram ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 14 GL827 USB 2.0 Single Slot Card Reader Controller 3.2 Pin List Table 3.1 – LQFP 100 Pin List Pin# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 GL827 Pin name MD0 MD1 MD2 MD3 XD_CDZ SM_CDZ SM_WPDZ/SD_WPZ MD4 MD5 MD6 MD7 VDD18O GND GND N/C GND AVDD DM DP GND GND RREF AVDD AVDD N/C N/C GND X1 X2 AVDD DVDD DVDD GND GND Type B/I, pd B/I, pd B/I, pd B/I, pd B/I, pd B/I, pd B/I, f B/I, pd B/I, pd B/I, pd B/I, pd Power Power Power  Power Power A A Power Power A Power Power   Power OSC OSC Power Power Power Power Power Pin# 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 GL827 Pin name TEST_MOD EXTRSTZ MA0 MA1 MA2 MA3 SK CS DO DI MA4 MA5 MA6 SD_CDZ MS_INS N/C VP5 VP5 VP3 VP3 DVDD DVDD GND GND MA7 MA8 MA9 D4 D3 D5 GPIO0 (SM_CE) D6 SM_CLE/MS_BS GND Type I, pd I, pu O O O O B/I, pd B/I, pd B/I, pd B/I, pd O O O B/I, pd B/I, pd  Power Power Power Power Power Power Power Power O O O B/I, f B/I, f B/I, f B/O, pd B/I, f B/I, f Power Pin# 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 GL827 Pin name GND DVDD DVDD PMOSI PMOSI PMOSO PMOSO D2 D7 SM_ALE/ MS_SCLK/ SD__CLK MA10 MA11 MA12 MA13 D0 SM_REZ/SD_CMD SM_WEZ MA14 MA15 MOEZ MWEZ MCSZ D1 SM_RBZ SM_WPZ EAB GPIO6 GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 Type Power Power Power PMOS PMOS PMOS PMOS B/I, f B/I, f B/I, f O O O O B/I, f B/I, f B/I, pd O O B/O, pu B/O, pu B/O, pu B/I, f B/I, pd B/I, pd B/I, pd B/I, pd B/I, pd B/I, pd B/I, pd B/I, pd B/I, pd ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 15 GL827 USB 2.0 Single Slot Card Reader Controller Table 3.2 – LQFP48 /LQFN48 Pin List Pin# 1 2 3 GL827 Pin name XD_CDZ SM_CDZ SM_WPDZ/ Type B/I, pd B/I, pd B/I, f Pin# 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 GL827 Pin name TEST_MOD EXTRSTZ SK CS DO DI SD_CDZ MS_INS VP5 DVDD GND D4 D3 D5 GPIO0 (SM_CE) D6 Type I, pd I, pu B/I, pd B/I, pd B/I, pd B/I, pd B/I, pd B/I, pd Power Power Power B/I, f B/I, f B/I, f B/O, pd B/I, f Pin# 33 34 35 36 37 38 39 GL827 Pin name SM_CLE/MS_BS GND DVDD PMOSO D2 D7 SM_ALE/MS_SCLK/ Type B/I, f Power Power PMOS B/I, f B/I, f B/I, f SD_WPZ 4 5 6 7 8 9 10 11 12 13 14 15 16 VDD18O GND AVDD DM DP GND RREF AVDD GND X1 X2 DVDD GND Power Power Power A A Power A Power Power OSC OSC Power Power SD_CLK 40 41 42 43 44 45 46 47 48 D0 SM_REZ/SD_CMD SM_WEZ D1 SM_RBZ SM_WPZ GPIO3 GPIO2 GPIO1 B/I, f B/I, f B/I, pd B/I, f B/I, pd B/I, pd B/I, pd B/I, pd B/I, pd ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 16 GL827 USB 2.0 Single Slot Card Reader Controller Table 3.3 – QFN24 Pin List Pin# 1 2 3 4 5 6 7 8 GL827 Pin name AVDD DM DP RREF AVDD X1 X2 DVDD Type Power A A A Power OSC OSC Power Pin# 9 10 11 12 13 14 15 16 GL827 Pin name EXTRSTZ DI SD_CDZ MS_INS VP5 DVDD D3 MS_BS Type I, pu B/I, pd B/I, pd B/I, pd Power Power B/I, f B/I, f Pin# 17 18 19 20 21 22 23 24 GL827 Pin name DVDD PMOSO D2 SD_CLK D0 SD_CMD D1 GND Type Power PMOS B/I, f B/I, f B/I, f B/I, f B/I, f Power Note: With Access LED / Without SD Write Protect Table 3.4 – QFN24 Pin List Pin# 1 2 3 4 5 6 7 8 GL827 Pin name GND AVDD DM DP RREF AVDD X1 X2 Type Power Power A A A Power OSC OSC Pin# 9 10 11 12 13 14 15 16 GL827 Pin name DVDD EXTRSTZ SD_CDZ MS_INS VP5 DVDD D3 MS_BS Type Power I, pu B/I, pd B/I, pd Power Power B/I, f B/I, f Pin# 17 18 19 20 21 22 23 24 GL827 Pin name DVDD PMOSO D2 SD_CLK D0 SD_CMD D1 SD_WP Type Power PMOS B/I, f B/I, f B/I, f B/I, f B/I, f B/I, pd Note: With SD Write Protect / Without Access LED (For combo card application) ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 17 GL827 USB 2.0 Single Slot Card Reader Controller Table 3.5 – CSP23 Pin List Pin# A1 A3 A5 B2 B4 C1 C3 C5 GL827 Pin name D2 SD_CMD GPIO1 PMOSO D0 MS_BS SD_CLK D1 Type B/I, f B/I, f B/I, pd PMOS B/I, f B/I, f B/I, f B/I, f Pin# D2 D4 E1 E3 E5 F2 F4 GL827 Pin name DVDD DM D3 RREF AVDD VP5 GND Type Power A B/I, f A Power Power Power Pin# G1 G3 G5 H2 H4 J1 J3 J5 GL827 Pin name GND X2 DP SD_CDZ GND MS_INS EXTRSTZ X1 Type Power OSC A B/I, pd Power B/I, pd I, pu OSC Table 3.6 – SSOP28 Pin List Pin# 1 2 3 4 5 6 7 8 9 10 GL827 Pin name GPIO1 PMOSO DVDD X1 X2 GND AVDD DP DM RREF Type B/I, pd PMOS Power OSC OSC Power Power A A A Pin# 11 12 13 14 15 16 17 18 19 20 GL827 Pin name DVDD VP5 EXTRSTZ SD_WPZ SD_CDZ D1 D0 D7 D6 SD_CLK Type Power Power I, pu B/I, f B/I, f B/I, f B/I, f B/I, f B/I, f B/I, f Pin# 21 22 23 24 25 26 27 28 GL827 Pin name D5 SD_CMD D4 D3 D2 MS_INS GPIO3 GPIO0 Type B/I, f B/I, f B/I, f B/I, f B/I, f B/I, pd B/I, pd B/I, pd ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 18 GL827 USB 2.0 Single Slot Card Reader Controller 3.3 Pin Descriptions Table 3.7 - Pin Descriptions Pin name VDD18O LQFP100 12 13,14,16,20,21, GND 27 AVDD N/C DM DP RREF 17,23,24,30 15 18 19 22 6,11 N/A 7 8 10 7 N/A 9 8 10 1,5 N/A 2 3 4 2,6 N/A 3 4 5 E5 N/A D4 G5 E3 P A A A A Analog power Test only USB DUSB D+ Reference resistor 12MHz/48MHz input. This pin can be connected to one terminal of crystal or external 12MHz/48MHz clock source. 12MHz/48MHz output. This is another terminal of the crystal or NC when using an external 12MHz/48MHz clock source is used to drive PLL. Digital power 3.3V 5,9,12 6 N/A N/A F4,H4 P Analog ground LQFP48 4 SSOP28 N/A QFN24 N/A QFN24 N/A CSP23 N/A Type P output Description Internal regulator 1.8V X1 28 13 4 6 7 J5 OSC X2 29 14 5 7 8 G3 OSC 31,32,55,56,70, DVDD 71 33,34,57,58,68, GND 69 VP5 VP3 PMOSI PMOSO TEST_MOD EXTRSTZ EAB SM_CDZ 51,52 53,54 72,73 74,75 35 36 94 6 25 N/A N/A 36 17 18 N/A 2 12 N/A N/A 2 N/A 13 N/A N/A 13 N/A N/A 18 N/A 9 N/A N/A 13 N/A N/A 18 N/A 10 N/A N/A F2 N/A N/A B2 N/A J3 N/A N/A P P Regulator 5V Input Regulator 3.3V output 16,27,34 6 24 1 G1 P Digital ground 15,26,35 3,,11 8,14,17 9,14,17 D2 P PMOS Power MOS 3.3V input PMOS Power MOS 3.3V output I, pd I, pu Test mode selection External reset. It is active low. The low pulse should be 1 us width at least. B/I, pu Ext flash selection B/I, pd SmartMedia Card detection. Normal High, ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 19 GL827 USB 2.0 Single Slot Card Reader Controller active low. XD_CDZ 5 1 N/A N/A N/A N/A xD-Picture Card B/I, pd detection. Normal High, active low. B/I, pd Memory Stick INS. Normal High, active low. MS_INS 49 24 26 12 12 J1 SD_CDZ 48 23 40,43,37, 15 17,16,25, 11 11 H2 SD& MMC Card B/I, pd detection. Normal High, active low. SM data 0~7 MS data 0~3 SD data 0~3 MMC data 0~7 SmartMedia card Chip 83,91,76,63,62, D0~D7 64,66,77 32,38 GPIO0 65 (SM_CE) SM_ALE/ MS_SCLK/ SD_CLK 78 39 20 31 28 19,18 29,28,30, 24,23,21, 21,23, 19,15 21,23, 19,15 B4,C5, B/I, f A1,E1 N/A N/A N/A B/O, pd Enable SmartMedia ALE/ MemoryStick SCLK/ SD/MMC CLK SM_WPDZ: SmartMedia seal. SD_WPZ: SD Write Protect Detection. When no card is inserted, pull low. When SM or SD card is inserted, the pin is pull up and active low. SmartMedia CLE/ 20 20 C3 B/I, f SM_WPDZ/ 7 SD_WPZ 3 14 N/A 24 N/A B/I, f SM_CLE/ 67 MS_BS (MS_BS/ 33 22 16 16 C1 B/I, f Memory Stick BS SmartMedia REZ/ SM_REZ/ 84 SD_CMD SM_WEZ SM_RBZ 85 92 42 44 N/A N/A N/A N/A N/A N/A N/A N/A 41 SD_CMD) 22 22 A3 B/I, f SD/MMC CMD B/I, pd SmartMedia WE B/I, pd SmartMedia RDY/BSY SmartMedia Write Protect Detection. When no card is inserted, pull low. B/I, pd When SM card is inserted, the pin is pull up and active low. GPIO1~6 B/I, pd GPIO3 : Power LED B/I, pd 93C46 Clock B/I, pd 93C46 CS SM_WPZ 93 45 N/A N/A N/A N/A GPIO1~6 SK CS 100~95 43 44 48~46 19 20 1, 27 N/A N/A N/A N/A N/A N/A N/A N/A A5 N/A N/A ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 20 GL827 USB 2.0 Single Slot Card Reader Controller DO DI MD0~7 45 46 1~4, 8~11 37~40,35~47,5 21 22 N/A N/A N/A N/A N/A 10 N/A N/A N/A N/A N/A N/A N/A B/I, pd 93C46 Data out 93C46 Data in / Access B/I, pd LED B/I, pd Ext. flash data 0~7 MA0~15 9~61,79~82,86 ~87 N/A N/A N/A N/A N/A O Ext. flash address 0~15 MOEZ MWEZ MCSZ 88 89 90 N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A B/O, pu Ext. flash OE B/O, pu Ext. flash WE B/O, pu Ext. flash CS Notation: Type A B B/I B/O I O OSC P f pd pu Analog Bi-directional Bi-directional, default input Bi-directional, default output Input Output Oscillator Power / Ground Internal floating Internal pull down Internal pull up ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 21 GL827 USB 2.0 Single Slot Card Reader Controller CHAPTER 4 BLOCK DIAGRAM Figure 4.1 - Block Diagram ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 22 GL827 USB 2.0 Single Slot Card Reader Controller CHAPTER 5 FUNCTION DESCRIPTION UTM The USB 2.0 Transceiver Macrocell is the analog circuitry that handles the low level USB protocol and signaling, and shifts the clock domain of the data from the USB 2.0 rate to one that is compatible with the general logic. SIE The Serial Interface Engine, which contains the USB PID and address recognition logic, and other sequencing and state machine logic to handle USB packets and transactions. EPFIFO Endpoint FIFO includes Control FIFO (FIFO0), interrupt FIFO (FIFO3), Bulk In/Out FIFO (BULKFIFO) Control FIFO FIFO of control endpoint 0. It is 64-byte FIFO, and it is used for endpoint 0 data transfer. Interrupt FIFO 64-byte depth FIFO of endpoint 3 for status interrupt Bulk In/Out FIFO It can be in the TX mode or RX mode: 1. It contains ping-pong FIFO (512 bytes each bank) for transmit/receive data continuously. 2. It can be directly accessed by Uc 3. Automatic hardware SmartMedia ECC error correction support MHE It contains 4 MIFs (Media Interface) MIFs 1. SmartMedia / xD/ Flash 2. SD / MMC 3. MemoryStick 4. MemoryStick PRO Remote wakeup Support Card insert wakeup while suspend. External reset circuit Non-inverting, Schmitt input with weak pull-up using DVDD power. CLOCK Source Selection It selects 12/48 MHz input by exterior pull resistor. ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 23 GL827 USB 2.0 Single Slot Card Reader Controller CHAPTER 6 ELECTRICAL CHARACTERISTICS 6.1 Absolute Maximum Ratings Table 6.1 - Absolute Maximum Ratings Parameter Storage Temperature Ambient Temperature Supply Voltage to Ground Potential DC Input Voltage to Any Pin Value -65°C to +150 °C -40°C to +80 °C -0.5V to +4.0V -0.5V to +5.8V 6.2 Operating Conditions Table 6.2 - Operating Conditions Parameter Ta (Ambient Temperature Under Bias) Supply Voltage Ground Voltage FOSC (Oscillator or Crystal Frequency) Value 0°C to 70°C +3.0V to +3.6V 0V 12 MHz ± 0.05% 12 MHz ± 0.25% (for USB full-speed only) 6.3 DC Characteristics Table 6.3 - DC Characteristics Symbol VREG VCC VIH VIL II VOH VOL IOH IOL CIN ISUSP ICC Parameter Regulation Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Input Leakage current Output High Voltage Output Low Voltage Output Current High Output Current Low Input Pin Capacitance Suspend current Supply current 1.5K external pull-up included Connect to USB with 8051 operating VDD=3.3V VOH=2.4V VDD=3.3V VOL=0.4V 0 < VIN < VCC Condition Min. 4.5 3.0 2.0 -0.3 -10 2.4 Typ. 8 8 5 Max. 5.5 3.6 3.6 0.8 10 0.4 450 60 Unit V V V V µA V V mA mA pF µA mA ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 24 GL827 USB 2.0 Single Slot Card Reader Controller 6.4 PMOS Characteristics Table 6.4 - PMOS Driving Strength versus Junction Temperature (Core Power=1.8V, IO Power=3.3V) Junction Temperature 25 ° C Driving Strength (mA) 158.4 ± 10% On-Resistance (ohm) 1.61 ± 10% Note: 1. Driving strength is defined as the PMOS sinking current when Vio=3.3V, Vd=3.0V. 2. On-resistance is calculated by 0.2V divided by driving strength. Figure 6.1 - Embedded PMOS Switch Architecture 6.5 5V to 3.3 V Regulator Characteristics Table 6.5 – Regulator Output Current Parameters Iq Io_max Vo_0mA Vo_200mA Description Quiescent current Output driving capability V33 voltage without loading V33 voltage with 200mA load Test Conditions no loading V33 > 2.9V Min. 10 200 3.0 2.9 Typ.. 18 500 3.4 3.34 Max. 25 600 3.57 3.52 Units uA mA V V 6.6 AC Characteristics 6.6.1 UTMI Transceiver The GL827 is fully compatible with Universal Serial Bus specification rev. 2.0 and USB 2.0 Transceiver Macercell Interface (UTMI) specification rev. 1.01. Please refer to the specification for more information. ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 25 GL827 USB 2.0 Single Slot Card Reader Controller 6.6.2 External Flash Figure 6.2 - Timing Diagram of External Flash ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 26 GL827 USB 2.0 Single Slot Card Reader Controller AC Characteristics of Flash Interface (CLOAD = 30pF) Symbol tACC tCE tDF tOH tAS tAH tOES tCS tCH tWP tWPH tDS tDH tOEH Address to Output Delay (max) Parameter Max 83 83 0 0 760 760 300 0 0 66 300 300 0 16 Unit NVMCSZ to Output Delay (max) NVMCEZ or NVMOEZ, whichever occurred first, to Output Float (max) Output Hold from NVMOEZ, NVMCSZ or Address, whichever occurred first (min) Address Setup Time (min) Address Hold Time (min) NVMOEZ Setup Time (min) NVMCSZ Setup Time (min) NVMCSZ Hold Time (min) Write Pulse Width (min) Write Pulse Width High (min) Data Setup Time (min) Data Hold Time (min) NVMOEZ Hold Time (min) ns ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 27 GL827 USB 2.0 Single Slot Card Reader Controller 6.6.3 SmartMedia ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 28 GL827 USB 2.0 Single Slot Card Reader Controller ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 29 GL827 USB 2.0 Single Slot Card Reader Controller ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 30 GL827 USB 2.0 Single Slot Card Reader Controller Figure 6.3 - Timing Diagram of SmartMedia ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 31 GL827 USB 2.0 Single Slot Card Reader Controller AC Characteristics of Smart Media Interface (CLOAD = 30 pF) SYMBOL tCLS tCLH tCS tCH tWP tALS tALH tDS tDH tWC tWH tWW tRR tRP tRC tREA tCEH tREAID tRHZ tCHZ tREH tRSTO tCSTO tRHW tWHC tWHR tAR1 tCR tWB tAR2 tRB tCRY CLE Setup Time CLE Hold Time -CE Setup Time -CE Hold Time -WE Pulse Width ALE Setup Time ALE Hold Time Data Setup Time Data Hold Time Write Cycle Time -WE High Hold Time -WP High to –WE Low Ready to –RE Low Read Pulse Width Read cycle Time -RE Access Time (Serial Data Access) -CE High Hold Time (At the Last Serial Read) -RE Access Time (ID Read) -RE High to Output Hi-Z -CE High to Output Hi-Z -RE High Hold Time -RE Access Time -CE Access Time -RE High to -WE Low -WE High to –CE Low -WE High to –RE Low ALE Low to –RE Low (Address Register Read, ID Read) -CE Low to –RE Low (Data Register Read, ID Read) -WE High to Busy ALE Low to RE Low (Read Cycle) Last –RE High to Busy (at Sequential Read) -CE High to Ready PARAMETER MIN. 20 40 20 40 40 20 40 30 20 80 20 100 20 60 80 250 5 20 0 50 60 200 200 150 500 1 MAX. 45 90 30 30 45 55 200 UNIT ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns µs ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 32 GL827 USB 2.0 Single Slot Card Reader Controller 6.6.4 xD The Timing diagrams are the same as SM. AC Characteristics: Parameter tCLS tCLH tCS tCH tWP tALS tALH tDS tDH tWC tWH tWW tRR tRP tRC tREA tCEH tREAID tRHZ tCHZ tREH tRSTO tCSTO tRHW tWHC tWHR TAR1 tCR tWB TAR2 tRB CLE Set up Time CLE Hold Time CE Setup up Time CE Hold Time WE Pulse Width ALE Setup Time ALE Hold Time Data Setup Time Data Hold Time Write Cycle Time WE High Hold Time WP High to WE Low Ready to RE Low Read Pulse Width Read Cycle Time RE Access Time(Serial Data Access) CE High Hold Time RE Access Time(ID Read) RE High to Output Hi-Z CE High to Output Hi-Z RE High Hold Time RE Access Time CE Access Time RE High to WE Low WE High to CE Low WE High to RE Low ALE Low to RE Low CE Low to RE Low WE High to Busy ALE LOW to RE LOW Last RE High to Busy Description Spec. Min 20 40 20 40 40 20 40 30 20 80 20 100 20 60 80 250 5 20 0 50 60 200 200 150 Spec. Max 45 90 30 30 45 55 200 200 ns Unit ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 33 GL827 USB 2.0 Single Slot Card Reader Controller 6.6.5 Memory Stick Figure 6.4 - MemoryStick Parallel Transfer Operation Timing Memory Stick Frequency Mode Parameter Description Mode 0 FSCLK SCLK frequency 1 2 3 Typ 1.5M 6M 15M 20M Hz Unit Remark AC Characteristics of Memory Stick Interface (CLOAD = 30 pF) PARAMETER tSCLKc tSCLKwh tSCLKwl tSCLKr tSCLKr tSCLKf tSCLKf tBSsu tBSh DESCRIPTION SCLK Cycle SCLK (min) H pulse length FSCLK = 1.5 MHZ 666.6 323.3 323.3 5 10 5 10 5 5 FSCLK = 6 MHZ 166.6 73.3 73.3 5 10 5 10 5 5 FSCLK = 15 MHZ 66.6 23.3 23.3 5 10 5 10 5 5 FSCLK = 20 MHZ 50.0 15 15 5 10 5 10 5 5 UNIT ns ns ns ns ns ns ns ns ns SCLK L pulse length (min) SCLK rise time (min) SCLK rise time (max) SCLK Fall time (min) SCLK Fall time (max) BS setup time (min) BS hold time (min) ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 34 GL827 USB 2.0 Single Slot Card Reader Controller tDsu tDh tDd DATA setup time (min) DATA hold time (min) DATA output delay time (max) 5 5 5 5 5 5 5 5 5 5 5 5 ns ns ns 6.6.6 Memory Stick PRO Figure 6.5 - MemoryStick PRO Parallel Transfer Operation Timing Memory Stick PRO Frequency Mode Parameter Description Mode 0 FSCLK SCLK frequency 1 2 3 4 5 AC Characteristics of MS Interface (CLOAD = 15 pF) PARAMETER tSCLKc tSCLKwh DESCRIPTION SCLK Cycle SCLK H pulse length (min) FSCLK = 30 MHZ 33.3 9 FSCLK = 40 MHZ 25.0 5 UNIT ns ns Page 35 Typ. 1.5M 6M 15M 20M 30M 40M Hz Same as Memory Stick Unit Remark ©2000-2007 Genesys Logic Inc. - All rights reserved. GL827 USB 2.0 Single Slot Card Reader Controller tSCLKwl tSCLKr tSCLKr tSCLKf tSCLKf tBSsu tBSh tDsu tDh tDd SCLK L pulse length (min) SCLK rise time (min) SCLK rise time (max) SCLK Fall time (min) SCLK Fall time (max) BS setup time (min) BS hold time (min) DATA setup time (min) DATA hold time (min) DATA output delay time (max) 9 5 7.5 5 7.5 8 1 8 1 5 5 5 7.5 5 7.5 8 1 8 1 5 ns ns ns ns ns ns ns ns ns ns 6.6.7 Secure Digital fPP tWL tWH Clock tTHL tISU tTLH tIH Input tODLY Output Figure 6.6 - Timing Diagram of Secure Digital (Default) ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 36 GL827 USB 2.0 Single Slot Card Reader Controller Figure 6.7 - Timing Diagram of Secure Digital (High-Speed Mode) SD Interface Timing (CL = 30PF) SYMBOL fPP fOD tWL tWH tTLH tTHL tISU tIH PARAMETER Clock frequency Data Transfer Mode Clock frequency Identification Mode Clock low time (min) Clock high time (min) Clock rise time (max) Clock fall time (max) Input set-up time (min) Input hold time (min) CLOCK RATE 48 375 7.4 7.4 3 3 6 0 24 375 16.8 16.8 4 4 6 0 UNIT MHz KHz ns ns ns ns ns ns ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 37 GL827 USB 2.0 Single Slot Card Reader Controller 6.6.8 Reset Timing Trst EXTRSTZ Figure 6.8 - Timing Diagram of Reset width 3V Vcc USB command Extrst 2V 500us 72ms Figure 6.9 - Timing Diagram of Power Good to USB command receive ready Parameter Trst T1 T2 Description Chip reset sense timing width External reset valid from power up to high Reset deassertion to respond USB command ready Min 2 Typ 500 Max - Unit us us ms 72 ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 38 GL827 USB 2.0 Single Slot Card Reader Controller 6.6.9 EEPROM 93C46 Timing Figure 6.9 - Timing Diagram of EEPROM 93C46 AC Characteristics of 93C46 Interface (with CLOAD = 15 pF) PARAMETER fSK tWH tWL tTLH tTHL tCSS tCSH tISU tIH DESCRIPTION SK clock frequency SK H pulse length SK L pulse length SK rise time SK fall time CS setup time CS hold time DI setup time DI hold time MINIMUM 200k 500 500 ─ ─ 1 1 1 1 MAXIMUM 400k ─ 5 10 10 ─ ─ ─ ─ UNIT Hz ns ns ns ns µs µs µs µs Page 39 ©2000-2007 Genesys Logic Inc. - All rights reserved. GL827 USB 2.0 Single Slot Card Reader Controller tOSU tOH DO setup time DO hold time 5 5 ─ ─ ns ns ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 40 GL827 USB 2.0 Single Slot Card Reader Controller CHAPTER 7 PACKAGE DIMENSION Figure 7.1 - GL827 100 Pin LQFP Package ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 41 GL827 USB 2.0 Single Slot Card Reader Controller Figure 7.2 - GL827 48 Pin LQFP Package ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 42 GL827 USB 2.0 Single Slot Card Reader Controller Figure 7.3 - GL827 48 Pin LQFN Package ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 43 GL827 USB 2.0 Single Slot Card Reader Controller Figure 7.4 - GL827 24 Pin QFN Package ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 44 GL827 USB 2.0 Single Slot Card Reader Controller Figure 7.5 - GL827 23 Pin CSP Package ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 45 GL827 USB 2.0 Single Slot Card Reader Controller Figure 7.6 - GL827 28 Pin SSOP Package ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 46 GL827 USB 2.0 Single Slot Card Reader Controller CHAPTER 8 ORDERING INFORMATION Table 8.1 - Ordering Information Part Number GL827-MWG GL827-MNG GL827-PNG GL827-OGG GL827-HHG Package 100-pin LQFP 48-pin LQFP 48-pin LQFN 24-pin QFN 28-pin SSOP 23-pin CSP Normal/Green Green Package Green Package Green Package Green Package Green Package Green Package Version XX XX XX XX XX XX Status For RD verify Available Available Available Available Order in Advance ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 47