GS1524 Multi-Rate SDI Adaptive Cable Equalizer
Key Features
• • • • • • • • • • • • • SMPTE 292M, SMPTE 344M and SMPTE 259M compliant automatic cable equalization multi-standard operation from 143Mb/s to 1.485Gb/s supports DVB-ASI at 270Mb/s manual bypass (useful for low data rates with slow rise/fall times) performance optimized for 270Mb/s and 1.485Gb/s typical maximum equalized length of Belden 1694A cable: 140m at 1.485Gb/s, 350m at 270Mb/s 50Ω differential output (with internal 50Ω pull-ups) Pb-free and RoHS Compliant cable length indicator for SMPTE 259M inputs output mute based on max cable length adjust or manual override single 3.3V power supply operation operating temperature range: 0°C to +70°C
Description
The GS1524 is a second-generation high-speed bipolar integrated circuit designed to equalize and restore signals received over 75Ω co-axial cable at data rates from 143Mb/s up to 1.485Gb/s. The GS1524 is designed to support SMPTE 292M, SMPTE 344M and SMPTE 259M, and is optimized for performance at 270Mb/s and 1.485Gb/s. The GS1524 features DC restoration to compensate for the DC content of SMPTE pathological test patterns. The GS1524 also incorporates a Cable Length Indicator (CLI) that provides an indication of the amount of cable being equalized for data rates up to 360Mb/s. A voltage programmable mute threshold (MCLADJ) is included to allow muting of the GS1524 output when an approximate selected cable length is reached for SMPTE 259M signals. This feature allows the GS1524 to distinguish between low amplitude SD-SDI signals and noise at the input of the device. The CD/MUTE pin provides an indication of the GS1524 mute status in addition to functioning as a mute control input. The SD outputs of the GS1524 may be forced to a mute state by applying a voltage to the CD/MUTE pin. Power consumption is typically 265mW using a 3.3V power supply. This component and all homogeneous subcomponents are RoHS compliant.
Applications
• SMPTE 292M, SMPTE 344M and SMPTE 259M Coaxial Cable Serial Digital Interfaces
MCLADJ
CABLE LENGTH INDICATOR/ADJUSTOR CARRIER DETECT MUTE
CLI CD/MUTE BYPASS
SDI SDI
EQUALIZER
DC RESTORE
OUTPUT
SDO SDO
AGC
Functional Block Diagram
GS1524 Multi-Rate SDI Adaptive Cable Equalizer Data Sheet 14976 - 11 August 2011
www.gennum.com
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Revision History
Version
11
ECR
156822
PCN
–
Date
August 2011
Changes and / or Modifications
Removed the test level notes from Table 2-1: DC Electrical Characteristics and Table 2-2: AC Electrical Characteristics. Reorganized figures in Input/Output Circuits and Typical Performance Curves. Clarified tape and reel information in Ordering Information. Updated document format. Added 2,500pc reel, and removed leaded parts to section 7.2 Ordering Information. Modified format for output cable length jitter data in AC Electrical Characteristics. Rephrased RoHS compliance statement. Updated ‘Green’ references to RoHS Compliant.
10
151731
–
April 2009
9
151339
–
March 2009
8
142111
40438
September 2006 June 2005 April 2005
7 6
137165 136565
– –
Contents
Key Features ........................................................................................................................................................1 Applications.........................................................................................................................................................1 Description...........................................................................................................................................................1 Revision History .................................................................................................................................................2 1. Pin Out...............................................................................................................................................................3 1.1 GS1524 Pin Assignment .................................................................................................................3 1.2 GS1524 Pin Descriptions ................................................................................................................3 2. Electrical Characteristics ............................................................................................................................5 2.1 Absolute Maximum Ratings ..........................................................................................................5 2.2 DC Electrical Characteristics ........................................................................................................5 2.3 AC Electrical Characteristics ........................................................................................................6 3. Input/Output Circuits ..................................................................................................................................8 4. Typical Performance Curves .....................................................................................................................9 5. Detailed Description.................................................................................................................................. 13 5.1 Serial Digital Inputs ...................................................................................................................... 13 5.2 Cable Equalization ........................................................................................................................ 13 5.3 Programmable Mute Output & Cable Length Indicator .................................................... 14 5.4 Mute and Carrier Detect .............................................................................................................. 14 6. Application Information .......................................................................................................................... 15 6.1 PCB Layout ....................................................................................................................................... 15 6.2 Typical Application Circuit ........................................................................................................ 15 7. Package & Order Information ................................................................................................................ 16 7.1 Package Dimensions ..................................................................................................................... 16 7.2 Ordering Information ................................................................................................................... 16
GS1524 Multi-Rate SDI Adaptive Cable Equalizer Data Sheet 14976 - 11 August 2011
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1. Pin Out
1.1 GS1524 Pin Assignment
CLI VCC VEE SDI SDI VEE AGC+ AGC-
1 2 3 4 5 6 7 8 GS1524 16PIN SOIC TOP VIEW
16 15 14 13 12 11 10 9
CD/MUTE VCC VEE SDO SDO V
EE
MCLADJ BYPASS
Figure 1-1: 16-pin SOIC
1.2 GS1524 Pin Descriptions
Table 1-1: Pin Descriptions
Pin Number
1
Name
CLI
Type
ANALOG OUTPUT
Description
CABLE LENGTH INDICATOR. An analog voltage proportional to the cable length connected to the Serial digital input. Note: CLI is recommended for data rates up to 360Mb/s only.
4,5 7,8
SDI, SDI AGC+, AGCBYPASS
INPUT PASSIVE INPUT
Serial digital differential input. External AGC capacitor. Should be set to IµF
9
LOGIC INPUT
Forces the Equalizing and DC RESTORE stages into bypass mode when HIGH. No equalization occurs in this mode. MAXIMUM CABLE LENGTH ADJUST. Adjusts the approximate maximum amount of cable to be equalized (from 0m to the maximum cable length). The output is muted (latched to the last state) when the maximum cable length is achieved. Note: MCLADJ is recommended for data rates up to 360Mb/s
10
MCLADJ
ANALOG INPUT
12, 13
SDO, SDO
PECL OUTPUT
Equalized serial digital differential output.
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Table 1-1: Pin Descriptions (Continued)
Pin Number
16
Name
CD/MUTE
Type
BIDIRECTIONAL
Description
MUTE INDICATOR-CONTROL/CARRIER DETECT. OUTPUT: the output voltage drops to below 1.2V when the carrier is present and the data outputs are active. INPUT: if the CD/MUTE pin is tied to ground, the data output will never mute and the MCLADJ setting is overwritten. If the CD/MUTE pin is tied to VCC, the data outputs will always mute and the MCLADJ setting is overwritten. Note: CD/MUTE is not functional in BYPASS mode.
3, 6, 11, 14 2, 15
VEE VCC
POWER POWER
Most negative power supply connection. Connect to ground. Most positive power supply connection. Connect to +3.3V.
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2. Electrical Characteristics
2.1 Absolute Maximum Ratings
Parameter
Supply Voltage Input ESD Voltage Storage Temperature Range Input Voltage Range (any input) Operating Temperature Range Power Dissipation Lead Temperature (soldering, 10 sec.)
Value
-0.5V to +3.6VDC 500V -50°C< Ts < 125°C -0.3 to (VCC + 0.3)V 0°C to 70°C 300mW 260°C
2.2 DC Electrical Characteristics
Table 2-1: DC Electrical Characteristics
VCC = 3.3V ±5%, TA = 0°C to 70°C, unless otherwise shown
Parameter
Supply Voltage Power Consumption Supply Current Output Common Mode Voltage Input Common Mode Voltage CLI DC Voltage (0m) CLI DC Voltage (no signal) Floating MCLADJ DC Voltage MCLADJ Range CD/Mute Output Voltage
Conditions
– TA=25°C TA=25°C TA=25°C TA=25°C TA=25°C TA=25°C TA=25°C TA=25°C Carrier not present Carrier present
Symbol
VCC PD ΙS VCMOUT VCMIN – – – – VCD/Mute(OH) VCD/Mute(OL) VCD/Mute
Min
3.135 – – – – – – – – 2.6 – 3.0
Typ
3.3 265 80 VCC - ΔVSDO/2 1.75 2.5 1.9 1.3 0.69 – – –
Max
3.465 – – – – – – – – – 1.2 –
Units
V mW mA V V V V V V V
Notes
± 5% – – – – – – – – – –
CD/Mute Input Voltage Required to Force Outputs to Mute CD/Mute Input Voltage Required to Force Active
Min to Mute
V
–
Max to Activate
VCD/Mute
–
–
2.0
V
–
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2.3 AC Electrical Characteristics
Table 2-2: AC Electrical Characteristics
VCC = 3.3V ±5%, TA = 0°C to 70°C, unless otherwise shown
Parameter
Serial input data rate Input Voltage Swing
Conditions
– TA =25°C, differential 50Ω load, TA =25°C, differential
Symbol
– ΔVSDI ΔVSDO
Min
143 720
Typ
– 800
Max
1485 950
Units
Mb/s mVp-p mVp-p
Notes
– 0m cable length –
Output Voltage Swing
–
750
–
Output Jitter for Various Cable Lengths and Data Rates
270Mb/s Belden 1694A: 0-350m Belden 8281: 0-280m 1.485Gb/s Belden 1694A: 0-140m Belden 8281: 0-100m
–
–
0.2
–
UI
2,4
–
–
0.25
–
UI
2,4
Output Rise/Fall time Mismatch in rise/fall time Duty cycle distortion Overshoot Input Return Loss Input Resistance Input Capacitance Output Resistance
20% - 80% – – – – single ended single ended single ended
– – – – – – – –
– – – – 15 – – –
80 – – – – 1.64 1 50
220 30 30 10 – – – –
ps ps ps % dB kΩ pF Ω
– – – – 1 – – –
NOTES: 1. Tested on CB1524 board from 5MHz to 2GHz. 2. All parts production tested. In order to guarantee jitter over the full range of specification (VCC = 3.3V ±5%, TA = 0°C to 70°C, and 720-880mV launch swing from the SDI cable driver) the recommended applications circuit must be used. 3. Based on characterization data using the recommended applications circuit, at VCC = 3.3V, TA = 25°C, and 800mV launch swing from the SDI cable driver. 4. Equalizer Pathological test signal is used.
GigaBERT 1400 EXT. CLOCK CLOCK OUT DATA OUT 50/75
8281 or 1694A CABLE
IN GS1524 TEST BOARD
OUT OUT
CH. 1 CH. 2 TDS 820 EXT. TRIGGER
EXT. CLOCK 1.485GHz/270MHz
Figure 2-1: Test Circuit
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3. Input/Output Circuits
All resistors in ohms, all capacitors in farads, unless otherwise shown.
VCC 10k 3k SDI RC 3.6k 3.6k + CLI 3k SDI 10k
Figure 3-1: Input Equivalent Circuit
Figure 3-2: CLI Output Circuit
VCC
VCC
12k + MCLADJ OUTPUT STAGE MUTE CONTROL
7.5k
CD/MUTE
150µ
Figure 3-3: MCLADJ Equivalent Circuit
Figure 3-4: CD/Mute Circuit
50
50 Bypass Internal Reference
SDO
SDO
Figure 3-5: Output Circuit
Figure 3-6: Bypass Circuit
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4. Typical Performance Curves
(unless otherwise shown, VCC = 3.3V, TA = 25°C)
350
POWER CONSUMPTION (mW)
300 250 200 150 100 50 0
0
20
40
60
80
TEMPERATURE (°C)
Figure 4-1: Power Consumption
160 140 120
JITTER (ps)
100 80 60 40 20 0
0
50
100
150
200
CABLE LENGTH (m)
Figure 4-2: Typical Peak to Peak Jitter, PRN 223-1, Belden 1694A, 1.485 Gb/s
1100 900 700
JITTER (ps)
500 400 300 200 100 0
0
100
200
300
400
CABLE LENGTH (m)
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Figure 4-3: Typical Peak to Peak Jitter, PRN 223-1, Belden 1694A, 270Mb/s
500
OUTPUT SIGNAL SWING (mV)
400
300
200
100
0 0 20 40 60 80
TEMPERATURE (°C)
Figure 4-4: Output Signal Swing, p-p, Single Ended
3.5
VOLTAGE (V)
3.0
2.5
2.0
0
50
100
150
200
250
300
CABLE LENGTH (m)
Figure 4-5: MCLADJ Input Voltage vs. 1694A Cable Length, 270Mb/s
3.5
CLI VOLTAGE (V)
3
2.5
2
1.5 0 50 100 150 200 250 300
CABLE LENGTH (m)
Figure 4-6: CLI Voltage vs. Belden 8281 Cable Length, 270Mb/s
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Tek Running: Normal
Figure 4-7: Input 100m (Belden 8281), 1.485Gb/s
Figure 4-8: Output 100m (Belden 8281), 1.485Gb/s
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Figure 4-9: Input 280m (Belden 8281), 270Mb/s
Figure 4-10: Output 280m (Belden 8281), 270Mb/s
0
-10
-20
-30
-40
-50 0.05 GHz
1 GHz
2 GHz
Figure 4-11: Input Return Loss using CB1524 Board
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5. Detailed Description
The GS1524 is a high speed bipolar IC designed to equalize both HD and SD serial digital signals. The device can typically equalize greater than 140 meters of Belden 1694A cable at 1.485Gb/s and 350m at 270Mb/s. Powered from a single +3.3V or -3.3V power supply, the device consumes approximately 265mW of power.
5.1 Serial Digital Inputs
The serial data signal may be connected to the input pins (SDI/SDI) in either a differential or single ended configuration. AC coupling of the inputs is recommended, as the SDI and SDI inputs are internally biased at approximately 1.8V.
5.2 Cable Equalization
The input signal passes through a variable gain equalizing stage whose frequency response closely matches the inverse of the cable loss characteristic. In addition, the variation of the frequency response with control voltage imitates the variation of the inverse cable loss characteristic with cable length. The edge energy of the equalized signal is monitored by a detector circuit which produces an error signal corresponding to the difference between the desired edge energy and the actual edge energy. This error signal is integrated by both an internal and an external AGC filter capacitor providing a steady control voltage for the gain stage. As the frequency response of the gain stage is automatically varied by the application of negative feedback, the edge energy of the equalized signal is kept at a constant level which is representative of the original edge energy at the transmitter. The equalized signal is also DC restored, effectively restoring the logic threshold of the equalized signal to its correct level independent of shifts due to AC coupling. The digital output signals have a nominal voltage of 750mVpp differential, or 375mVpp single ended when terminated with 50Ω as shown in Figure 5-1.
+187.5mV VCM = 2.925V typical SDO -187.5mV
SDO 50 50
+187.5mV VCM = 2.925V typical -187.5mV
Figure 5-1: Typical Output Voltage Levels
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5.3 Programmable Mute Output & Cable Length Indicator
For SMPTE 259M inputs, the GS1524 incorporates an analog cable length indicator (CLI) output and a programmable threshold output mute (MCLADJ). The voltage output of CLI pin is an approximation of the amount of cable present at the GS1524 input for data rates up to 360Mb/s. The CLI voltage versus cable length (signal strength) is shown in Figure 4-6. With 0m of cable, 800mV input signal levels and at 270Mb/s, the CLI output voltage is approximately 2.5V. As the cable length increases, the CLI voltage decreases providing an approximate correlation between the CLI voltage and cable length. In applications where there are multiple input channels using the GS1524, it is advantageous to have a programmable mute output to avoid signal crosstalk. The output of the GS1524 can be muted when the input signal decreases below a selectable input level. The voltage applied to the MCLADJ pin vs. input cable length is shown in Figure 4-5. For consistent accurate results this may need to be calibrated for each device. The MCLADJ pin may be left unconnected for applications where output muting is not required. This feature has been designed for use in applications such as routers where signal crosstalk and circuit noise cause the equalizer to output erroneous data when no input signal is present. The use of a Carrier Detect function with a fixed internal reference does not solve this problem since the signal to noise ratio on the circuit board could be significantly less than the default signal detection level set by the on chip reference. NOTE: MCLADJ and CLI are only recommended for data rates up to 360Mb/s.
5.4 Mute and Carrier Detect
In addition, a multi-function CD/MUTE pin allows control of the GS1524 MUTE functionality for both SD and HD inputs. The CD/MUTE pin is a multi-function bidirectional pin that provides the following functions: Applying a HIGH INPUT to the CD/MUTE pin forces the GS1524 outputs to a muted condition. See the Table 2-1: DC Electrical Characteristics for voltage levels. In this condition the outputs will be latched to the last logic level present at the output to avoid signal crosstalk. Applying a LOW INPUT to the CD/MUTE pin will force the GS1524 outputs to remain active regardless of the length of input cable and the voltage applied to the MCLADJ pin. See the Table 2-1: DC Electrical Characteristics for voltage levels. When used as an OUTPUT, the CD/MUTE pin will provide an indication of the output mute status. The CD/MUTE voltage will fall to below 1.2V when the carrier is present and the data outputs are active. Note: The CD/MUTE pin is not functional in BYPASS mode.
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6. Application Information
6.1 PCB Layout
Special attention must be paid to component layout when designing serial digital interfaces for HDTV. A FR-4 dielectric can be used, however, controlled impedance transmission lines are required for PCB traces longer than approximately 1cm. Note the following PCB artwork features used to optimize performance: PCB trace width for HD rate signals is closely matched to SMT component width to minimize reflections due to change in trace impedance. The PCB ground plane is removed under the GS1524 input components to minimize parasitic capacitance. The PCB ground plane is removed under the GS1524 output components to minimize parasitic capacitance. High-speed traces are curved to minimize impedance changes.
6.2 Typical Application Circuit
CLI CD/MUTE VCC VCC
10n BNC 6.4n 1u 75 1u 1 2 3 4 5 6 7 8 75 37.4 1u + CLI VCC VEE SDI SDI VEE AGC+ AGCGS1524 CD/MUTE VCC VEE SDO SDO VEE MCLADJ BYPASS 16 15 14 13 12 11 10 9 10n + 4u7 SDO + SDO 4u7
MCLADJ
NOTE: All resistors in Ohms, capacitors in Farads, and inductors in Henrys, unless otherwise noted.
BYPASS
Figure 6-1: GS1524 Typical Application Circuit
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7. Package & Order Information
7.1 Package Dimensions
* CONTROLLING DIMENSION: MM MILLIMETER Symbol MIN. A A1 A2 b c D E e H L L1 Y 0° 5.80 0.40 1.35 0.10 1.30 0.33 0.19 9.80 3.80 9.91 3.90 1.27 6.00 0.64 1.07 0.10 8° 0° 6.20 1.27 0.228 0.016 NOM. 1.63 0.15 1.40 0.41 MAX. 1.75 0.25 1.50 0.51 0.25 10.01 4.00 MIN. 0.053 0.004 0.051 0.013 0.007 0.386 0.150 0.390 0.154 0.50 0.236 0.025 0.042 0.004 8° 0.244 0.050 NOM. 0.064 0.006 0.055 0.016 MAX. 0.069 0.010 0.059 0.020 0.010 0.394 0.157 INCH
Figure 7-1: 16-pin SOIC
7.2 Ordering Information
Part Number
GS1524-CKDE3 GS1524-CTDE3 GS1524-CTDE3Z
Package
16 pin SOIC 16 pin SOIC Tape (250pcs) 16 pin SOIC Tape (2,500pcs)
Temperature
0°C to 70°C 0°C to 70°C 0°C to 70°C
Pb-Free and RoHS Compliant
Yes Yes Yes
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DOCUMENT IDENTIFICATION
CAUTION
ELECTROSTATIC SENSITIVE DEVICES DO NOT OPEN PACKAGES OR HANDLE EXCEPT AT A STATIC-FREE WORKSTATION
DATA SHEET
The product is in production. Gennum reserves the right to make changes at any time to improve reliability, function or design, in order to provide the best product possible.
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Gennum Corporation assumes no liability for any errors or omissions in this document, or for the use of the circuits or devices described herein. The sale of the circuit or device described herein does not imply any patent license, and Gennum makes no representation that the circuit or device is free from patent infringement. All other trademarks mentioned are the properties of their respective owners. GENNUM and the Gennum logo are registered trademarks of Gennum Corporation. © Copyright 2001 Gennum Corporation. All rights reserved. www.gennum.com
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