GS2975ACNTE3Z

GS2975A HD-LINX® III Multi-Rate SDI Automatic Reclocker with Dual Differential Outputs Features • • • • • • • • • • • • • • • • • SMPTE 424M, 292M, and 259M-C compliant Supports data rates of 270, 1483.5, 1485, 2967, 2970Mb/s Supports DVB-ASI at 270Mb/s Pb-free and RoHS Compliant Auto and Manual Modes for rate selection Standards indication in Auto Mode 4:1 input multiplexer patented technology Choice of dual reclocked data outputs or one data output and one recovered clock output Footprint and drop-in compatible with existing GS2975 designs Loss of Signal (LOS) Output Lock Detect Output On-chip Input and Output Termination Differential 50Ω inputs and outputs Mute, Bypass and Autobypass functions SD/HD indication output to control GS2978 Dual Slew-Rate Cable Driver Single 3.3V power supply Operating temperature range: 0°C to 70°C Description The GS2975A is a Multi-Rate Serial Digital Reclocker designed to automatically recover the embedded clock from a digital video signal and re-time the incoming video data. The GS2975A Serial Digital Reclocker will recover the embedded clock signal and re-time the data from a SMPTE 424M, SMPTE 292M, or SMPTE 259M-C compliant digital video signal. The GS2975A removes the high frequency jitter components from the bit-serial stream. Input termination is on-chip for seamless matching to 50Ω transmission lines. The GS2975A can operate in either auto or manual rate selection mode. In Auto mode the device will automatically detect and lock onto incoming SMPTE SDI data signals at any supported rate. For single rate data systems, the GS2975A can be configured to operate in Manual mode. In both modes, the device requires only one external crystal to set the VCO frequency when not locked and provides adjustment free operation. In systems which require passing of non-SMPTE data rates, the GS2975A can be configured to either automatically or manually enter a bypass mode in order to pass the signal without reclocking. The GS2975A offers a choice of dual reclocked data outputs or one data output and one recovered clock output. The device is footprint and drop-in compatible with existing GS2975 designs, with no additional application changes required. The GS2975A is Pb-free, and the encapsulation compound does not contain halogenated flame retardant. This component and all homogeneous sub-components are RoHS compliant. Applications • SMPTE 424M, SMPTE 292M and SMPTE 259M-C Serial Digital Interfaces GS2975A HD-LINX® III Multi-Rate SDI Automatic Reclocker with Dual Differential Outputs Data Sheet 41487 - 4 April 2009 www.gennum.com 1 of 27 Functional Block Diagram XTAL+ XTALXTAL XTAL OUT+ OUTLF+ LFKBB XTAL OSC BUFFER RE-TIMER M U X DATA BUFFER DDO 0 DDO_MUTE RCO_MUTE DDI 0 PHASE FREQUENCY DETECTOR D A T A M U X DIVIDER M U X CHARGE PUMP M U X CLOCK BUFFER RCO/DDO1 VCO DDI 1 PHASE DETECTOR DIVIDER DATA/CLOCK DDI 2 DDI 3 DDI_SEL[1:0] CONTROL LOGIC BYPASS LOGIC SS[2:0] AUTO/MAN SD/HD LOCKED LOS AUTOBYPASS BYPASS GS2975A Functional Block Diagram Revision History Version 4 ECR 151358 PCN – Date April 2009 Changes and/or Modifications Added 2.5k reel option to section 6.6 Ordering Information. Changed the maximum input swing value from 800mV to 1100mV in Table 2-2: AC Electrical Characteristics. Removed references to GND_DRV in Section 1.1 GS2975A Pin Assignment and Table 1-1: Pin Descriptions. Typo: Functional Block Diagram on page 2. Typo: Pin 64 in Table 1-1& TAC Figure 5-1 on page 22, Pins 38/40 & 44/46 in Table 1-1. Converting to Data Sheet. Removed ‘Proprietary and Confidential’ footer. Updated AC Electrical Characteristics table. Added junction - board thermal resistance parameter to 6.3 Packaging Data. Added section 6.4 Marking Diagram. 3 150068 – June 2008 2 147068 – − August 2007 1 146316 July 2007 0 143947 43428 February 2007 GS2975A HD-LINX® III Multi-Rate SDI Automatic Reclocker with Dual Differential Outputs Data Sheet 41487 - 4 April 2009 2 of 27 Contents Features.................................................................................................................................................................1 Applications.........................................................................................................................................................1 Description...........................................................................................................................................................1 Functional Block Diagram ..............................................................................................................................2 Revision History .................................................................................................................................................2 1. Pin Out...............................................................................................................................................................4 1.1 GS2975A Pin Assignment ..............................................................................................................4 1.2 GS2975A Pin Descriptions .............................................................................................................5 2. Electrical Characteristics ............................................................................................................................8 2.1 Absolute Maximum Ratings ..........................................................................................................8 2.2 DC Electrical Characteristics ........................................................................................................8 2.3 AC Electrical Characteristics ..................................................................................................... 10 3. Input/Output Circuits ............................................................................................................................... 13 4. Detailed Description.................................................................................................................................. 16 4.1 Slew Rate Phase Lock Loop (S-PLL) ......................................................................................... 16 4.2 VCO .................................................................................................................................................... 17 4.3 Charge Pump ................................................................................................................................... 17 4.4 Frequency Acquisition Loop — The Phase-Frequency Detector .................................. 18 4.5 Phase Acquisition Loop — The Phase Detector ................................................................... 18 4.6 4:1 Input Mux .................................................................................................................................. 19 4.7 Automatic and Manual Data Rate Selection ......................................................................... 19 4.8 Bypass Mode ................................................................................................................................... 20 4.9 DVB-ASI Operation ....................................................................................................................... 20 4.10 Lock and LOS ................................................................................................................................ 20 4.11 Output Drivers and Output Mute .......................................................................................... 21 5. Typical Application Circuit ..................................................................................................................... 22 6. Package & Ordering Information .......................................................................................................... 23 6.1 Package Dimensions ..................................................................................................................... 23 6.2 Recommended PCB Footprint ................................................................................................... 24 6.3 Packaging Data ............................................................................................................................... 25 6.4 Marking Diagram ........................................................................................................................... 25 6.5 Solder Reflow Profiles .................................................................................................................. 26 6.6 Ordering Information ................................................................................................................... 26 GS2975A HD-LINX® III Multi-Rate SDI Automatic Reclocker with Dual Differential Outputs Data Sheet 41487 - 4 April 2009 3 of 27 1. Pin Out 1.1 GS2975A Pin Assignment XTAL_OUTXTAL_OUT+ VCC_CP VEE_CP XTAL+ XTAL- DDI0 DDI0_VTT DDI0 GND DDI1 DDI1_VTT DDI1 GND DDI2 DDI2_VTT – DDI2 GND DDI3 DDI3_VTT DDI3 GND 1 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 GND LF+ NC LF- NC NC NC NC NC NC VEE_DDO VCC_DDO DDO0 RSV DDO0 GND VEE_RCO VCC_RCO RCO/DDO1 RSV RCO/DDO1 DATA/CLOCK DDO_MUTE RCO_MUTE KBB SD/HD – 2 3 4 5 6 7 8 9 10 11 12 13 14 – GS2975A 64-pin QFN (Top View) 42 41 40 39 38 37 36 35 – 34 15 16 33 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 AUTO/MAN VEE_VCO AUTOBYPASS VCC_VCO DDI_SEL0 DDI_SEL1 BYPASS Ground Pad (bottom of package) Figure 1-1: 64-Pin QFN GS2975A HD-LINX® III Multi-Rate SDI Automatic Reclocker with Dual Differential Outputs Data Sheet 41487 - 4 April 2009 LOCKED LOS VCC_DIG VEE_DIG GND SS0 SS1 SS2 NC 4 of 27 1.2 GS2975A Pin Descriptions Table 1-1: Pin Descriptions Pin Number 1, 3 2 Name DDI0, DDI0 DDI0_VTT Type Input Passive Description Serial digital differential input 0. Center tap of two 50Ω on-chip termination resistors between DDI0 and DDI0. Recommended connect to GND. 4, 8, 12,16, 32, 43, 49 5, 7 6 GND Passive DDI1,DDI1 DDI1_VTT Input Passive Serial digital differential input 1. Center tap of two 50Ω on-chip termination resistors between DDI1 and DDI1. Serial digital differential input 2. Center tap of two 50Ω on-chip termination resistors between DDI2 and DDI2. Serial digital differential input 3. Center tap of two 50Ω on-chip termination resistors between DDI3 and DDI3. Serial digital input select. DDI_SEL1 0 0 1 1 DDI_SEL0 0 1 0 1 INPUT SELECTED DDI0 DDI1 DDI2 DDI3 9, 11 10 DDI2, DDI2 DDI2_VTT Input Passive 13, 15 14 DDI3, DDI3 DDI3_VTT Input Passive 17, 18 DDI_SEL[1:0] Logic Input 19 BYPASS Logic Input Bypass the reclocker stage. When BYPASS is HIGH, it overwrites the AUTOBYPASS setting. 20 AUTOBYPASS Logic Input Automatically bypasses the reclocker stage when the PLL is not locked This pin is ignored when BYPASS is HIGH. 21 AUTO/MAN Logic Input Auto/Manual select. When set HIGH, the standard is automatically detected from the input data rate. When set LOW, the user must program the input standard using the SS[2:0] pins. 22 VCC_VCO Power Most positive power supply connection for the internal VCO section. Connect to 3.3V. 23 VEE_VCO Power Most negative power supply connection for the internal VCO section. Connect to GND. GS2975A HD-LINX® III Multi-Rate SDI Automatic Reclocker with Dual Differential Outputs Data Sheet 41487 - 4 April 2009 5 of 27 Table 1-1: Pin Descriptions (Continued) Pin Number 24, 25, 26 Name SS[0:2] Type Bi-directional Description When AUTO/MAN is HIGH, SS[0:2] are outputs, displaying the data rate to which the PLL has locked. When AUTO/MAN is LOW, SS[0:2] are inputs, forcing the PLL to lock only to a selected data rate . SS2 SS1 SS0 DATA RATE SELECTED/FORCED (Mb/s) 270 1483.5/1485 2967/2970 0 1 1 27 28 NC LOCKED No Connect Output 1 0 1 0 1 0 Not connected internally. Lock Detect. This pin is set HIGH by the device when the PLL is locked. 29 LOS Output Loss of Signal. Set HIGH when there are no transitions on the active DDI[3:0] input. 30 VCC_DIG Power Most positive power supply connection for the internal glue logic. Connect to 3.3V. 31 VEE_DIG Power Most negative power supply connection for the internal glue logic. Connect to GND. 33 SD/HD Output This signal will be set LOW by the device when the reclocker has locked to 2.97Gb/s (2.967Gb/s) or 1.485Gb/s (1.4835Gb/s), or when a non-SMPTE standard is applied (i.e. the device is not locked). It will be set HIGH when the reclocker has locked to 270Mbps. 34 35 KBB RCO_MUTE Analog Input Power Controls the loop bandwidth of the PLL. Serial clock or secondary data output mute. Assert LOW for reduced power consumption, see 2.2 DC Electrical Characteristics. When RCO_MUTE = LOW, the RCO/DDO1 output is powered down. When RCO_MUTE = HIGH, the RCO/DDO1 output is active. NOTE: This is not a logic input pin. GS2975A HD-LINX® III Multi-Rate SDI Automatic Reclocker with Dual Differential Outputs Data Sheet 41487 - 4 April 2009 6 of 27 Table 1-1: Pin Descriptions (Continued) Pin Number 36 Name DDO_MUTE Type Logic Input Description Mutes the DDO0 and/or RCO/DDO1 outputs. DDO_MUTE 1 1 0 0 1 0 RCO_MUTE 1 1 1 1 0 0 DATA/CLOCK 0 1 0 1 X X DDO0 DATA DATA MUTE MUTE DATA MUTE RCO/DDO1 CLOCK DATA CLOCK MUTE Power down Power down NOTE: MUTE = Outputs latched at previous data bit. Power down = Outputs pulled to Vcc through 50Ω resistor. 37 DATA/CLOCK Logic Input Data/Clock select. When set HIGH, the RCO/DDO1 pin will output a copy of the serial digital output (DDO0). When set LOW, the RCO/DDO1 pin will output a re-timed clock (RCO). 38, 40 RCO/DDO1, RCO/DDO1 Output Serial clock or secondary data output. When RCO_MUTE is connected to VCC, the serial digital differential clock or secondary data output will be presented. 39, 45 41 RSV VCC_RCO Reserved Power Do not connect. Most positive power supply connection for the RCO/DDO1 and RCO/DDO1 output driver. Connect to 3.3V. 42 VEE_RCO Power Most negative power supply connection for the RCO/DDO1 and RCO/DDO1 output driver. Connect to GND. 44, 46 47 DDO0, DDO0 VCC_DDO Output Power Differential Serial Digital Outputs. Most positive power supply connection for the DDO0/DDO0 output driver. Connect to 3.3V. 48 VEE_DDO Power Most negative power supply connection for the DDO0/DDO0 output driver. Connect to GND. 50, 51 XTAL_OUT+, XTAL_OUTXTAL+, XTAL- Output Differential outputs of the reference oscillator used for monitoring or test purposes. Reference crystal input. Connect to the GO1535 as shown in the Typical Application Circuit on page 22. Not connected internally. Most negative power supply connection for the internal charge pump. Connect to GND. 52, 53 Input 54 - 59 60 NC VEE_CP No Connect Power GS2975A HD-LINX® III Multi-Rate SDI Automatic Reclocker with Dual Differential Outputs Data Sheet 41487 - 4 April 2009 7 of 27 Table 1-1: Pin Descriptions (Continued) Pin Number 61 Name VCC_CP Type Power Description Most positive power supply connection for the internal charge pump. Connect to 3.3V. 62, 63 LF+, LF- Passive Loop filter capacitor connection. Connect as shown in the Typical Application Circuit on page 22. Not connected internally. Recommended connect to GND. Ground pad on bottom of package. Solder to main ground plane following recommendations under Recommended PCB Footprint on page 24 64 – NC Center Pad No Connect – 2. Electrical Characteristics 2.1 Absolute Maximum Ratings Parameter Supply Voltage Range Input Voltage Range Operating Temperature Range Storage Temperature Range Input ESD Voltage Solder Reflow Temperature Value -0.5V to +3.6 VDC Vee - 0.5V to Vcc + 0.5V -20°C to 85°C -50°C < Ts < 125°C 4kV HBM, 100V MM 260°C NOTE: Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions or at any other condition beyond those indicated in the AC/DC Electrical Characteristic sections is not implied. 2.2 DC Electrical Characteristics Table 2-1: DC Electrical Characteristics VCC = 3.3V ±5%, TA = 0°C to 70°C, unless otherwise shown. Typical values: VCC = 3.3V and TA =25°C Parameter Supply Voltage Supply Current Symbol VCC ICC ICC Conditions Operating Range RCO/DD01 enabled RCO/DDO1 disabled Min 3.135 – – Typ 3.3 142 123 Max 3.465 170 152 Units V mA mA GS2975A HD-LINX® III Multi-Rate SDI Automatic Reclocker with Dual Differential Outputs Data Sheet 41487 - 4 April 2009 8 of 27 Table 2-1: DC Electrical Characteristics (Continued) VCC = 3.3V ±5%, TA = 0°C to 70°C, unless otherwise shown. Typical values: VCC = 3.3V and TA =25°C Parameter Power Consumption Symbol – – Conditions RCO/DD01 enabled RCO/DD01 disabled High Low IOH = -2mA IOL = 2mA High Low IOH = -2mA IOL = 2mA High Low I = -1.5mA Common Mode Min – – 2.0 – 2.4 – 2.0 – 2.4 – – – VCC - 0.165 1.65 + (VSID/2) – Typ 468 404 – – – – – – – – VCC - 0.075 VCC - 0.300 VCC – Max 590 528 – 0.8 – 0.4 – 0.8 – 0.4 – – VCC + 0.165 VCC (VSID/2) – Units mW mW V V V V V V V V V V V V Logic Inputs DDI_SEL[1:0], BYPASS, AUTOBYPASS, AUTO/MAN, ASI/177, DDO_MUTE Logic Outputs SD/HD, LOCKED, LOS Bi-Directional Pins (Manual Mode) SS[2:0], AUTO/MAN = 0 Bi-Directional Pins (Auto Mode) SS[2:0], AUTO/MAN = 1 XTAL_OUT+, XTAL_OUT- VIH VIL VOH VOL VIH VIL VOH VOL VOH VOL RCO_MUTE Serial Input Voltage – – Serial Output Voltage DDO0/DDO0, RCO/DDO1 / RCO/DDO1 – Common Mode VCC - (VOD/2) V GS2975A HD-LINX® III Multi-Rate SDI Automatic Reclocker with Dual Differential Outputs Data Sheet 41487 - 4 April 2009 9 of 27 2.3 AC Electrical Characteristics Table 2-2: AC Electrical Characteristics VCC = 3.3V ±5%, TA = 0°C to 70°C, unless otherwise shown. Typical values: VCC = 3.3V and TA =25°C Parameter Serial Input Data Rate Serial Input Jitter Tolerance Symbol – – Conditions – Worst case modulation (e.g. square wave modulation) 270, 1485, 2970 Mb/s Min 270 0.8 Typ – – Max 2970 – Units Mb/s UI Notes – – PLL Lock Time - Asynchronous PLL Lock Time - Synchronous tALOCK t SLOCK – KBB = Float, CLF=47nF SD/HD = 0 KBB = Float, CLF=47nF SD/HD = 1 – – 1.5 0.5 10 4 ms μs μs – – – 5 20 – Serial Output Rise/Fall Time SDO0 and RCO/DDO1 (20% 80%) Serial Digital Input Signal Swing trSDO,trRCO tfSDO,tfRCO VSID 50Ω load (on chip) 50Ω load (on chip) Differential with internal 100Ω input termination See Figure 2-1 – – 100 110 110 – – – 1100 ps ps mVp-p – – – Serial Digital Output Signal Swing DDO0 and RCO/DDO1 DDO0 to DDO1 skew DDO0 to RCO skew VOD 100Ω load differential See Figure 300 450 600 mVp-p – DDskew DRskew – 2970 Mb/s, 1485 Mb/s 270 Mb/s – – – – – – – – – – 156 28 37 0.02 0.06 0.10 0.02 0.06 0.11 15 – – – 0.07 0.10 0.15 0.07 0.10 0.16 – ps ps ps UI UI UI UI UI UI ps 1 2 2 3 4 4 3 4 4 – Serial Output Jitter on DDO0 (RCO/DDO1 disabled) tOJ 270 Mb/s 1485 Mb/s 2970 Mb/s Serial Output Jitter on DDO0 and DDO1 (Both DDO0 and DDO1enabled) tOJ 270 Mb/s 1485 Mb/s 2970 Mb/s Additive Jitter tAJ Bypass mode, 2970 Mb/s DDO0 enabled Bypass mode, 2970 Mb/s DDO0 and DDO1 enabled – 20 – ps – GS2975A HD-LINX® III Multi-Rate SDI Automatic Reclocker with Dual Differential Outputs Data Sheet 41487 - 4 April 2009 10 of 27 Table 2-2: AC Electrical Characteristics (Continued) VCC = 3.3V ±5%, TA = 0°C to 70°C, unless otherwise shown. Typical values: VCC = 3.3V and TA =25°C Parameter Loop Bandwidth Symbol BWLOOP Conditions 2.97 Gb/s, KBB = VCC 2.97 Gb/s, KBB = FLOAT 2.97 Gb/s, KBB = GND,