GS9029

GENLINX ™II GS9029 Quad Output Serial Digital Video Cable Driver DATA SHEET FEATURES • SMPTE 259M compliant • four isolated outputs (two complimentary pairs), adjustable from 50mV-1000mV into 75Ω loads • operational from 143Mb/s to 540Mb/s and beyond • nominal 500ps rise/fall times • precise ±7.5% output amplitudes • 40% system power reduction over GS9007 • 75Ω on-chip input termination resistors • input hysteresis • operational down to 80mV input amplitude • superior output isolation • "Bus Through" expansion port for fan out requirements APPLICATIONS 4ƒsc, 4:2:2 and 4:4:4:4 serial digital video co-axial transmission interfaces from 143 to 540Mb/s; General purpose cable driving applications (co-axial cable or UTP). The GS9029 is packaged in a 16 pin narrow SOIC and operates from a single +5 or -5 volt supply. Typical system power consumption is 320mW which is 40% less than the GS9007. ORDERING INFORMATION PART NUMBER GS9029-CKD GS9029-CTD PACKAGE 16 pin SOIC Narrow 16 pin SOIC Tap TEMPERATURE 0°C to 70°C 0°C to 70°C DESCRIPTION The GS9029 is a second generation bipolar integrated circuit designed to drive four 75Ω co-axial cables. The GS9029 features two pairs of complementary outputs whose amplitude is controlled within ±7.5%. The output signal levels are also adjustable from 50mVp-p up to 1000mVp-p with little change in other performance parameters. The amplitude of the output stage is varied by adjusting the RSET resistor value. The patented current mode outputs ensure superior output return loss and minimal over shoot. The rise/fall time circuitry allows wide range operation and provides symmetrical balanced outputs to reject power supply noise. In addition high output isolation ensures that the cable driver outputs are not affected by the performance or status of other outputs. Operational with input amplitudes as low as 80mV, the GS9029 provides a robust serial interface. GS9029 RSET0 BANDGAP REFERENCE & BIASING CIRCUIT RSET1 SDI/T SDI/T 75 75 SDO0 SDO0 SDI SDI INPUT DIFFERENTIAL PAIR WITH HYSTERESIS OUTPUT STAGE & RISE/FALL TIME CONTROL CIRCUIT SDO1 SDO1 BLOCK DIAGRAM Revision Date: February 2000 GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com www.gennum.com Document No. 521 - 97 - 02 ABSOLUTE MAXIMUM RATINGS PARAMETER Supply Voltage (VS=VCC-VEE) Input Voltage Range (any input) Maximum Die Temperature VALUE 5.5V -0.3V to (VCC+0.3)V 125°C 0°C ≤ TA ≤ 70°C -65°C ≤ TS ≤ 150°C 260°C GS9029 Operating Temperature Range Storage Temperature Range Lead Temperature (soldering, 10 sec) DC ELECTRICAL CHARACTERISTICS VCC = 5V, VEE = 0V, TA = 0°C TO 70°C unless otherwise specified. Specifications assume 800mV output amplitude into 75Ω terminated line. PARAMETER Supply Voltage Power (system power) SYMBOL VCC PS ΙCC CONDITIONS Operating Range. Driving four 75Ω cables. RSET = 54.9Ω. Driving four 75Ω cables. RSET = 54.9Ω. MIN 4.75 - TYP 5.00 320 MAX 5.25 350 UNITS V mW TEST LEVEL 1 5 Supply Current - 64 70 mA 1 Common Mode Input Voltage Differential Input Voltage Common Mode Output Voltage Range Differential Output Voltage VCM_IN VDIFF VCM_OUT VOUT RSET = 54.9Ω RSET = 43.2Ω 2.4+(VDIFF/2) 80 - VCC-(VDIFF/2) 1000 V 6, 7 - mV 6, 7 - VCC-VOUT 800 1000 25 - V 5 740 925 - 860 1075 - mV mV mV 1 1 7 Input Hysteresis TEST LEVELS 1. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges. 2. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges using correlated test. 3. Production test at room temperature and nominal supply voltage. 4. QA sample test. 5. Calculated result based on Level 1,2, or 3. 6. Not tested. Guaranteed by design simulations. 7. Not tested. Based on characterization of nominal parts. 8. Not tested. Based on existing design/characterization data of similar product. 2 521 - 97 - 02 AC ELECTRICAL CHARACTERISTICS VCC = 5V, VEE = 0V, TA = 0°C TO 70°C unless otherwise specified. Specifications assume 800mV output amplitude into 75Ω terminated line. PARAMETER Serial Data Bit Rate Additive Jitter SYMBOL CONDITIONS MIN 143 TYP 25 25 500 50 5 50 17 MAX 540 700 100 100 - UNITS Mb/s ps p-p ps p-p ps ps % VOUT ps dB NOTES TEST LEVEL 1 270Mb/s 540Mb/s 400 - 1, 2 7 GS9029 Output Rise/Fall Times Rise/Fall Times Mismatch Overshoot Duty Cycle Distortion Output Return Loss NOTES tR, tF 20% - 80% 1 5 2 7 1 2 7 5MHz - 540MHz - 1. 6σ additive jitter measuring Pseudo random bit sequence (2 -1). 2. Measured with Gennum Evaluation Board (EB9029V1). TEST LEVELS 1. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges. 2. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges using correlated test. 3. Production test at room temperature and nominal supply voltage. 4. QA sample test. 5. Calculated result based on Level 1,2, or 3. 6. Not tested. Guaranteed by design simulations. 7. Not tested. Based on characterization of nominal parts. 8. Not tested. Based on existing design/characterization data of similar product. 23 3 521 - 97 - 02 PIN CONNECTIONS RSET1 VCC SDO1 SDO1 1 2 3 4 5 6 7 8 GS9029 TOP VIEW 16 15 14 13 12 11 10 9 RSET0 VEE SDO0 SDO0 NC NC SDI/T SDI/T GS9029 NC NC SDI SDI PIN DESCRIPTIONS NUMBER 1 2 3, 4 5,6,11,12 7, 8 9, 10 SYMBOL RSET1 VCC SDO1,SDO1 NC SDI,SDI SDI/T, SDI/T I I O TYPE I DESCRIPTION Amplitude setting resistor for SDO1, SDO1. Most positive supply voltage. Second differential serial output (inverse and true). No connect. Serial data inputs (inverse and true). Dual mode pin: a) “Bus Through” pins for serial data inputs when additional GS9029s are used on the same bus. b) Termination pins when using a single GS9029, or when the device is the last on an input bus. 13, 14 15 16 SDO0,SDO0 VEE RSET0 I O First differential serial output (true and inverse). Most negative supply voltage. Amplitude setting resistor for SDO0, SDO0. 4 521 - 97 - 02 TYPICAL PERFORMANCE CURVES (VS = 5V, TA = 25°C unless otherwise shown. Devices guard band tested to 70°C only.) 530 525 520 515 510 GS9029 TIME (ps) 505 500 495 490 485 480 0 10 20 30 40 50 60 70 80 TEMPERATURE (˚C) Fig. 1 Rise/Fall vs. Temperature Fig. 4 540Mb/s Eye Diagram 1.62 40 35 1.61 OUTPUT LEVEL (V) 30 JITTER p-p (ps) 1.60 25 360Mb/s 177Mb/s 143Mb/s 540Mb/s 270Mb/s 20 1.59 15 1.58 0 10 20 30 40 50 60 70 80 10 0 20 40 60 80 TEMPERATURE (˚C) TEMPERATURE (˚C) Fig. 2 Serial Data Output Level vs. Temperature Fig. 5 Peak to Peak Additive Jitter vs. Temperature Fig. 3 270Mb/s Eye Diagram 5 521 - 97 - 02 DETAILED DESCRIPTION INPUT INTERFACING OUTPUT INTERFACING SDI/SDI are high impedance differential inputs. Two conditions must be observed when interfacing to these inputs: Figure 8 illustrates the recommended interface for ac coupled outputs. GS9029 1. The input signal amplitude must be between 80mV and 1000mV. 2. The common mode voltage range must be as specified in the DC Characteristics Table (page 2). For 800mV input amplitude signals, this corresponds to a common mode voltage range between 2.8 and 4.6 volts. Figures 6 and 7 illustrate two methods of interfacing the GS9029 to the Gennum GS9024 (Cable Equalizer), GS9035 (Reclocker) or the GS9025 (Receiver). Figure 6 illustrates the simplest interface and is recommended when the trace lengths between the driver and the GS9029 are less than 0.5 in. + GS9029 VCC 10nF RT = R = ZO R RT + GS9028 RT L L R 1µF 1µF _ GS9029 Fig. 8 Interfaces for AC Coupled Outputs + _ 10nF _ VCC SDI/T SDI/T The termination resistor (RT) value should be equal to the characteristic impedance of the cable. Controlled impedance traces should be used for the outputs and the termination resistors should be placed near the GS9029. The inductor (L) and resistor (R) are used to optimize the output return loss and are PCB dependent. Typically, R equals the transmission line characteristic impedance and L is approximately 8.2nH. OUTPUT AMPLITUDE ADJUSTMENT Fig. 6 Interfaces using Internal SDI Terminations When trace lengths become longer than 0.5in. and data rates greater than 360Mb/s, electromagnetic reflections begin to affect signal integrity. To minimize reflections, controlled impedance traces and source and end terminations should be used as shown in Figure 7. Although terminations on both sides reduce the signal swing by a factor of two, the GS9029 is designed to meet this need with ultra low input amplitude requirements (as low as 80mV). VCC 10nF The GS9029 outputs are adjustable from as low as 50mV to as high as 1000 mV. The output amplitudes are set by the RSET0 and the RSET1 resistors respectively. The relationship between the approximate output amplitude (VOUT) and RSET is given by the equation below: 1.154 × ZO R SET = ---------------------------2 × VOUT where ZO is in ohms and VOUT is in volts. The minimum value of RSET is 43.2Ω. For 75Ω cable and 800mV output amplitudes, the value of RSET is 54.9Ω. Also, note that the above formula assumes that the transmission line is properly end terminated. 75 + _ 75 + GS9029 GS9028 _ SDI/T SDI/T 10nF Fig. 7 Interfaces using Internal SDI Terminations Connected to AC Ground The GS9029 can accept AC coupled input signals with no extra configuration required. 6 521 - 97 - 02 INPUT / OUTPUT CIRCUITS VCC GS9029 SDI SDI SDO SDO + SDI/T SDI/T RSET Fig. 9 Input Circuit (SDI, SDI, SDI/T, SDI/T) Fig. 10 Output Circuit (SDO1, SDO1, SDO0, SDO0) NOTES ON INPUT ARCHITECTURE The input pins of the GS9029 are configured so that two or three GS9029's can easily be connected to a single input bus as shown below. On-chip input termination resistors permit a proper termination by connecting pins 9 to 10 of the last device on the bus. If only one GS9029 is used, it should be connected as the last device in the diagram below. 1 1 Fig. 11 GS9029 Bussed Connections 7 521 - 97 - 02 TYPICAL APPLICATION CIRCUIT VCC VCC VCC 10n 10n 75 75 1 RSET1 16 RSET0 VEE SDO0 13 SDO1 SDO0 15 14 54.9 75 75 GS9029 54.9 1µ0 75 8.2nH 8.2nH 1µ0 75 10n 2 VCC 3 SDO1 4 5 NC 6 NC 7 75 8.2nH 8.2nH 75 1µ0 GS9029 NC NC 12 11 10 1µ0 SDI INPUT SDI 8 SDI SDI/T 9 SDI/T * 10n All resistors in ohms, all capacitors in farads, unless otherwise stated. 10nF capacitor is optional. * See note on input architecture. CAUTION ELECTROSTATIC SENSITIVE DEVICES DO NOT OPEN PACKAGES OR HANDLE EXCEPT AT A STATIC-FREE WORKSTATION DOCUMENT IDENTIFICATION DATA SHEET The product is in production. Gennum reserves the right to make changes at any time to improve reliability, function or design, in order to provide the best product possible. REVISION NOTES: Updated serial data bit rate values in Features and Description; Updated AC and DC Electrical Characteristics Tables; Removed Figure 5; Updated Typical Application Circuit. For the latest product information, visit www.gennum.com. GENNUM JAPAN CORPORATION C-101, Miyamae Village, 2-10-42 Miyamae, Suginami-ku Tokyo 168-0081, Japan Tel. +81 (03) 3334-7700 Fax. +81 (03) 3247-8839 GENNUM UK LIMITED 25 Long Garden Walk, Farnham, Surrey, England GU9 7HX Tel. +44 (0)1252 747 000 Fax +44 (0)1252 726 523 GENNUM CORPORATION MAILING ADDRESS: P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3 Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 SHIPPING ADDRESS: 970 Fraser Drive, Burlington, Ontario, Canada L7L 5P5 Gennum Corporation assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement. © Copyright January 1999 Gennum Corporation. All rights reserved. Printed in Canada. 521 - 97 - 02 8