G2053
Global Mixed-mode Technology
Dual H-Bridge Motor Driver
Features
General Description
Dual H-Bridge Motor Driver With Current Control
The G2053 provides a dual-bridge motor driver solution for toys, printers, and other mechatronic applications.
-
1 or 2 DC Motors or 1 Stepper Motor
Low On-Resistance: HS + LS = 1735mΩ
(Typical, 25°C)
Output Current Capability (at VM = 5V, 25°C)
- TSSOP-16 (FD) Package
–
0.7A RMS, 1A Peak per H-Bridge
–
1.4A RMS in Parallel Mode
- TQFN3X3-16 and TQFN4X4-16 Package
–
0.6A RMS, 1A Peak per H-Bridge
–
1.2A RMS in Parallel Mode
Wide Power Supply Voltage Range 2.7 to 10.8V
Integrated Current Regulation
Easy Pulse-Width-Modulation (PWM) Interface
1.6µA Low-Current Sleep Mode (at 5V)
TSSOP-16 (FD), TQFN3X3-16 and TQFN4X4-16
Package
ProtectionFeatures
- VM Undervoltage Lockout (UVLO)
- Overcurrent Protection (OCP)
- Thermal Shutdown (TSD)
- Fault Indication Pin (nFAULT)
The device has two H-bridges and can drive two DC
brushed motors, a bipolar stepper motor, solenoids, or
other inductive loads.
Each H-bridge output consists of a pair of N-channel
and P-channel MOSFETs, with circuitry that regulates
the winding current. With proper PCB design, each
H-bridge of the G2053 can drive up to 700mA RMS (or
DC) continuously, at 25°C with a VM supply of 5V. The
device can support peak currents of up to 1 A per
bridge. Current capability is reduced slightly at lower
VM voltages.
Internal shutdown functions with a fault output pin are
provided for overcurrent protection, short-circuit protection, UVLO, and overtemperature. A low-power
sleep mode is also provided.
Applications
Ordering Information
Point-of-Sale Printers
Video Security Cameras
Office Automation Machines
Gaming Machines
Robotics
Battery-Powered Toys
ORDER
NUMBER
MARKING
G2053FC1U
G2053R41U
G2053R81U
G2053
2053
2053
TEMP.
RANGE
-40°C to +85°C TSSOP-16 (FD)
-40°C to +85°C TQFN3X3-16
-40°C to +85°C TQFN4X4-16
Note: FC: TSSOP-16 (FD) R4: TQFN3X3-16
R8: TQFN4X4-16
1: Bonding Code
U : Tape & Reel
Green: Lead Free / Halogen Free
12
VM
BISEN
6
11
NC
BOUT1
7
10
BIN2
nFAULT
8
9
BIN1
TSSOP-16 (FD)
BOUT2
3
BISEN
4
AIN2
5
13
BOUT2
Thermal
Pad
8
GND
BIN2
13
Thermal
Pad
AIN1
2
4
nSLEEP
AOUT2
AOUT2
15
VINT
14
1
14
7
AISEN
3
6
AIN2
AISEN
BIN1
AOUT1
nFAULT
AIN1
15
AOUT1
16
2
5
1
BOUT1
nSLEEP
16
Pin Configuration
G2053
12
VINT
11
GND
10
VM
9
NC
G2053 TQFN3X3-16/TQFN4X4-16
Note: Recommend connecting the Thermal Pad to the Ground for excellent power dissipation.
Ver: 0.1
Jan 19, 2018
1
PACKAGE
(Green)
G2053
Global Mixed-mode Technology
Absolute Maximum Ratings
Thermal Resistance of Junction to Ambient, (θJC)
TSSOP-16 (FD). . . . . . . . . . . . . .. . . . . . . . . .TBD°C/W
TQFN3X3-16 . . . . . . . . . . . . . . .. . . . . . . . . .TBD°C/W
TQFN4X4-16 . . . . . . . . . . . . . . .. . . . . . . . . .TBD°C/W
Operating junction temperature (TJ) . . .-40°C to 150°C
Storage Temperature (Tstg) . . . . . . . . -65°C to 150°C
Reflow Temperature (soldering, 10sec) . . . . . . 260°C
ESD (HBM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±2KV
ESD (CDM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±1KV
Power supply (VM). . . . . . . . . .. . . . . . . . -0.3V to 11.8V
Internal regulator (VINT). . . . . . . . . . . . . .-0.3V to 3.8V
Control pins (AIN1, AIN2, BIN1, BIN2, nSLEEP,
nFAULT) . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Continuous phase node pins (AOUT1, AOUT2, BOUT1,
BOUT2). . . . . . . . . . . . . . . -0.3V to VM+0.5V
Pulsed 10µs phase node pins (AOUT1, AOUT2,
BOUT1, BOUT2). . . . . . . . . . . . . . . . . . . .-1V to VM+1V
Continuous shunt amplifier input pins (AISEN,
BISEN). . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.5V
Pulsed 10µs shunt amplifier input pins (AISEN,
BISEN). . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to +1V
Peak drive current (AOUT1, AOUT2, BOUT1, BOUT2,
AISEN, BISEN) . . . . . . . . . . . . . . . . Internally limited A
Thermal Resistance of Junction to Ambient, (θJA)
TSSOP-16 (FD). . . . . . . . . . . . . .. . . . . . . . . .TBD°C/W
TQFN3X3-16 . . . . . . . . . . . . . . .. . . . . . . . . .TBD°C/W
TQFN4X4-16 . . . . . . . . . . . . . . .. . . . . . . . . .TBD°C/W
Continuous Power Dissipation (TA = +25°C)
TSSOP-16 (FD). . . . . . . . . . . . . . . . . . . . . . . .TBDmW
TQFN3X3-16. . . . . . . . . . . . . . . . . . . . . . . . . .TBDmW
TQFN4X4-16. . . . . . . . . . . . . . . . . . . . . . . . . .TBDmW
Recommended Operating Conditions
Power supply voltage (VM)(1). . . . . . . . . . 2.7V to 10.8V
Logic level input voltage (VI). . . . . . . . . . . . .0V to 5.5V
Motor RMS current (IRMS)(2)
TSSOP-16 (FD). . . . . . . . . . . . . . . . . . . . . . .0 to 0.7A
TQFN3X3-16/TQFN4X4-16. . . . . . . . . . . . .0 to 0.6A
Applied PWM signal to AIN1, AIN2, BIN1, or BIN2
(fPWM) . . . . . . . . . . . . . . . . . . . . . . . . .0 to 200KHz
Operating ambient temperature (TA) . . .-40°C to 85°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(1) Note that when VM is below 5V, RDS(ON) increases and maximum output current is reduced.
(2)
Power dissipation and thermal limits must be observed.
Electrical Characteristics
(TA=25°C)
The device is not guaranteed to function outside its operating conditions. Parameters with MIN and/or MAX limits are 100%
tested at +25°C, unless otherwise specified.
PARAMETER
POWER SUPPLIES (VM, VINT)
VM operating voltage
VM operating supply current
VM sleep mode supply current
SYMBOL
CONDITIONS
VM
IVM
IVMQ
VM = 5V, xINx low, nSLEEP high
VM = 5V, nSLEEP low
Sleep time
tSLEEP nSLEEP low to sleep mode
Wake-up time
tWAKE
nSLEEP high to output transition
Turn-on time
tON
VM > VUVLO to output transition
Internal regulator voltage
VINT
VM > VUVLO to output transition
CONTROL INPUTS (AIN1, AIN2, BIN1, BIN2, nSLEEP)
xINx
Input logic low voltage
VIL
nSLEEP
xINx
Input logic high voltage
VIH
nSLEEP
Input logic hysteresis
VHYS
Input logic low current
Input logic high current
IIL
IIH
Pulldown resistance
RPD
Input deglitch time
Propagation delay INx to OUTx
tDEG
tPROP
VIN = 0V
VIN = 5V
xINx
nSLEEP
VIN = 5V
Ver: 0.1
Jan 19, 2018
2
MIN
TYP
MAX
UNIT
2.7
---
10.8
V
-----
1.7
1.6
3
2.7
mA
µA
------3
10
155
25
3.3
------3.6
µs
µs
µs
V
0
0
2
2.5
350
--------400
0.7
0.5
5.5
5.5
650
-1
--100
380
-----
----150
500
575
1.2
1
50
250
750
-----
V
V
mV
µA
µA
kΩ
ns
µs
G2053
Global Mixed-mode Technology
Electrical Characteristics (Continued)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
---
---
0.5
V
-1
---
1
µA
VM = 5V, I = 0.2A, TA = 25°C
---
817
---
VM = 2.7V, I = 0.2A, TA = 25°C
---
1140
---
VM = 5V, I = 0.2A, TA = 25°C
---
285
---
VM = 2.7V, I = 0.2A, TA = 25°C
---
382
---
-1
-------
--70
80
450
1
-------
µA
ns
ns
ns
160
---
200
20
240
---
mV
µs
-------
----90
2.6
2.7
---
mV
1
---
--2.3
-----
A
µs
--150
---
1.4
--20
-------
ms
°C
°C
CONTROL OUTPUTS (nFAULT)
Output logic low voltage
VOL
IO = 5mA
RPULLUP = 1kΩ to 5V
Output logic high leakage
IOH
MOTOR DRIVER OUTPUTS (AOUT1, AOUT2, BOUT1, BOUT2)
High-side FET on-resistance
RDS(ON)
Low-side FET on-resistance
RDS(ON)
Off-state leakage current
IOFF
Output rise time
tRISE
Output fall time
tFALL
Output dead time
tDEAD
PWM CURRENT CONTROL (AISEN, BISEN)
xISEN trip voltage
Current control constant off time
PROTECTION CIRCUITS
VTRIP
tOFF
VM undervoltage lockout
VUVLO
VM undervoltage hysteresis
VUVLO,HYS
Overcurrent protection trip level
Overcurrent deglitch time
IOCP
tDEG
Overcurrent protection period
Thermal shutdown temperature
tOCP
TTSD (1)
THYS
Thermal shutdown hysteresis
VM = 5V
VM = 5V; RL = 16Ω to GND
VM = 5V; RL = 16Ω to VM
Internal dead time
Internal PWM constant off time
VM falling; UVLO report
VM rising; UVLO recovery
Rising to falling threshold
Die temperature, TJ
Die temperature, TJ
2.7 to 10.8V
PWM
G2053
0.7A
nSLEEP
nFAULT
Stepper or
Brushed DC
Motor Driver
Mo
iver
Ver: 0.1
Jan 19, 2018
3
0.7A
M
UNIT
mΩ
mΩ
V
G2053
Global Mixed-mode Technology
Pin Description
PIN
NAME
TSSOP TQFN
POWER AND GROUND
TYPE
FUNCTION
GND
13
11
VINT
14
12
PWR Device ground
Both the GND pin and device PowerPAD must be connected to ground
Internal regulator (3.3 V) Internal supply voltage; bypass to GND with 2.2μF, 6.3V capacitor
-
VM
12
10
PWR Power supply
AIN1
AIN2
16
15
14
13
I
H-bridge A PWM input
Controls the state of AOUT1 and AOUT2; internal pulldown
BIN1
BIN2
9
10
7
8
I
H-bridge B PWM input
Controls the state of BOUT1 and BOUT2; internal pulldown
nSLEEP
1
15
I
Sleep mode input
8
6
OD
Fault indication pin
AISEN
3
1
O
Bridge A sense
AOUT1
AOUT2
2
16
4
2
O
Bridge A output
BISEN
6
4
O
Bridge B sense
BOUT1
7
5
BOUT2
5
3
O
Bridge B output
Connect to motor supply voltage; bypass to GND with a 10µF (minimum) capacitor rated for VM
CONTROL
Logic high to enable device; logic low to enter low-power sleep mode;
internal pulldown
STATUS
nFAULT
Pulled logic low with fault condition; open-drain output requires an external pullup
OUTPUT
Sense resistor to GND sets PWM current regulation level (see PWM
Motor Drivers)
Positive current is AOUT1 → AOUT2
Sense resistor to GND sets PWM current regulation level (see PWM
Motor Drivers)
Positive current is BOUT1 → BOUT2
Ver: 0.1
Jan 19, 2018
4
G2053
Global Mixed-mode Technology
Detailed Description
Overview
The G2053 device is an integrated motor driver solution for brushed DC or bipolar stepper motors. The device integrates two PMOS + NMOS H-bridges and current regulation circuitry. The G2053 can be powered with a supply
voltage from 2.7 to 10.8V and can provide an output current up to 700mA RMS.
A simple PWM interface allows easy interfacing to the controller circuit.
The current regulation is a 20µs fixed off-time slow decay.
The device includes a low-power sleep mode, which lets the system save power when not driving the motor.
Functional Block Diagram
VM
VM
10 µF
Internal
Reference and
Regulators
VINT
2.2µF
VM
AOUT1
Gate
Drive
And
OCP
AIN1
AIN2
BDC
VM
AOUT2
BIN1
BIN2
AISEN
ISEN
Logic
VM
BOUT1
Gate
Drive
And
OCP
nSLEEP
BDC
VM
nFAULT
BOUT2
OverTemp
BISEN
ISEN
GND
Ver: 0.1
Jan 19, 2018
5
Step
Motor
G2053
Global Mixed-mode Technology
Feature Description
PWM Motor Drivers
The G2053 contains drivers for two full H-bridges. Figure 6 shows a block diagram of the circuitry.
Figure 6. H-Bridge and Current-Chopping Circuitry
Bridge Control and Decay Modes
The AIN1 and AIN2 input pins control the state of the AOUT1 and AOUT2 outputs; similarly, the BIN1 and BIN2
input pins control the state of the BOUT1 and BOUT2 outputs (see Table 1).
Table 1. H-Bridge Logic
xIN1
xIN2
xOUT1
xOUT2
0
0
Z
Z
Coast / fast decay
FUNCTION
0
1
L
H
Reverse
1
0
H
L
Forward
1
1
L
L
Brake / slow decay
The inputs can also be used for PWM control of the motor speed. When controlling a winding with PWM and the
drive current is interrupted, the inductive nature of the motor requires that the current must continue to flow (called
recirculation current). To handle this recirculation current, the H-bridge can operate in two different states, fast decay or slow decay. In fast-decay mode, the H-bridge is disabled and recirculation current flows through the body
diodes. In slow-decay mode, the motor winding is shorted by enabling both low-side FETs.
To externally pulse-width modulate the bridge in fast-decay mode, the PWM signal is applied to one xIN pin while
the other is held low; to use slow-decay mode, one xIN pin is held high. See Table 2 for more information.
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Jan 19, 2018
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G2053
Global Mixed-mode Technology
Table 2. PWM Control of Motor Speed
xIN1
xIN2
PWM
0
FUNCTION
1
PWM
Forward PWM, slow decay
0
PWM
Reverse PWM, fast decay
PWM
1
Reverse PWM, slow decay
Forward PWM, fast decay
The internal current control is still enabled when applying external PWM to xIN. To disable the current control when
applying external PWM, the xISEN pins should be connected directly to ground. Figure 7 show the current paths in
different drive and decay modes.
Figure 7. Drive and Decay Modes
Current Control
The current through the motor windings may be limited, or controlled, by a 20µs constant off-time PWM current
regulation, or current chopping. For DC motors, current control is used to limit the start-up and stall current of the
motor. For stepper motors, current control is often used at all times.
When an H-bridge is enabled, current rises through the winding at a rate dependent on the DC voltage and inductance of the winding. If the current reaches the current chopping threshold, the bridge disables the current until
the beginning of the next PWM cycle. Note that immediately after the output is enabled, the voltage on the xISEN
pin is ignored for a fixed period of time before enabling the current sense circuitry. This blanking time is fixed at
3.75μs.
The PWM chopping current is set by a comparator that compares the voltage across a current sense resistor
connected to the xISEN pins with a reference voltage. The reference voltage, VTRIP, is is fixed at 200mV nominally.
The chopping current is calculated as in Equation 1.
ICHOP =
200mV
R XISEN
(1)
Example: If a 1Ω sense resistor is used, the chopping current will be 200 mV / 1Ω = 200mA.
Ver: 0.1
Jan 19, 2018
7
G2053
Global Mixed-mode Technology
Decay Mode
After the chopping current threshold is reached, the H-bridge switches to slow-decay mode. This state is held for toff
(20µs) until the next cycle to turn on the high-side MOSFETs.
xOUT1
xIN2
xIN1
Slow Decay
In slow-decay mode, the high-side MOSFETs are turned off and both of the low-side MOSFETs are turned on. The
motor current decreases while flowing in the two low-side MOSFETs until reaching its fixed off time (typically 20µs).
After that, the high-side MOSFETs are enabled to increase the winding current again.
Drive Current (A)
I CHOP
Drive
Brake / Slow Decay
Drive
Brake / Slow Decay
tDRIVE
tOFF
tDRIVE
tOFF
Figure 8. Current Chopping Operation
Sleep Mode
Driving nSLEEP low puts the device into a low-power sleep state. In this state, the H-bridges are disabled, all internal logic is reset, and all internal clocks are stopped. All inputs are ignored until nSLEEP returns inactive high.
When returning from sleep mode, some time, tWAKE, needs to pass before the motor driver becomes fully operational. To make the board design simple, the nSLEEP can be pulled up to the supply (VM). GMT recommends to use
a pullup resistor when this is done. This resistor limits the current to the input in case VM is higher than 6.5V. Internally, the nSLEEP pin has a 500kΩ resistor to GND. It also has a clamping Zener diode that clamps the voltage
at the pin at 6.5V. Currents greater than 250µA can cause damage to the input structure. Therefore, GMT recommends a pullup resistor between 20 to 75kΩ.
Ver: 0.1
Jan 19, 2018
8
G2053
Global Mixed-mode Technology
Parallel Mode
The two H-bridges in the G2053 can be connected in parallel for double the current of a single H-bridge. The internal dead time in the G2053 prevents any risk of cross-conduction (shoot-through) between the two bridges due
to timing differences between the two bridges. Figure 9 shows the connections.
VM
12
10µF
16
AIN1
15 AIN2
9
BIN1
10 BIN2
IN1
IN2
VM
AOUT1
AOUT2
BOUT1
BOUT2
PPAD
GND
1 nSLEEP
8 nFAULT
14
VINT
nSLEEP
nFAULT
NC
11
2
4
7
5
BDC
3
6
13
2.2µF
AISEN
BISEN
+
Figure 9. Parallel Mode Schematic
Protection Circuits
The G2053 is fully protected against overcurrent, overtemperature, and undervoltage events.
Overcurrent Protection (OCP)
An analog current limit (IOCP) circuit on each FET limits the current through the FET by limiting the gate drive. If this
analog current limit persists for longer than the OCP deglitch time (tDEG), all FETs in the H-bridge are disabled and
the nFAULT pin is driven low. The driver is re-enabled after the OCP retry period (tOCP) has passed. nFAULT becomes high again after the retry time. If the fault condition is still present, the cycle repeats. If the fault is no longer
present, normal operation resumes and nFAULT remains deasserted. Note that only the H-bridge in which the OCP
is detected will be disabled while the other bridge functions normally.
Overcurrent conditions are detected independently on both high-side and low-side devices; a short to ground,
supply, or across the motor winding all result in an overcurrent shutdown. Note that overcurrent protection does not
use the current sense circuitry used for PWM current control, so it functions even without presence of the xISEN
resistors.
Thermal Shutdown (TSD)
If the die temperature exceeds safe limits, all FETs in the H-bridge are disabled and the nFAULT pin is driven low.
After the die temperature has fallen below the specified hysteresis (THYS), operation automatically resumes. The
nFAULT pin is released after operation has resumed.
UVLO
If at any time the voltage on the VM pin falls below the UVLO threshold voltage, VUVLO, all circuitry in the device is
disabled, and all internal logic is reset. Operation resumes when VM rises above the UVLO threshold. The nFAULT
pin is not driven low during an undervoltage condition.
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Jan 19, 2018
9
G2053
Global Mixed-mode Technology
Table 3. Device Protection
Fault
VM undervoltage (UVLO)
Overcurrent (OCP)
Thermal Shutdown (TSD)
Condition
Error Report
H-Bridge
Internal Circuits
Recovery
VM < 2.6 V
IOUT > IOCP
None
Disabled
Disabled
VM > 2.7 V
FAULTn
Disabled
Operating
OCP
TJ > TTSD
FAULTn
Disabled
Operating
TJ < TTSD – THYS
Device Functional Modes
The G2053 is active unless the nSLEEP pin is brought logic low. In sleep mode, the H-bridge FETs are
disabled (Hi-Z). Note that tSLEEP must elapse after a falling edge on the nSLEEP pin before the device is in sleep
mode. The G2053 is brought out of sleep mode automatically if nSLEEP is brought logic high. Note that tWAKE must
elapse before the outputs change state after wake-up.
Table 4. Modes of Operation
Fault
Operating
Sleep mode
Fault encountered
Condition
H-Bridge
Internal Circuits
nSLEEP pin high
Operating
Operating
nSLEEP pin low
Disabled
Disabled
Any fault condition met
Disabled
See Table 3
Ver: 0.1
Jan 19, 2018
10
G2053
Global Mixed-mode Technology
Application and Implementation
Application Information
The G2053 is used in stepper or brushed DC motor control. The following design procedure can be used to configure the G2053 in a bipolar stepper motor application.
Typical Application
G2053
Step
Motor
1Ω
1 nSLEEP
2 AOUT1
AIN2
3 AISEN
VINT
AIN1
4 AOUT2
5
BOUT2
6
BISEN
7 BOUT1
+
1Ω
GND
VM
NC
BIN2
8 nFAULT
BIN1
15
14
13
12
2.2µF
11
10µF
10
VM
9
8
10kΩ
VCC, logic supply
Design Requirements
Table 5 gives design input parameters for system design.
Table 5. Design Parameters
Design Parameter
Reference
Example Value
Supply voltage
VM
9V
Motor winding resistance
RL
12Ω/phase
LL
10 mH/phase
Motor full step angle
θstep
1.8 °/step
Target stepping level
nm
v
2 (half-stepping)
Target chopping current
ICHOP
200 mA
Sense resistor
RISEN
1Ω
Motor winding inductance
Target motor speed
120 rpm
Detailed Design Procedure
Stepper Motor Speed
The first step in configuring the G2053 requires the desired motor speed and stepping level. The G2053 can support full- and half-stepping modes using the PWM interface.
If the target motor speed is too high, the motor does not spin. Ensure that the motor can support the target speed.
For a desired motor speed (v), microstepping level (nm), and motor full step angle (θstep),
f step (step / s) =
v(rpm)xn m (steps )x360° / rot
Q step (° / step )x 60s / min
(2)
Ver: 0.1
Jan 19, 2018
11
G2053
Global Mixed-mode Technology
Figure 10. Full-Step Mode
Figure 11. Half-Step Mode
Current Regulation
The chopping current (ICHOP) is the maximum current driven through either winding. This quantity depends on the
sense resistor value (RXISEN).
I CHOP =
200mV
R XISEN
(3)
Ver: 0.1
Jan 19, 2018
12
G2053
Global Mixed-mode Technology
ICHOP is set by a comparator which compares the voltage across RXISEN to a reference voltage. Note that ICHOP must
follow Equation 4 to avoid saturating the motor.
IFS ( A ) <
VM ( V )
RL (Ω) + RDS(ON) HS(Ω) + RDS( ON) LS(Ω)
(4)
Where
VM is the motor supply voltage.
RL is the motor winding resistance
Power Supply Recommendations
The G2053 is designed to operate from an input voltage supply (VM) range between 2.7 to 10.8V. A 10µF ceramic
capacitor rated for VM must be placed as close to the G2053 as possible.
Sizing Bulk Capacitance for Motor Drive Systems
Bulk capacitance sizing is an important factor in motor drive system design. It depends on a variety of factors including:
Type of power supply
Acceptable supply voltage ripple
Parasitic inductance in the power supply wiring
Type of motor (brushed DC, brushless DC, stepper)
Motor startup current
Motor braking method
The inductance between the power supply and motor drive system limits the rate current can change from the
power supply. If the local bulk capacitance is too small, the system responds to excessive current demands or
dumps from the motor with a change in voltage. Size the bulk capacitance to meet acceptable voltage ripple levels.
The data sheet generally provides a recommended value, but system-level testing is required to determine the
appropriate-sized bulk capacitor.
Figure 13. Setup of Motor Drive System With External Power Supply
Ver: 0.1
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G2053
Global Mixed-mode Technology
Layout Guidelines
Bypass the VM terminal to GND using a low-ESR ceramic bypass capacitor with a recommended value of 10µF
rated for VM. This capacitor should be placed as close to the VM pin as possible with a thick trace or ground plane
connection to the device GND pin and PowerPAD.
Bypass VINT to ground with a ceramic capacitor rated 6.3V. Place this bypassing capacitor as close to the pin as
possible.
Ver: 0.1
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G2053
Global Mixed-mode Technology
Package Information
TSSOP-16 (FD) Package
Taping Specification
PACKAGE
TSSOP-16 (FD)
Ver: 0.1
Jan 19, 2018
15
Q’TY/BY REEL
3,000 ea
G2053
Global Mixed-mode Technology
TQFN3X3-16 Package
Taping Specification
PACKAGE
TQFN3X3-16
Ver: 0.1
Jan 19, 2018
16
Q’TY/BY REEL
3,000 ea
G2053
Global Mixed-mode Technology
TQFN4X4-16 Package
Taping Specification
PACKAGE
TQFN4X4-16
Q’TY/BY REEL
3,000 ea
GMT Inc. does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and GMT Inc. reserves the right at any time without notice to change said circuitry and specifications.
Ver: 0.1
Jan 19, 2018
17