GS78132AB-10

GS78132AB BGA Commercial Temp Industrial Temp Features • Fast access time: 8, 10, 12 ns • CMOS low power operation: 260/210/180 mA at minimum cycle time • Single 3.3 V ± 0.3 V power supply • All inputs and outputs are TTL-compatible • Byte control • Fully static operation • Industrial Temperature Option: –40° to 85°C • 14 mm x 22 mm, 119-bump, 1.27 mm Pitch Ball Grid Array package • RoHS-compliant package available 256K x 32 8Mb Asynchronous SRAM Symbol A0 to A17 CE DQA1 TO DQA8 DQB1 TO DQB8 DQC1 TO DQC8 DQD1 TO DQD8 BA BB BC BD WE OE VDD VSS NC 8, 10, 12 ns 3.3 V VDD Pin Descriptions Description Address input Chip enable input Byte A Data input/output Byte B Data input/output Byte C Data input/output Byte D Data input/output Byte A Byte enable input Byte B Byte enable input Byte C Byte enable input Byte D Byte enable input Write enable input Output enable input +3.3 V power supply Ground No connect Description The GS78132A is a high speed CMOS Static RAM organized as 262,144-words by 32-bits. Static design eliminates the need for external clocks or timing strobes. The GS78132A operates on a single 3.3 V power supply, and all inputs and outputs are TTL-compatible. The GS78132A is available in a 14 mm x 22 mm BGA package. Block Diagram A0 Address Input Buffer Row Decoder Memory Array A17 CE WE Control OE ____ Bx Column Decoder I/O Buffer DQ1 DQ32 Rev: 1.04 5/2006 1/12 © 2003, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS78132AB 256K x 32 Async SRAM in 119-bump, 14 mm x 22 mm BGA—Top View (Package B) 1 A B C D E F G H J K L M N P R T U NC BC DQC6 DQC5 DQC4 DQC3 DQC2 DQC1 VDD DQD1 DQD2 DQD3 DQD4 DQD5 DQD6 BD NC 2 A15 A11 NC VDD DQC8 VDD DQC7 VDD VSS VDD DQD7 VDD DQD8 VDD NC A7 A3 3 A14 A10 VDD, NC VSS VDD VSS VDD VSS VDD VSS VDD VSS VDD VSS NC A6 A2 4 A16 CE A17 VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS NC WE OE 5 A13 A9 VSS, NC VSS VDD VSS VDD VSS VDD VSS VDD VSS VDD VSS NC A5 A1 6 A12 A8 NC VDD DQB8 VDD DQB7 VDD VSS VDD DQA7 VDD DQA8 VDD NC A4 A0 7 NC BB DQB6 DQB5 DQB4 DQB3 DQB2 DQB1 VDD DQA1 DQA2 DQA3 DQA4 DQA5 DQA6 BA NC Note: Bumps 3C and 5C are actually NC’s but should be wired 3C = VDD and 5C = Vss to assure compatibility with future versions. Rev: 1.04 5/2006 2/12 © 2003, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS78132AB Truth Table CE OE WE BA BB BC BD H X X X L H L L H L L L L H L X L L L L L L H X H X X H X L L H L L L L H L L X H X L L L H L L L L H L X H X L L L L H L L L L H X H DQA1–A8 Not Selected Read High Z Read Read Read Write High Z Write Write Write High Z High Z DQB1–B8 Not Selected Read Read High Z Read Read Write Write High Z Write Write High Z High Z DQC1–C8 Not Selected Read Read Read High Z Read Write Write Write High Z Write High Z High Z DQD1–D8 Not Selected Read Read Read Read High Z Write Write Write Write High High Z High Z Supply Current ISB1, ISB2 IDD X: “H” or “L” Absolute Maximum Ratings Parameter Supply Voltage Input Voltage Output Voltage Allowable power dissipation Storage temperature Symbol VDD VIN VOUT PD TSTG Rating –0.5 to +4.6 –0.5 to VDD +0.5 (≤ 4.6 V max.) –0.5 to VDD +0.5 (≤ 4.6 V max.) 1.5 –55 to 150 Unit V V V W oC Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability. Rev: 1.04 5/2006 3/12 © 2003, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS78132AB Recommended Operating Conditions Parameter Supply Voltage for -8/10/12 Input High Voltage Input Low Voltage Ambient Temperature, Commercial Range Ambient Temperature, Industrial Range Symbol VDD VIH VIL TAc TAi Min 3.0 2.0 –0.3 0 –40 Typ 3.3 — — — — Max 3.6 VDD +0.3 0.8 70 85 Unit V V V o C oC Notes: 1. Input overshoot voltage should be less than VDD +2 V and not exceed 20 ns. 2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns. Capacitance Parameter Input Capacitance Output Capacitance Symbol CIN COUT Test Condition VIN = 0 V VOUT = 0 V Max 10 7 Unit pF pF Notes: 1. Tested at TA = 25°C, f = 1 MHz 2. These parameters are sampled and are not 100% tested DC I/O Pin Characteristics Parameter Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Symbol IIL IOL VOH VOL Test Conditions VIN = 0 to VDD Output High Z, VOUT = 0 to VDD IOH = –4 mA IOL = +4 mA Min –2 uA –1 uA 2.4 Max 2 uA 1 uA 0.4 V Rev: 1.04 5/2006 4/12 © 2003, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS78132AB Power Supply Currents Parameter Symbol Test Conditions E ≤ VIL All other inputs ≥ VIH or ≤ VIL Min. cycle time IOUT = 0 mA E ≥ VIH All other inputs ≥ VIH or ≤VIL Min. cycle time E ≥ VDD - 0.2V All other inputs ≥ VDD - 0.2V or ≤ 0.2V 0 to 70°C 8 ns 10 ns 12 ns 8 ns –40 to 85°C 10 ns 12 ns Operating Supply Current IDD 260 mA 210 mA 180 mA 280 mA 230 mA 200 mA Standby Current ISB1 60 mA 50 mA 50 mA 80 mA 70 mA 70 mA Standby Current ISB2 20 mA 40 mA AC Test Conditions Parameter Input high level Input low level Input rise time Input fall time Input reference level Output reference level Output load Conditions VIH = 2.4 V VIL = 0.4 V tr = 1 V/ns tf = 1 V/ns 1.4 V 1.4 V Fig. 1& 2 Output Load 1 DQ 50Ω VT = 1.4 V 30pF1 Output Load 2 3.3 V DQ 5pF1 589Ω 434Ω Notes: 1. Include scope and jig capacitance. 2. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted 3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ. Rev: 1.04 5/2006 5/12 © 2003, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS78132AB AC Characteristics Read Cycle Parameter Read cycle time Address access time Chip enable access time (CE) Output enable to output valid (OE) Output hold from address change Chip enable to output in low Z (CE) Output enable to output in low Z (OE) Chip disable to output in High Z (CE) Output disable to output in High Z (OE) Symbol tRC tAA tAC tOE tOH tLZ* tOLZ* tHZ* tOHZ* -8 Min 8 — — — 3 3 0 — — Max — 8 8 3.5 — — — 4 3.5 Min 10 — — — 3 3 0 — — -10 Max — 10 10 4 — — — 5 4 Min 12 — — — 3 3 0 — — -12 Max — 12 12 5 — — — 6 5 Unit ns ns ns ns ns ns ns ns ns Read Cycle 1:CE = OE = VIL , WE = VIH, BA = BB = BC = BD = VIL tRC Address tAA tOH Data Out Previous Data Data valid Rev: 1.04 5/2006 6/12 © 2003, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS78132AB Read Cycle 2: WE = VIH tRC Address tAA CE tAC tLZ tAB tBLZ tOE Data Out tOLZ High impedance tBHZ tOHZ Data valid tHZ BA, BB, BC, BD OE * These parameters are sampled and are not 100% tested Write Cycle Parameter Write cycle time Address valid to end of write Chip enable to end of write Data set up time Data hold time Write pulse width Address set up time Write recovery time (WE) Write recovery time (CE) Output Low Z from end of write Write to output in High Z Symbol tWC tAW tCW tDW tDH tWP tAS tWR tWR1 tWLZ* tWHZ* -8 Min 8 5.5 5.5 4 0 5.5 0 0 0 3 — Max — — — — — — — — — — 3.5 Min 10 7 7 5 0 7 0 0 0 3 — -10 Max — — — — — — — — — — 4 Min 12 8 8 6 0 8 0 0 0 3 — -12 Max — — — — — — — — — — 5 Unit ns ns ns ns ns ns ns ns ns ns ns Rev: 1.04 5/2006 7/12 © 2003, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS78132AB Write Cycle 1: WE Controlled tWC Address tAW OE tCW CE tBW tAS tWP tDW Data In tWHZ Data Out tDH tWR BA, BB, BC, BD WE Data valid tWLZ High impedance Write Cycle 2: CE Controlled tWC Address tAW OE tAS CE tCW tWR1 BA, BB, BC, BD tWP WE tBW tDW Data In Data Out tDH Data valid High impedance Rev: 1.04 5/2006 8/12 © 2003, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS78132AB Package Dimensions—119-Bump FPBGA (Package B, Variation 1) (Date Code: yyww.31) Pin #1 Corner BOTTOM VIEW A1 Ø0.10S C Ø0.30S C AS B S Ø0.60~0.90 (119x) 1 2 3 45 6 7 A B C D E F G H J K L M N P R T U Ø1.00(3x) REF 7 6 5 43 2 1 A B C D E F G H J K L M N P R T U 22±0.20 19.50 0.70 REF 12.00 B 1.27 7.62 A 0.20(4x) 14±0.20 0.90±0.10 0.15 C 0.56±0.05 Rev: 1.04 5/2006 0.50~0.70 2.06.±0.13 C SEATING PLANE 0.15 C 30 TYP. 9/12 20.32 1.27 © 2003, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS78132AB Package Dimensions—119-Bump FPBGA (Package B, Variation 2) (Date Code: yyww.3H) A1 1 A B C D E F G H J K L M N P R T U TOP VIEW BOTTOM VIEW A1 Ø0.10S C Ø0.30S C AS B S Ø0.60~0.90 (119x) 2 3 4 5 6 7 7 6 5 43 2 1 A B C D E F G H J K L M N P R T U 22±0.10 B 1.27 7.62 0.15 C A 0.20(4x) 14±0.10 Rev: 1.04 5/2006 0.50~0.70 1.86.±0.13 C SEATING PLANE 10/12 20.32 1.27 © 2003, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS78132AB Ordering Information Part Number1 GS78132AB-8 GS78132AB-10 GS78132AB-12 GS78132AB-8I GS78132AB-10I GS78132AB-12I GS78132AB-15I GS78132AGB-8 Package 119-Bump BGA2 119-Bump BGA2 119-Bump BGA2 119-Bump BGA2 119-Bump BGA2 119-Bump BGA2 119-Bump BGA2 RoHS-compliant 119-Bump BGA2 RoHS-compliant 119-Bump BGA2 RoHS-compliant 119-Bump BGA2 RoHS-compliant 119-Bump BGA2 RoHS-compliant 119-Bump BGA2 RoHS-compliant 119-Bump BGA2 RoHS-compliant 119-Bump BGA2 Access Time 8 ns 10 ns 12 ns 8 ns 10 ns 12 ns 15 ns 8 ns Temp. Range Commercial Commercial Commercial Industrial Industrial Industrial Industrial Commercial Status GS78132AGB-10 10 ns Commercial GS78132AGB-12 12 ns Commercial GS78132AGB-8I 8 ns Industrial GS78132AGB-10I 10 ns Industrial GS78132AGB-12I 12 ns Industrial GS78132AGB-15I 15 ns Industrial Notes: 1. Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. For example: GS78132AB-12T 2. Please see pages 9 and 10 for date code information for Variation 1 and Variation 2 of the 119-bump BGA. Rev: 1.04 5/2006 11/12 © 2003, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. GS78132AB Revision History Rev. Code: Old; New GS78132AB_r1 GS78132AB_r1_01 GS78132AB_r1_01; GS78132AB_r1_02 GS78132AB_r1_02; GS78132AB_r1_03 GS78132AB_r1_03; GS78132AB_r1_04 Content Content/Format Content Content Types of Changes Format or Content Page #/Revisions/Reason • Creation of new datasheet • Added AC specifications to datasheet • Updated format • Added variation information to package mechanical • Added Variation 2 119 BGA to datasheet • Added date codes to mechanicals • Added RoHS-compliant package information Rev: 1.04 5/2006 12/12 © 2003, GSI Technology Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.