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S3901-1024Q

S3901-1024Q

  • 厂商:

    HAMAMATSU

  • 封装:

  • 描述:

    S3901-1024Q - NMOS linear image sensor - Hamamatsu Corporation

  • 详情介绍
  • 数据手册
  • 价格&库存
S3901-1024Q 数据手册
IMAGE SENSOR NMOS linear image sensor S3901-1024Q, S3904-2048Q Large active area type with 51.2 mm detection length NMOS linear image sensors are self-scanning photodiode arrays designed specifically as detectors for multichannel spectroscopy. The scanning circuit is made up of N-channel MOS transistors, operates at low power consumption and is easy to handle. Each photodiode has a large active area, high UV sensitivity yet very low noise, delivering a high S/N even at low light levels. The current output type NMOS linear image sensors also feature excellent output linearity and wide dynamic range. S3901-1024Q uses photodiodes with a height of 2.5 mm, arrayed at a spacing of 50 µm. S3904-2048Q has photodiodes with a height of 2.5 mm, arrayed at a spacing of 25 µm. The photodiode arrays are available in 2 different pixel quantities, 1024 (S3901-1024Q) and 2048 (S3904-2048Q). Quartz glass is the standard window material. Features Pixel pitch: 50 µm (S3901-1024Q) 25 µm (S3904-2048Q) Pixel height: 2.5 mm Active area length: 51.2 mm l High UV sensitivity with good stability l Low dark current and large saturation charge allow long integration time and a wide dynamic range at room temperature l Excellent output linearity and sensitivity spatial uniformity l Low power consumption: 1 mW Max. l Start pulse and clock pulses are CMOS logic compatible Applications l Large active area, long detection length l Multichannel spectrophotometry l Image readout system Figure 1 Equivalent circuit START CLOCK CLOCK st 1 2 DIGITAL SHIFT REGISTER (MOS SHIFT REGISTER) END OF SCAN Figure 2 Active area structure ACTIVE PHOTODIODE ACTIVE VIDEO Vss SATURATION CONTROL GATE SATURATION CONTROL DRAIN DUMMY DIODE KMPDC0020EA b a OXIDATION SILICON 1.0 µm 1.0 µm DUMMY VIDEO c N TYPE SILICON P TYPE SILICON S3901-1024Q: a=50 µm, b=45 µm, c=2.5 mm S3904-2048Q: a=25 µm, b=20 µm, c=2.5 mm KMPDA0124EB s Absolute maximum ratings Parameter Input pulse (φ1, φ2, φst) voltage Power consumption *1 Operating temperature *2 Storage temperature *1: Vφ=5.0 V *2: No condensation Symbol Vφ P Topr Tstg Value 15 1 -40 to +65 -40 to +85 Unit V mW °C °C 400 µm 1 NMOS linear image sensor s Shape specifications Parameter Number of pixels Package length Number of pin Window material *3 Weight *3: Fiber optic plate is available. S3901-1024Q 1024 S3901-1024Q, S3904-2048Q S3904-2048Q 2048 65.0 22 Quartz 8.5 Unit mm g s Specifications (Ta=25 °C) Parameter Symbol Min. S3901-1024Q Typ. Max. 50 2.5 Min. S3904-2048Q Typ. Max. 25 2.5 200 to 1000 0.6 ±3 600 0.1 10 180 25 0.3 ±3 Unit µm mm nm nm pA pF mlx · s pC % Pixel pitch Pixel height Spectral response range 200 to 1000 λ (10 % of peak) Peak sensitivity wavelength 600 λp Photodiode dark current *4 ID 0.2 Photodiode capacitance *4 Cph 20 Saturation exposure *4, *5 Esat 180 Saturation output charge *4 Qsat 50 Photo response non-uniformity *6 PRNU *4: Vb=2.0 V, Vφ=5.0 V *5: 2856 K, tungsten lamp *6: 50 % of saturation, excluding the start pixel and last pixel s Electrical characteristics (Ta=25 °C) Parameter Clock pulse (φ1, φ2) voltage Symbol Condition Min. 4.5 0 4.5 0 1.5 200 200 200 trf - 20 0.1 50 % of saturation * 9, * 10 S3901-1024Q Typ. Max. 5 10 0.4 10 Vφ1 0.4 Vφ - 3.0 Vφ - 2.5 0 Vb 20 20 200 2000 Min. 4.5 0 4.5 0 1.5 200 200 200 trf - 20 0.1 S3904-2048Q Typ. Max. 5 10 0.4 10 Vφ1 0.4 Vφ - 3.0 Vφ - 2.5 0 Vb 20 20 250 200 87 60 2000 Unit V V V V V V V ns ns ns ns ns ns kHz ns pF pF pF High Vφ1, Vφ2 (H) Low Vφ1, Vφ2 (L) High Vφs (H) Start pulse (φst) voltage Low Vφs (L) Video bias voltage *7 Vb Saturation control gate voltage Vscg Saturation control drain voltage Vscd trφ1, trφ2 8 Clock pulse (φ 1, φ 2) rise/fall time * tfφ1, tfφ2 Clock pulse (φ1, φ2) pulse width tpwφ1, tpwφ2 Start pulse (φst) rise/fall time trφs, tfφs Start pulse (φst) pulse width tpwφs Start pulse (φst) and clock pulse tφov (φ2) overlap 8 Clock pulse space * X1, X2 Data rate *9 f Video delay time tvd Clock pulse (φ1, φ2) 5 V bias 134 Cφ line capacitance Saturation control gate (Vscg) Cscg 5 V bias 63 line capacitance Video line capacitance CV 2 V bias 45 *7: Vφ is input pulse voltage (refer to figure 8) . *8: trf is the clock pulse rise or fall time. A clock pulse space of “rise time/fall time - 20 ” ns input if the clock pulse rise or fall time is longer than 20 ns (refer to figure 7) . *9: Vb=2.0 V, Vφ=5.0 V *10: Measured with C7883 driver circuit. (nanoseconds) or more should be 2 NMOS linear image sensor Figure 3 Dimensional outline (unit: mm) ACTIVE AREA 51.2 × 2.5 25.6 ± 0.5 S3901-1024Q, S3904-2048Q 7.75 ± 0.2 7.75 ± 0.2 65.0 15.5 PHOTOSENSITIVE SURFACE 3.0 0.46 25.4 48.26 2.54 15.24 0.25 * Optical distance from the outer surface of the quartz window to the chip surface KMPDA0123EA Figure 4 Pin connection 2 1 st Vss Vscg 1 2 3 4 5 22 21 20 19 18 NC NC NC NC NC NC Vscd Vss ACTIVE VIDEO DUMMY VIDEO Vsub 6 7 8 9 10 11 17 16 15 14 13 12 NC NC NC NC NC END OF SCAN Vss, Vsub and NC should be grounded. KMPDC0109EA Terminal φ1, φ2 φst Vss Vscg Vscd Input or output Input (CMOS logic compatible) Input (CMOS logic compatible) Input Input Active video Output Dummy video Vsub End of scan NC Output Output (CMOS logic compatible) - Description Pulses for operating the MOS shift register. The video data rate is equal to the clock pulse frequency since the video output signal is obtained synchronously with the rise of φ2 pulse. Pulse for starting the MOS shift register operation. The time interval between start pulses is equal to the signal accumulation time. Connected to the anode of each photodiode. This should be grounded. Used for restricting blooming. This should be grounded. Used for restricting blooming. This should be biased at a voltage equal to the video bias voltage. Video output signal. Connects to photodiode cathodes when the address is on. A positive voltage should be applied to the video line in order to use photodiodes with a reverse voltage. When the amplitude of φ1 and φ2 is 5 V, a video bias voltage of 2 V is recommended. This has the same structure as the active video, but is not connected to photodiodes, so only spike noise is output. This should be biased at a voltage equal to the active video or left as an open-circuit when not needed. Connected to the silicon substrate. This should be grounded. This should be pulled up at 5 V by using a 10 k Ω resistor. This is a negative going pulse that appears synchronously with the φ2 timing right after the last photodiode is addressed. Should be grounded. 1.3 ± 0.2 * 3 NMOS linear image sensor Figure 5 Spectral response (typical example) 0.3 (Ta=25 ˚C) S3901-1024Q, S3904-2048Q Figure 6 Output charge vs. exposure 10 2 (Typ. Vb=2 V, V =5 V, light source: 2856 K) PHOTO SENSITIVITY (A/W) 10 1 SATURATION CHARGE 0.2 OUTPUT CHARGE (pC) 100 S3901-1024Q S3904-2048Q 10–1 0.1 10–2 SATURATION EXPOSURE 0 200 400 600 800 1000 1200 10–3 10–5 10–4 10–3 10–2 10–1 100 WAVELENGTH (nm) KMPDB0149EA EXPOSURE (lx · s) KMPDB0160EB Figure 7 Timing chart st 1 2 V s (H) V s (L) V V V V 1 (H) 1 (L) 2 (H) 2 (L) tpw s tpw 1 Figure 8 Video bias voltage margin 10 VIDEO BIAS VOLTAGE (V) tpw 2 tvd 8 S X. ACTIVE VIDEO OUTPUT 6 RE CO MM EN D DE BIA MA END OF SCAN 4 VIDEO BIAS RANGE 2 MIN. tr s st tf s tr 1 tf 1 0 1 X1 2 X2 tf 2 4 5 6 7 8 9 10 CLOCK PULSE AMPLITUDE (V) t ov tr 2 KMPDB0043EA KMPDC0022EA Information furnished by HAMAMATSU is believed to be reliable. However, no responsibility is assumed for possible inaccuracies or omissions. Specifications are subject to change without notice. No patent rights are granted to any of the circuits described herein. ©2007 Hamamatsu Photonics K.K. HAMAMATSU PHOTONICS K.K., Solid State Division 1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184, www.hamamatsu.com U.S.A.: Hamamatsu Corporation: 360 Foothill Road, P.O.Box 6910, Bridgewater, N.J. 08807-0910, U.S.A., Telephone: (1) 908-231-0960, Fax: (1) 908-231-1218 Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, Germany, Telephone: (49) 08152-3750, Fax: (49) 08152-2658 France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10 United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777 North Europe: Hamamatsu Photonics Norden AB: Smidesvägen 12, SE-171 41 Solna, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01 Italy: Hamamatsu Photonics Italia S.R.L.: Strada della Moia, 1/E, 20020 Arese, (Milano), Italy, Telephone: (39) 02-935-81-733, Fax: (39) 02-935-81-741 4 Cat. No. KMPD1049E03 Mar. 2007 DN
S3901-1024Q
1. 物料型号:型号为STM32F103C8T6,是一款基于ARM Cortex-M3内核的32位微控制器。

2. 器件简介:该器件是意法半导体生产的高性能微控制器,具有多种通信接口和外设,适用于多种嵌入式应用。

3. 引脚分配:该芯片共有48个引脚,包括电源引脚、地引脚、I/O引脚等,具体分配需参考芯片手册。

4. 参数特性:主频72MHz,内置64KB Flash和20KB RAM,工作电压2.0V-3.6V,工作温度-40℃至+85℃。

5. 功能详解:包括GPIO、ADC、定时器、通信接口(UART、SPI、I2C)等模块的详细功能描述。

6. 应用信息:适用于工业控制、医疗设备、消费电子等多种应用场景。

7. 封装信息:采用LQFP48封装,尺寸7x7mm。
S3901-1024Q 价格&库存

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