CPC1998J

CPC1998J AC Power Switch INTEGRATED CIRCUITS DIVISION Characteristics Description Parameter Rating Units AC Operating Voltage 20-240 Vrms CPC1998J is an AC Solid State Switch utilizing dual power SCR outputs. This device also includes zero-cross turn-on circuitry and is specified with an 800VP blocking voltage. Load Current With 5°C/W Heat Sink 20 No Heat Sink 5 Arms On-State Voltage Drop 1.1 VP (at IL=2AP) Blocking Voltage 800 VP Thermal Impedance, Junction-to-Case, JC 0.35 °C/W Features • • • • • • • • • • • Load Current up to 20Arms with 5°C/W Heat Sink 800VP Blocking Voltage 5mA Control Current Zero-Cross Switching Isolated, Low Thermal Impedance Ceramic Pad for Heat Sink Applications 2500Vrms Isolation, Input to Output DC Control, AC Output Optically Isolated Low EMI and RFI Generation High Noise Immunity Flammability Rating UL 94 V-0 Applications • • • • • • • • • • Programmable Control Process Control Power Control Panels Remote Switching Gas Pump Electronics Contactors Large Relays Solenoids Motors Heaters Tightly controlled zero-cross circuitry ensures low noise switching of AC loads by minimizing the generation of transients. The optically coupled input and output circuits provide exceptional noise immunity and 2500Vrms of isolation between the control and the output. As a result, the CPC1998J is well suited for industrial environments where electromagnetic interference would disrupt the operation of plant facility communications and control systems. The unique i4-PAC package pioneered by IXYS allows Solid State Relays to achieve the highest load current and power ratings. This package features a unique IXYS process in which the silicon chips are soft soldered onto the Direct Copper Bond (DCB) substrate instead of the traditional copper leadframe. The DCB ceramic, the same substrate used in high power modules, not only provides 2500Vrms isolation but also very low junction-to-case thermal impedance (0.35 °C/W). Ordering Information Part Description CPC1998J i4-PAC Package (25 per tube) Pin Configuration ZC Approvals • UL 508 Recognized Component: File E69938 1 2 AC Load 3 4 + LED – LED e3 DS-CPC1998J-R07 www.ixysic.com 1 CPC1998J INTEGRATED CIRCUITS DIVISION 1 Specifications 1.1 Absolute Maximum Ratings @ 25°C Symbol Blocking Voltage Reverse Input Voltage Input Control Current Peak (10ms) Input Power Dissipation 1 Total Power Dissipation 2 I2t for Fusing (1/2 Sine Wave, 60Hz) Isolation Voltage, Input to Output ESD, Human Body Model Operational Temperature Storage Temperature 1 2 Min - Max 800 5 50 1 150 3.5 Units - 200 A2s - 40 - 40 2500 8 +85 +125 Vrms kV VP V mA A mW W Absolute maximum ratings are stress ratings. Stresses in excess of these ratings can cause permanent damage to the device. Functional operation of the device at conditions beyond those indicated in the operational sections of this data sheet is not implied. Typical values are characteristic of the device at +25°C, and are the result of engineering evaluations. They are provided for information purposes only, and are not part of the manufacturing testing requirements. °C °C Derate linearly 1.33mW / °C. Free air, no heat sink. 1.2 Electrical Characteristics @ 25°C Parameter Output Characteristics Load Current Continuous Continuous Maximum Surge Current Off-State Leakage Current On-State Voltage Drop 1 Off-State dV/dt Switching Speeds Turn-On Turn-Off Zero-Cross Turn-On Voltage 2 Holding Current Latching Current Operating Frequency Load Power Factor for Guaranteed Turn-On 3 Input Characteristics Input Control Current to Activate 4 Input Dropout Voltage Input Voltage Drop Reverse Input Current Input/Output Characteristics Capacitance, Input-to-Output 1 2 3 4 Conditions Symbol No Heat Sink, VL=20-240Vrms TC=25°C 1/2 Sine Wave, 60Hz VL=800V IL=2AP IF=0mA IP ILEAK IF=5mA ton toff IL - dV/dt Minimum Typical Maximum 0.1 0.1 1000 0.85 - 5 50 150 100 1.1 - 5 44 48 - 0.5 0.5 20 5 50 75 500 - Units Arms A AP VP V/s 1st half-cycle subsequent half-cycle f=60Hz PF 20 0.25 IL=1A Resistive, f=60Hz IF=5mA VR=5V IF VF IR 0.8 0.9 - 1.2 - 5 1.5 10 mA V V A VIO=0V, f=1MHz CIO - - 3 pF - IH IL cycles V mA mA Hz - Tested at a peak value equivalent. Zero-cross first half-cycle @ < 100Hz. Snubber circuits may be required at low power factors. For high-noise environments, or high-frequency operation (>60Hz), or for applications with a high inductive load, a minimum LED drive current of 10mA is recommended. R07 www.ixysic.com 2 CPC1998J INTEGRATED CIRCUITS DIVISION 2 Thermal Characteristics Parameter Conditions Symbol Rating Units - JC 0.35 °C/W Free Air JA 33 °C/W - TJ -40 to +125 °C Thermal Impedance (Junction to Case) Thermal Impedance (Junction to Ambient) Junction Temperature (Operating) 2.1 Thermal Management Device high current characterization was performed using Kunze heat sink KU 1-159, phase change thermal interface material KU-ALC 5, and transistor clip KU 4-499/1. This combination provided an approximate junction-to-ambient thermal impedance of 12.5°C/W. 2.2 Heat Sink Calculation Higher load currents are possible by using lower thermal impedance heat sink combinations. Heat Sink Rating (TJ - TA) θCA = PD - θJC TJ = Junction Temperature (°C), TJ ≤ 125°C * TA = Ambient Temperature (°C) θJC = Thermal Impedance, Junction to Case (°C/W) = 0.35°C/W θCA = Thermal Impedance of Heat Sink & Thermal Interface Material , Case to Ambient (°C/W) PD = On-State Voltage (Vrms) • Load Current (Arms) * Elevated junction temperature reduces semiconductor lifetime. NOTE: The exposed surface of the DCB substrate is not to be soldered. 2.3 Thermal Performance Data Output Power vs. Load Current Output Power vs. Ambient Temperature 40 Output Power (W) 35 30 25 20 40 35 30 25 20 15 15 10 10 5 5 0 0 0 3 Output Power (W) Heat Sink 1ºC/W 2ºC/W 5ºC/W 10ºC/W 15ºC/W Free Air 5 10 15 20 25 30 Load Current (Arms) 35 40 0 25 www.ixysic.com 50 75 Temperature (ºC) 100 125 R07 CPC1998J INTEGRATED CIRCUITS DIVISION 3 Performance Data* Typical LED Forward Voltage Drop (N=50, IF=5mA) 25 Device Count (N) Device Count (N) 30 25 20 15 10 5 20 15 10 5 1.25 1.26 1.27 1.28 1.29 LED Forward Voltage (V) 2.70 2.74 2.78 2.82 2.86 LED Forward Current (mA) Zero-Cross Voltage (N=50, IF=5mA) 15 10 5 6.4 6.6 6.8 7.0 7.2 Zero-Cross Voltage (V) 1.4 1.3 1.2 10 5 20 40 60 Temperature (ºC) 80 100 LED Current to Operate vs. Load Frequency - Resistive Load (VP=71V, RL=10Ω, IL=7A) 4.5 4.0 3.5 3.0 7.4 874 876 878 880 882 884 Blocking Voltage (VP) 3.5 3.0 5.20 -20 0 20 40 60 Temperature (ºC) 80 LED Current to Operate vs. Load Frequency - Inductive Load (VL=200V, ZL=400mH/220Ω) 5.15 5.10 5.05 5.00 4.95 4.90 100 200 300 400 Load Frequency (Hz) 500 600 6.5 6.0 5.5 5.0 4.5 5.20 -20 0 20 40 60 Temperature (ºC) 80 100 LED Current to Operate vs. Load Frequency- Inductive Load (VL=200V, ZL=196mH/110Ω) 5.18 5.16 5.14 5.12 5.10 4.85 2.5 7.0 4.0 -40 100 886 LED Forward Current to Operate vs. Temperature - Inductive Load (IL=500mA, fL=60Hz, LL=400mH) 7.5 4.0 2.5 -40 LED Forward Current (mA) LED Forward Current (mA) 15 LED Forward Current (mA) 1.5 LED Forward Current (mA) LED Forward Voltage (V) IF=50mA IF=20mA IF=10mA IF=5mA 0 0.856 0.859 0.862 0.865 0.868 0.871 0.874 Forward Voltage Drop (V) LED Forward Current (mA) 4.5 1.6 5.0 2.90 LED Forward Current to Operate vs. Temperature - Resistive Load (IL=1A, fL=60Hz) Typical LED Forward Voltage Drop vs. Temperature 0 5 0 6.2 -20 10 20 0 1.1 -40 15 Typical Blocking Voltage Distribution (N=50) Device Count (N) Device Count (N) 2.66 1.30 20 20 0 0 0 Forward Voltage Drop Distribution (N=50, IF=5mA, IL=2A) 25 Device Count (N) 35 Typical IF for Switch Operation with 1A Resistive Load (N=50, VL=120VAC/60Hz) 0 100 200 300 400 Load Frequency (Hz) 500 600 0 100 200 300 400 Load Frequency (Hz) 500 600 *Unless otherwise noted, data presented in these graphs is typical of device operation at 25ºC. R07 www.ixysic.com 4 CPC1998J INTEGRATED CIRCUITS DIVISION Zero-Cross Voltage vs. Temperature (IF=5mA, RL=120Ω) 7.2 6.4 1.00 0 -5 0.95 0.90 0.85 IL=3A IL=2A IL=1A 0.80 -10 6.2 0 20 40 60 Temperature (ºC) 80 0.75 -15 -1.5 100 Holding Current vs. Temperature (RL=1.9Ω) -1.0 -0.5 0.0 0.5 Voltage (V) 1.0 Total Heat Sinking Required vs. Temperature 1000 30 60 50 40 30 IL=5Arms IL=7.5Arms IL=10Arms IL=15Arms IL=20Arms 25 20 15 10 5 0 -20 0 20 40 60 Temperature (ºC) 80 100 0 10 20 30 40 50 60 70 Temperature (ºC) 80 90 100 -20 0 20 40 60 Temperature (ºC) 80 100 Breakdown Voltage vs. Temperature (IF=0mA) 950 900 850 800 -40 -20 0 20 40 60 Temperature (ºC) 80 100 Maximum Surge Current Non-Repetitive, Free Air Leakage Current vs. Temperature Measured Across Pins 1&2 1000 100 VL=800V VL=600V VL=400V 10 Current (A) Leakage current (μA) 0.70 -40 1.5 Breakdown Voltage (V) -20 70 20 -40 5 IL=10A IL=5A 1.05 VON (V) 6.6 80 Holding Current (mA) Current (A) 6.8 VON vs. Temperature 1.10 TA=-40ºC TA=25ºC TA=85ºC 10 7.0 6.0 -40 Output Voltage vs. Output Current (IF=5mA) 15 Thermal Resistance (ºC/W) Zero-Cross Voltage (V) 7.4 1 0.1 100 10 0.01 0.001 -40 -20 0 20 40 60 Temperature (ºC) 80 100 1 100μs 1ms 10ms 100ms Time 1s 10s *Unless otherwise noted, data presented in these graphs is typical of device operation at 25ºC. 5 www.ixysic.com R07 CPC1998J INTEGRATED CIRCUITS DIVISION 4 Manufacturing Information 4.1 ESD Sensitivity This product is ESD Sensitive, and should be handled according to the industry standard JESD-625. 4.2 Soldering Profile For through-hole devices, the maximum and minimum peak solder temperature limits (Tp) and the device maximum total dwell time through all solder waves is provided in the table below. Dwell time is the interval the device pins are at or above the minimum peak solder temperature. Body temperature of the device must not exceed the limit given in the table below at any time during the soldering process. Device CPC1998J Solder Temperature (Tp) Minimum Maximum 235°C 260°C Body Temperature Dwell Time Wave Cycles 245°C 10 seconds* 1 *Total cumulative duration of all waves. NOTE: The exposed surface of the DCB substrate must not be soldered. 4.3 Board Wash IXYS Integrated Circuits recommends the use of no-clean flux formulations. Board washing to reduce or remove flux residue following the solder reflow process is acceptable provided proper precautions are taken to prevent damage to the device. These precautions include but are not limited to: using a low pressure wash and providing a follow up bake cycle sufficient to remove any moisture trapped within the device due to the washing process. Due to the variability of the wash parameters used to clean the board, determination of the bake temperature and duration necessary to remove the moisture trapped within the package is the responsibility of the user (assembler). Cleaning or drying methods that employ ultrasonic energy may damage the device and should not be used. Additionally, the device must not be exposed to halide flux or solvents. e3 R07 www.ixysic.com 6 CPC1998J INTEGRATED CIRCUITS DIVISION 4.4 Mechanical Dimensions 5.029 ± 0.127 (0.198 ± 0.005) 19.914 ± 0.254 (0.784 ± 0.010) 20.879 ± 0.254 (0.822 ± 0.010) 1.181 ± 0.076 (0.047 ± 0.003) 1.757 ± 0.381 (0.069 ± 0.015) 17.221 ± 0.254 (0.678 ± 0.010) 15.490 ± 0.254 (0.610 ± 0.010) DCB Substrate NOTE: Substrate NOT to be soldered 2.362 ± 0.381 (0.093 ± 0.015) 20.396 ± 0.508 (0.803 ± 0.020) DIMENSIONS mm (inches) 3.810 ± 0.254 (0.150 ± 0.010) 15.240 ± 0.508 (0.600 ± 0.020) 0.635 ± 0.076 (0.025 ± 0.003) 2.794 ± 0.127 (0.110 ± 0.005) 1.270 TYP (0.050 TYP) NOTES: 1. Controlling dimension: Inches. 2. Metallized external surface of DCB substrate maintains 2500Vrms isolation to device internal structure and all external pins. For additional information please visit our website at: https://www.ixysic.com Disclaimer Notice - Information furnished is believed to be accurate and reliable. However, users should independently evaluate the suitability of and test each product selected for their own applications. Littelfuse products are not designed for, and may not be used in, all applications. Read complete Disclaimer Notice at https://www.littelfuse.com/disclaimer-electronics. Specification: DS-CPC1998J-R07 ©Copyright 2020, Littelfuse, Inc. All rights reserved. Printed in USA. 11/12/2020 7 www.ixysic.com R07