SP720ABTG

TVS Diode Arrays (SPA® Diodes) General Purpose ESD Protection - SP720 Series SP720 Series 3pF 4kV Diode Array RoHS Pb GREEN Description The SP720 is an array of SCR/Diode bipolar structures for ESD and over-voltage protection to sensitive input circuits. The SP720 has 2 protection SCR/Diode device structures per input. A total of 14 available inputs can be used to protect up to 14 external signal or bus lines. Over-voltage protection is from the IN (pins 1-7 and 9-15) to V+ or V-. The SCR structures are designed for fast triggering at a threshold of one +VBE diode threshold above V+ (Pin 16) or a -VBE diode threshold below V- (Pin 8). From an IN input, a clamp to V+ is activated if a transient pulse causes the input to be increased to a voltage level greater than one VBE above V+. A similar clamp to V- is activated if a negative pulse, one VBE less than V-, is applied to an IN input. Standard ESD Human Body Model (HBM) Capability is: Pinout SP720 (PDIP, SOIC) TOP VIEW IN 1 16 V+ IN 2 15 IN IN 3 14 IN IN 4 13 IN • ESD Interface Capability for HBM Standards IN 5 12 IN - MIL STD 3015.7.................................................. 15kV IN 6 11 IN - IEC 61000-4-2, Direct Discharge, IN 7 10 IN - Single Input........................................... 4kV (Level 2) 9 IN - Two Inputs in Parallel............................. 8kV (Level 4) - IEC 61000-4-2, Air Discharge................15kV (Level 4) V- 8 Features • High Peak Current Capability Functional Block Diagram - IEC 61000-4-5 (8/20µs)........................................ ±3A - Single Pulse, 100µs Pulse Width......................... ±2A - Single Pulse, 4µs Pulse Width............................. ±5A • Designed to Provide Over-Voltage Protection - Single-Ended Voltage Range to......................... +30V - Differential Voltage Range to............................. ±15V • Fast Switching...............................................2ns Risetime • Low Input Leakages..................................1nA at 25º (Typ) • Low Input Capacitance........................................ 3pF (Typ) • An Array of 14 SCR/Diode Pairs • Operating Temperature Range....................-40ºC to 105ºC Applications Additional Information Resources Samples Life Support Note: Not Intended for Use in Life Support or Life Saving Applications The products shown herein are not designed for use in life sustaining or life saving applications unless otherwise expressly indicated. © 2017 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 05/12/17 • Microprocessor/Logic Input Protection • Analog Device Input Protection • Data Bus Protection • Voltage Clamp TVS Diode Arrays (SPA® Diodes) General Purpose ESD Protection - SP720 Series Thermal Information Absolute Maximum Ratings Parameter Rating Units +35 V ±2, 100µs A Continuous Supply Voltage, (V+) - (V-) Forward Peak Current, IIN to VCC, IIN to GND (Refer to Figure 5) Parameter Thermal Resistance (Typical, Note 1) Rating θJA PDIP Package 90 o SOIC Package 130 o Maximum Storage Temperature Range Maximum Junction Temperature (Plastic Package) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Maximum Lead Temperature (Soldering 20-40s) (SOIC Lead Tips Only) Note: ESD Ratings and Capability - See Figure 1, Table 1 Load Dump and Reverse Battery (Note 2) Units oC/W C/W C/W -65 to 150 o 150 o 260 o C C C 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical Characteristics TA = -40oC to 105oC, VIN = 0.5VCC , Unless Otherwise Specified Parameter Operating Voltage Range, VSUPPLY = [(V+) - (V-)] Symbol Test Conditions VSUPPLY Forward Voltage Drop: Min Typ Max Units - 2 to 30 - V IIN = 1A (Peak Pulse) IN to V- VFWDL - 2 - V IN to V+ VFWDH - 2 - V IIN -20 5 20 nA IQUIESCENT - 50 200 nA Note 3 - 1.1 - V VFWD/IFWD; Note 3 - 1 - Ω Input Leakage Current Quiescent Supply Current Equivalent SCR ON Threshold Equivalent SCR ON Resistance Input Capacitance CIN - 3 - pF Input Switching Speed tON - 2 - ns Notes: 2. In automotive and battery operated systems, the power supply lines should be externally protected for load dump and everse battery V+ and V- pins are connected to the same supply voltage source as the device or control line under protection, a current limiting resistor should be connected in series between the external supply and the SP720 supply pins to limit reverse battery current to within the rated maximum limits. Bypass capacitors of typically 0.01µF or larger from the V+ and V- pins to ground are recommended. 3. Refer to the Figure 3 graph for definitions of equivalent “SCR ON Threshold” and “SCR ON Resistance.” These characteristics are given here for thumb-rule nformation to determine peak current and dissipation under EOS conditions. Typical Application of the SP720 (Application as an Input Clamp for Over-voltage, greater than 1VBE Above V+ or less than -1VBE below V-) © 2017 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 05/12/17 TVS Diode Arrays (SPA® Diodes) General Purpose ESD Protection - SP720 Series ESD Capability ESD capability is dependent on the application and defined test standard. The evaluation results for various test standards and methods based on Figure 1 are shown in Table 1. Figure 1: Electrostatic Discharge Test For the “Modified” MIL-STD-3015.7 condition that is defined as an “in-circuit” method of ESD testing, the V+ and V- pins have a return path to ground and the SP720 ESD capability is typically greater than 15kV from 100pF through 1.5kΩ. By strict definition of MIL-STD-3015.7 using “pin-to-pin” device testing, the ESD voltage capability is greater than 6kV. The MIL-STD-3015.7 results were determined from AT&T ESD Test Lab measurements. The HBM capability to the IEC 61000-4-2 standard is greater than 15kV for air discharge (Level 4) and greater than 4kV for direct discharge (Level 2). Dual pin capability (2 adjacent pins in parallel) is well in excess of 8kV (Level 4). For ESD testing of the SP720 to EIAJ IC121 Machine Model (MM) standard, the results are typically better than 1kV from 200pF with no series resistance. Table 1: ESD Test Conditions Standard MIL STD 3015.7 IEC 61000-4-2 EIAJ IC121 Figure 2: Low Current SCR Forward Voltage Drop Curve © 2017 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 05/12/17 RD CD ±VD Modified HBM Type/Mode 1.5kΩ 100pF 15kV Standard HBM 1.5kΩ 100pF 6kV HBM, Air Discharge 330Ω 150pF 15kV HBM, Direct Discharge 330Ω 150pF 4kV HBM, Direct Discharge, Two Parallel Input Pins 330Ω 150pF 8kV 0kΩ 200pF 1kV Machine Model Figure 3: High Current SCR Forward Voltage Drop Curve TVS Diode Arrays (SPA® Diodes) General Purpose ESD Protection - SP720 Series Peak Transient Current Capability for Long Duration Surges The peak transient current capability rises sharply as the width of the current pulse narrows. Destructive testing was done to fully evaluate the SP720’s ability to withstand a wide range of transient current pulses. The circuit used to generate current pulses is shown in Figure 4. Figure 4: T  ypical SP720 Peak Current Test Circuit with a Variable Pulse Width Input The test circuit of Figure 4 is shown with a positive pulse input. For a negative pulse input, the (-) current pulse input goes to an SP720 ‘IN’ input pin and the (+) current pulse input goes to the SP720 V- pin. The V+ to V- supply of the SP720 must be allowed to float. (i.e., It is not tied to the ground reference of the current pulse generator.) Figure 5 shows the point of overstress as defined by increased leakage in excess of the data sheet published limits. When adjacent input pins are paralleled, the sustained peak current capability is increased to nearly twice that of a single pin. For comparison, tests were run using dual pin combinations 1+2, 3+4, 5+6, 7+9, 10+11, 12+13 and 14+15. The overstress curve is shown in Figure 5 for a 15V supply condition. The dual pins are capable of 10A peak current for a 10µs pulse and 4A peak current for a 1ms pulse. The complete for single pulse peak current vs. pulse width time ranging up to 1 second are shown in Figure 5. Figure 5: S  P720 Typical Nonrepetitive Peak Current Pulse Capability  howing the Measured Point of Overstress in Amperes vs S pulse width time in milliseconds (TA = 25oC) 10 CAUTION: SAFE OPERATING CONDITIONS LIMIT THE MAXIMUM PEAK CURRENT FOR A GIVEN PULSE WIDTH TO BE NO GREATER THAN 75% OF THE VALUES SHOWN ON EACH CURVE. SINGLE PIN STRESS CURVES DUAL PIN STRESS CURVE 9 8 PEAK CURRENT (A) The maximum peak input current capability is dependent on the V+ to V- voltage supply level, improving as the supply voltage is reduced. Values of 0, 5, 15 and 30 voltages are shown. The safe operating range of the transient peak current should be limited to no more than 75% of the measured overstress level for any given pulse width as shown in Figure 5. 7 6 5 4 3 15V 0V 5V 30V 2 1 15V V+ TOV-SUPPLY 0 0.001 0.01 0.1 1 10 100 1000 PULSE WIDTH TIME (ms) © 2017 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 05/12/17 TVS Diode Arrays (SPA® Diodes) General Purpose ESD Protection - SP720 Series Soldering Parameters Pb – Free assembly Reflow Condition Pre Heat - Temperature Min (Ts(min)) 150°C - Temperature Max (Ts(max)) 200°C - Time (min to max) (ts) 60 – 180 secs Average ramp up rate (Liquidus) Temp (TL) to peak 5°C/second max TS(max) to TL - Ramp-up Rate 5°C/second max Reflow - Temperature (TL) (Liquidus) 217°C - Temperature (tL) 60 – 150 seconds Peak Temperature (TP) 260+0/-5 °C Time within 5°C of actual peak Temperature (tp) 20 – 40 seconds Ramp-down Rate 5°C/second max Time 25°C to peak Temperature (TP) 8 minutes Max. Do not exceed 260°C Package Dimensions Dual-In-Line Plastic Packages (PDIP) N E1 INDEX AREA 1 2 3 N/2 Package PDIP Pins 16 Lead Dual-in-Line JEDEC MS-001 -B- Millimeters -AD -C- SEATING PLANE A2 A L D1 e B1 D1 B CL eA A1 eC 0.010 (0.25) M C A B S C eB NOTES: 1. ControllingDimensions:INCH. In case of conflictbetweenEnglishand Controlling Dimensions: INCH. in case of conflict between English and Metric Metricthe dimensions, the inch dimensionscontrol. dimensions, inch dimensions control. 2. Dimensioning and tolerancing ANSI Y14.5M-1982. Dimensioning and tolerancing per ANSI per Y14.5M-1982. 3. Symbols are defined in the “MO SeriesList” Symbol List”in2.2 Section 2.2 of No. Symbols are defined in the “MO Series Symbol in Section of Publication 95. PublicationNo. 95. 4. Dimensions A, A1 and L are measured withtheseated package seatedseating in JEDimensions A, A1 and L are measured with the package in JE-DEC plane gauge GS-3. plane gauge GS-3. DEC seating Notes: 1. 2. 3. 4. Max A - A1 0.39 E BASE PLANE 5. D, D1, and E1and dimensions do not include flashmold or protrusions. Mold flash or 5. D, D1, E1 dimensions do notmold include flash or protrusions. protrusions 0.010shall inch (0.25mm). Moldshall flashnot or exceed protrusions not exceed 0.010 inch (0.25mm). are measured with the leads to be perpendicular to datum -C- . 6. E and eA are measured 6. EeAand withconstrained the leads constrained to be perpendic7. eB andular eC are at the to measured datum -C. lead tips with the leads unconstrained. eC must be zero or greater. 7. eB and eC are measuredat the lead tips withthe leads unconstrained. 8. B1 maximum dimensions not include dambar protrusions. Dambar protrusions shall eC must be zero ordogreater. not exceed 0.010 inch (0.25mm). 8. B1 maximumdimensionsdo not includedambarprotrusions.Dambar 9. N is the maximum number ofexceed terminal0.010 positions. protrusions shall not inch (0.25mm). 10. Corner N, N/2 andnumber N/2 + 1)offor E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 9. Nleads is the(1,maximum terminal positions. dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 willhave a B1 dimensionof 0.030 - 0.045 inch (0.76 - 1.14mm). © 2017 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 05/12/17 Inches Min Notes Min Max 5.33 - 0.210 4 - 0.015 - 4 A2 2.93 4.95 0.115 0.195 - B 0.356 0.558 0.014 0.022 - B1 1.15 1.77 0.045 0.070 8, 10 C 0.204 0.355 0.008 0.014 5 D 18.66 19.68 0.735 0.775 D1 0.13 - 0.005 - 5 E 7.62 8.25 0.300 0.325 6 E1 6.10 7.11 0.240 0.280 5 2.54 BSC e 7.62 BSC eA eB - L 2.93 N 16 0.100 BSC - 0.300 BSC 6 10.92 - 0.430 7 3.81 0.115 0.150 4 16 9 TVS Diode Arrays (SPA® Diodes) General Purpose ESD Protection - SP720 Series Package Dimensions — Small Outline Plastic Packages (SOIC) N Package INDEX AREA H 0.25(0.010) M B M E -B- SOIC Pins 16 JEDEC MS-012 Millimeters 1 2 3 L SEATING PLANE -A- h x 45o A D -C- µ e A1 B C 0.10(0.004) 0.25(0.010) M C A M B S Notes: 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. NOTES: 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 1. Symbols are defined in the “MO Series Symbolor List” in burrs. Section 2.2 flash, of 3. Dimension “D” does not include mold flash, protrusions gate Mold Publication 95.not exceed 0.15mm (0.006 inch) per side. protrusion and gateNumber burrs shall 2. Dimensioning andinclude tolerancing perflash ANSI 4. Dimension “E” does not interlead orY14.5M-1982. protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) perprotrusions side. 3. Dimension “D” does not include mold flash, or gate burrs. Moldflash, and gate not exceed 0.15mm (0.006 5. The chamfer on theprotrusion body is optional. If itburrs is notshall present, a visual index feature must be locatedinch) within the crosshatched area. per side. Inches Max Min Max A A1 B C D E 1.35 0.10 0.33 0.19 9.80 3.80 1.75 0.25 0.51 0.25 10.00 4.00 0.0532 0.0040 0.013 0.0075 0.3859 0.1497 0.0688 0.0098 0.020 0.0098 0.3937 0.1574 9 3 4 e H h L N 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.27 16 0.050 BSC 0.2284 0.2440 0.0099 0.0196 0.016 0.050 16 5 6 7 µ 0º 8º 0º 8º - Product Characteristics Lead Plating Matte Tin 5. The chamfer onshown the body is optional. If it is not present, a visualindex 8. Terminal numbers are for reference only. Lead Material Copper Alloy 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating 6. “L ” isnot theexceed lengthaofmaximum terminalfor soldering to a(0.024 substrate. plane, shall value of 0.61mm inch). Lead Coplanarity 0.004 inches (0.102mm) Substitute Material Silicon Body Material Molded Epoxy Flammability UL 94 V-0 6. “L” 4. is the length of terminal forinclude soldering to a substrate. Dimension “E” does not interlead flashor protrusions.Interlead and protrusions not exceed 0.25mm (0.010 inch) per side. 7. “N” is flash the number of terminalshall positions. feature must be located withinthe crosshatchedarea. 7. “N”isdimension:MILLIMETER. the numberof terminalConverted positions.inch dimensions are not necessarily 10. Controlling exact. 8. Terminal numbersare shownfor reference only. 9. The lead width“B”,as measured0.36mm(0.014 inch) or greaterabove the seating plane, shall not exceed a maximumvalue of 0.61mm (0.024 inch). Part Numbering System 10. Controllingdimension:MILLIMETER. Convertedinch dimensionsare not necessarilyexact. Notes Min SP720 ** ** P=Lead Free G=Green TG= Tape and Reel / Green TVS Diode Arrays (SPA® Diodes) Package Series AB = 16 Ld SOIC AP = 16 Ld PDIP See Ordering Information section for specific options available Ordering Information Part Number Temp. Range (ºC) Package Environmental Informaton Marking SP720APP -40 to 105 16 Ld PDIP Lead-free SP720AP(P) 1 1500 SP720ABG -40 to 105 16 Ld SOIC Green SP720A(B)G 2 1920 -40 to 105 16 Ld SOIC Tape and Reel Green SP720A(B)G 2 2500 SP720ABTG Min. Order Notes: 1. SP720AP(P) means device marking either SP720AP or SP720APP. 2. SP720A(B)G means device marking either SP720AG or SP720ABG which are good for types SP720ABG and SP720ABTG. Disclaimer Notice - Information furnished is believed to be accurate and reliable. However, users should independently evaluate the suitability of and test each product selected for their own applications. Littelfuse products are not designed for, and may not be used in, all applications. Read complete Disclaimer Notice at www.littelfuse.com/disclaimer-electronics. © 2017 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 05/12/17