HMNP16MM

HANBit HMNP16MM Non-Volatile SRAM MODULE 16Mbyte (4,096K x 32Bit), PCI interface, (SMM) 5V Part No. HMNP16MM GENERAL DESCRIPTION The HMNP16MM Nonvolatile SRAM is a 16,777,216-byte static RAM organized as 8,388,608 words by 16 bits. The HMNP16MM has a self-contained lithium energy source provide reliable non-volatility coupled with the unlimited write cycles of standard SRAM and integral control circuitry which constantly monitors the single 5V supply for an out-of-tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on to sustain the memory until after VCC returns valid and write protection is unconditionally enabled to prevent garbled data. In addition the SRAM is unconditionally write-protected to prevent an inadvertent write operation. At this time the integral energy source is switched on to sustain the memory until after VCC returns valid. The HMNP16MM uses extremely low standby current CMOS SRAM’s, coupled with small lithium coin cells to provide non-volatility without long write-cycle times and the write-cycle limitations associated with EEPROM. FEATURES w Access time : 70, 85 and 100ns w High-density design : 16Mbyte Design w Battery internally isolated until power is applied w Unlimited write cycles w Data retention in the absence of VCC w 10-years minimum data retention in absence of power w Automatic write-protection during power-up/power-down cycles w Data is automatically protected during power loss w Industrial temperature operation OPTIONS w Timing 70 ns 85 ns 100 ns MARKING - 70 - 85 -100 URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 1 HANBit Electronics Co.,Ltd HANBit PIN ASSIGNMENT HMNP16MM P1 PIN 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 Symbol NC TMS TDI GND NC NC P_RST* NC NC P_AD(30) GND P_AD(24) P_IDSEL NC P_AD(18) P_AD(16) GND P_TRDY* GND P_PERR* NC P_C_BE1* P_AD(14) GND P_AD(8) P_AD(7) NC NC NC GND ACK64* GND PIN 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 Symbol TRST* TDO GND NC NC NC NC NC GND P_AD(29) P_AD(26) NC P_AD(23) P_AD(20) GND P_C_BE2* NC NC P_STOP* GND P_SERR* GND P_AD(13) P_AD(10) NC NC NC GND NC NC NC NC PIN 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 Symbol TCK GND INTB* NC INTD* GND P_CLK GND P_REQ* NC P_AD(28) P_AD(25) GND P_AD(22) P_AD(19) NC P2 PIN 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 Symbol NC INTA* INTC* VCC NC NC GND P_GNT* VCC P_AD(31) P_AD(27) GND P_C_BE3* P_AD(21) VCC P_AD(17) GND P_IRDY* VCC P_LOCK* NC GND P_AD(15) P_AD(11) VCC P_C_BE0* P_AD(5) GND P_AD(3) P_AD(1) VCC REQ64* P_FRAME* GND P_DEVSEL* GND NC P_PAR NC P_AD(12) P_AD(9) GND P_AD(6) P_AD(4) NC P_AD(2) P_AD(0) GND URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 2 HANBit Electronics Co.,Ltd HANBit FUNCTIONAL DESCRIPTION HMNP16MM The HMNP16MM executes a read cycle whenever /WE is inactive(high) and /CE is active(low). The address specified by the address inputs(A0-A19) defines which of the 16,777,216 bytes of data is accessed. Valid data will be available to the eight data output drivers within tACC (access time) after the last address input signal is stable. When power is valid, the HMNP16MM operates as a standard CMOS SRAM. During power-down and powerup cycles, the HMNP16MM acts as a nonvolatile memory, automatically protecting and preserving the memory contents. The HMNP16MM is in the write mode whenever the /WE and /CE signals are in the active (low) state after address inputs are stable. The later occurring falling edge of /CE or /WE will determine the start of the write cycle. The write cycle is terminated by the earlier rising edge of /CE or /WE. All address inputs must be kept valid throughout the write cycle. /WE must return to the high state for a minimum recovery time (tWR) before another cycle can be initiated. The /OE control signal should be kept inactive (high) during write cycles to avoid bus contention. However, if the output bus been enabled (/CE and /OE active) then /WE will disable the outputs in tODW from its falling edge. The HMNP16MM provides full functional capability for Vcc greater than 4.5 V and write protects by 4.37 V nominal. Power-down/power-up control circuitry constantly monitors the Vcc supply for a power-fail-detect threshold VPFD. When VCC falls below the VPFD threshold, the SRAM automatically write-protects the data. All inputs to the RAM become “ don’t care” and all outputs are high impedance. As Vcc falls below approximately 3 V, the power switching circuit connects the lithium energy source to RAM to retain data. During power-up, when Vcc rises above approximately 3.0 volts, the power switching circuit connects external Vcc to the RAM and disconnects the lithium energy source. Normal RAM operation can resume after Vcc exceeds 4.5 volts. URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 3 HANBit Electronics Co.,Ltd HANBit BLOCK DIAGRAM HMNP16MM E X T E R N A L S L O T PCI BRIDGE BBUFFER UFFER BUFFER BUFFER BUFFER SSRAM RAM SRAM SRAM SRAM EPLD SSRAM RAM SRAM SRAM SRAM SSRAM RAM SRAM SRAM SRAM SSRAM RAM SRAM SRAM SRAM SSRAM RAM SRAM SRAM SRAM SSRAM RAM SRAM SRAM SRAM SSRAM RAM SRAM SRAM SRAM SSRAM RAM SRAM SRAM SRAM PPOWER OWER PPOWER OWER POWER CONTROLLER CONTROLLER CONTROLLER CONTROLLER CONTROLLER URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 4 HANBit Electronics Co.,Ltd HANBit TRUTH TABLE MODE Not selected Output disable Read W rite /OE X H L X /CE H L L L /WE X H H L I/O OPERATION High Z High Z DOUT DIN HMNP16MM POWER Standby Active Active Active ABSOLUTE MAXIMUM RATINGS PARAMETER Voltage on any pin relative to Vss Voltage on Vcc supply relative to Vss Power Dissipation Storage temperature Operating Temperature SYMBOL Vin,VCC Vcc Pd TSTG Ta RATING -0.5 to 7.0 -0.5 to 7.0 32 -65 to 150 0 to 70 -40 to 85 UNIT V V W °C °C °C K6T4016C3C-B K6T4016C3C-F REMARK NOTE: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the Recommended DC Operating Conditions detailed in this data sheet. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. RECOMMENDED DC OPERATING CONDITIONS PARAMETER Supply Voltage Ground Input high voltage Input low voltage SYMBOL VCC VSS VIH VIL MIN 4.5V 0 2.2 -0.5 ( TA= TOPR ) TYPICAL 5.0V 0 MAX 5.5V 0 VCC+0.5V 0.8V NOTE: Typical values indicate operation at TA = 25℃ URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 5 HANBit Electronics Co.,Ltd HANBit DC AND OPERATING CHARACTERISTICS (TA= TOPR, VCCmin £ PARAMETER Input Leakage Current Output Leakage Current Output high voltage Output low voltage Standby supply current(TTL) Standby supply current(CMOS) CONDITIONS VIN=VSS to VCC /CE=VIH or /OE=VIH or /WE=VIL IOH=-1.0mA IOL= 2.1mA /CE=VIH, Other input = Vil or Vih /CE≥VCC-0.2V, Other inputs = 0 ~ Vcc Min.cycle,duty=100%, /CE=VIL, II/O=0㎃ , A19VIH A20VIH ISB1 SYMBOL ILI ILO VOH VOL ISB MIN -1 -1 2.4 - HMNP16MM VCC≤ VCCmax ) TYP. MAX 1 1 0.4 3 UNIT mA mA V V ㎃ - 20 mA Operating supply current ICC - 10 ㎃ CAPACITANCE (TA=25℃ DESCRIPTION Input Capacitance Input/Output Capacitance , f=1MHz, VCC=5.0V) CONDITIONS Input voltage = 0V Output voltage = 0V SYMBOL CIN CI/O MAX 8 10 MIN UNIT pF pF AC CHARACTERISTICS (Test Conditions) PARAMETER Input pulse levels Input rise and fall times Input and output timing reference levels Output load (including scope and jig) VALUE 0 to 2.4V 5 ns 1.5V ( unless otherwise specified) See rignt Cl Cl = 100pF + 1TTL 50pF + 1TTL URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 6 HANBit Electronics Co.,Ltd HANBit READ CYCLE (TA= TOPR, VCCmin £ PARAMETER Read Cycle Time Address Access Time Chip enable access time Output enable to Output valid Chip enable to output in low Z Output enable to output in low Z Chip disable to output in high Z Output disable to output high Z Output hold from address change VCC≤ VCCmax ) 55 ns Min 55 55 55 25 5 5 0 0 10 20 20 Max MIN 70 5 5 0 0 10 HMNP16MM SYMBOL tRC tACC tACE tOE tCLZ tOLZ tCHZ tOHZ tOH 70 ns MAX 70 70 35 25 25 - UNIT Ns Ns Ns Ns ns ns ns ns ns WRITE CYCLE (TA= TOPR, VCCmin £ PARAMETER W rite Cycle Time Chip enable to end of write Address setup time Address valid to end of write W rite pulse width W rite recovery time W rite to output high-Z Data to writer time overlap Data hold from write time End write to output low-Z /LB, /UB valid to end of write NOTE: VCC ≤ VCCmax ) 50 ns MIN 55 45 0 45 45 0 0 25 0 5 45 20 MAX MIN 70 60 0 60 55 0 0 30 0 5 60 70ns MAX 25- SYMB OL tWC tCW tAS tAW tWP tWR1 tDW tDH1 tDH2 tWZ tOW UNIT ns ns ns ns ns ns ns ns ns ns ns 1. A write ends at the earlier transition of /CE going high and /WE going high. 2. A write occurs during the overlap of allow /CE and a low /WE. A write begins at the later transition of /CE going low and /WE going low. 3. Either tWR1 or tWR2 must be met. URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 7 HANBit Electronics Co.,Ltd HANBit 4. Either tDH1 or tDH2 must be met. HMNP16MM 5. If /CE goes low simultaneously with /WE going low or after /WE going low, the outputs remain in high-impedance state. TIMING WAVEFORM URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 8 HANBit Electronics Co.,Ltd HANBit HMNP16MM URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 9 HANBit Electronics Co.,Ltd HANBit HMNP16MM URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 10 HANBit Electronics Co.,Ltd HANBit PACKAGE DIMENSION HMNP16MM URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 11 HANBit Electronics Co.,Ltd HANBit HMNP16MM URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 12 HANBit Electronics Co.,Ltd HANBit HMNP16MM ORDERING INFORMATION Compone nt number 32 EA Part Number HMNP16MM-100 Density 16Mbyte Org. x 32 Package 128 Pin-MMC Vcc 5V Speed 100ns URL : www.hbe.co.kr Rev. 0.0 (April, 2002) 13 HANBit Electronics Co.,Ltd