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HMS25632J2V-70

HMS25632J2V-70

  • 厂商:

    HANBIT

  • 封装:

  • 描述:

    HMS25632J2V-70 - SRAM MODULE 1Mbyte (256K x 32-Bit) 3.3V, 68-Pin JLCC Packaging - Hanbit Electronics...

  • 数据手册
  • 价格&库存
HMS25632J2V-70 数据手册
HANBit HMS25632J2V SRAM MODULE 1Mbyte (256K x 32-Bit) 3.3V, 68-Pin JLCC Packaging Part No. HMS25632J2V GENERAL DESCRIPTION The HMS25632J2V is a high-speed static random access memory (SRAM) module containing 262,144 words organized in a x32-bit configuration. The module consists of two 256K x 16 SRAMs mounted on a 68-pin, double-sided, FR4-printed circuit board. The HMS25632J2V uses 31 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. Also it allows that lower and upper byte access by data byte control (/BS0~/BS3). Output enable (/OE) and write enable (/WE) can set the memory input and output. Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW. Reading is accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW. For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be powered from a single +3.3V DC power supply and all inputs and outputs are fully LVTTL-compatible. FEATURES w Access times : 10, 12 ,15, and 70, 85, 100ns w Low Power Dissipation w High-density 1Mbyte design w High-reliability, high-speed design w Single + 3.3V ±0.3V power supply w Easy memory expansion /CE and /OE functions w All inputs and outputs are LVTTL-compatible w Industry-standard pinout w FR4-PCB design w Low profile 68-pin JLCC PIN ASSIGNMENT D Q 16 NC / A 17 /B S3 /B S2 /B S1 /B S0 /CE 1 Vc c NC /CE 0 OE /WE A 16 A 15 A 14 D Q 15 DQ17 DQ18 DQ19 Vss DQ20 DQ21 DQ22 DQ23 Vcc DQ24 DQ25 DQ26 DQ27 Vss DQ28 DQ29 DQ30 10 9 8 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 26 44 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 OPTIONS w Timing 10ns access 12ns access 15ns access w Packages 68-pin JLCC MARKING -10 -12 -15 DQ14 DQ13 DQ12 Vss DQ11 DQ10 DQ9 DQ8 Vcc DQ7 DQ6 DQ5 DQ4 Vss DQ3 DQ2 DQ1 J PIN FUNCTION PIN NAME A0-A17 DQ0-31 /WE /CE /OE URL: www.hbe.co.kr Rev. 1.0 (September / 2002) PIN FUNCTION Address Inputs Data Inputs Write Enable Chip Enable Output Enable 1 D Q 31 A6 A5 A4 A3 A2 A1 A0 Vc c A 13 A 12 A 11 A 10 A9 A8 A7 DQ0 JLCC TOP VIEW PIN NAME /BS0 ~ /BS3 Vcc Vss N.C PIN FUNCTION Byte Controls Power(+3.3V) Ground No Connection HANBit Electronics Co.,Ltd. HANBit FUNCTIONAL BLOCK DIAGRAM HMS25632J2V DQ0 - DQ31 A0 - A17 /WE /OE /BS0 /BS1 /CE0 32 18 A0-17 /WE /OE /LB /UB /CE DQ 0-15 U1 A0-17 /WE /OE /BS2 /BS3 /LB /UB /CE /CE1 DQ 16-31 U2 URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 2 HANBit Electronics Co.,Ltd. HANBit ABSOLUTE MAXIMUM RATINGS PARAMETER Voltage on Any Pin Relative to Vss Voltage on Vcc Supply Relative to Vss Power Dissipation Storage Temperature Operating Temperature Commercial Industrial SYMBOL VIN,OUT VCC PD TSTG TA TA HMS25632J2V RATING -0.5V to +4.6V -0.5V to +4.6V 2W oC to +150oC -65 0oC to +70oC -40 C to +85 C O O w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. RECOMMENDED DC OPERATING CONDITIONS PARAMETER Supply Voltage Ground Input High Voltage Input Low Voltage * SYMBOL VCC VSS VIH VIL ( TA=0 to 70 o C ) MIN 3.0V 0 2.0 -0.3* TYP. 3.3V 0 MAX 3.6V 0 Vcc+0.3V** 0.8V VIL(Min.) = -2.0V (Pulse Width ≤ 10ns) for I ≤ 20 mA ** VIH(Min.) = Vcc+2.0V (Pulse Width ≤ 10ns) for I ≤ 20 mA DC AND OPERATING CHARACTERISTICS (1) (0oC ≤ TA ≤ 70 oC ; Vcc = 3.3V ± 0.3V, Unless otherwise specified) PARAMETER Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage * Vcc=3.3V, Temp=25 oC TEST CONDITIONS VIN = Vss to Vcc /CE=VIH or /OE =VIH or /WE=VIL VOUT=Vss to VCC IOH = -4.0mA IOL = 8.0mA SYMBOL ILI IL0 VOH VOL MIN -4 -4 2.4 0.4 MAX 4 4 UNITS µA µA V V URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 3 HANBit Electronics Co.,Ltd. HANBit DC AND OPERATING CHARACTERISTICS (2) DESCRIPTION TEST CONDITIONS Min. Cycle, 100% Duty /CE=VIL, VIN=VIH or VIL, IOUT=0mA Min. Cycle, /CE=VIH f=0MHZ, /CE≥VCC-0.2V, VIN≥ VCC-0.2V or VIN≤0.2V lSB lSB1 100 20 100 20 lCC 500 490 SYMBOL MAX -10 -12 HMS25632J2V -15 480 UNIT Power Supply Current:Operating Power Supply Current:Standby mA 100 20 mA mA CAPACITANCE DESCRIPTION Input /Output Capacitance Input Capacitance TEST CONDITIONS VI/O=0V VIN=0V SYMBOL CI/O CIN MAX 16 14 UNIT pF pF * NOTE: Capacitance is sampled and not 100% tested AC CHARACTERISTICS (0oC ≤ TA ≤ 70 oC ; Vcc = 3.3V ± 0.3V, unless otherwise specified) TEST CONDITIONS PARAMETER Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Levels Output Load VALUE 0 to 3V 3ns 1.5V See below Output Load (A) VL=1.5V 50Ω Z0=50Ω DOUT 30pF 353Ω Output Load (B) for tHZ, tLZ, tWHZ, tOW, tOLZ & tOHZ +3.3V 319Ω 5pF* DOUT URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 4 HANBit Electronics Co.,Ltd. HANBit READ CYCLE PARAMETER Read Cycle Time Address Access Time Chip Select to Output Output Enable toValid Output /BS0 ~ /BS3 Access Time Chip Enable to Low-Z Output Output Enable to Low-Z Output /BS0 ~ /BS3 Enable to Low-Z Output Chip Disable to High-Z Output Output Disable to High-Z Output /BS0 ~ /BS3 Disable to High-Z Output Output Hold from address Change SYMBOL MIN tRC tAA tCO tOE tBA tLZ tOLZ tBHZ tHZ tOHZ tBHZ tOH 10 3 0 0 0 0 0 3 -10 MAX 10 10 5 5 5 5 5 MIN 12 3 0 0 3 0 0 3 -12 MAX 12 12 6 6 6 6 6 - HMS25632J2V -15 MIN 15 3 0 0 0 0 0 3 MAX 15 15 7 7 7 7 7 - UNIT ns ns ns ns ns ns ns ns ns ns ns WRITE CYCLE PARAMETER Write Cycle Time Chip Select to End of Write Address Set-up Time Address Valid to End of Write Write Pulse Width (/OE High) Write Pulse Width (/OE Low) Write Recovery Time Write to Output High-Z Data to Write Time Overlap Data Hold from Write Time End of Write to Output Low-Z SYMBOL tWC tCW tAS tAW tWP tWP1 tWR tWHZ tDW tDH tOW -10 MIN 10 7 0 7 7 10 0 0 5 0 3 MAX 5 MIN 12 8 0 8 8 12 0 0 6 0 3 -12 MAX 6 MIN 15 10 0 10 10 15 0 0 7 0 3 -15 MAX 7 UNIT ns ns ns ns ns ns ns ns ns ns ns URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 5 HANBit Electronics Co.,Ltd. HANBit TIMING DIAGRAMS See Part No. HMS25632J2 HMS25632J2V FUNCTIONAL DESCRIPTION /CE H L L L /WE X* H H L /OE X H L X MODE Not Select Output Disable Read Write I/O PIN High-Z High-Z DOUT DIN SUPPLY CURRENT ISB, I SB1 ICC ICC ICC Note: X means Don't Care DATA RETENTION CHARACTERISTICS* (TA = 0 to 70 ℃ PARAMETER VCC for Data Retention Data Retention Current Data Retention Set-up Time Recovery Time * L-Version Only SYMBOL VDR IDR tSDR tRDR ) MIN 2.0 0 5 MAX 3.6 2.0 UNIT V mA ns ns TEST CONDITION /CE≥ VCC-0.2V VCC=3.0V, /CE≥ VCC-0.2V VIN≥ VCC-0.2V or VIN≤ 0.2V See Data Retention Wave forms(below) URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 6 HANBit Electronics Co.,Ltd. HANBit PACKAGING DIMENSIONS HMS25632J2V 24.94±0.20mm 4.30±0.20mm 0.46±0.20mm 23.67±0.20mm 1.278±0.20mm ORDERING INFORMATION Part Number Density Org. Package Function Vcc Access Time HMS25632J2V-10 HMS25632J2V-12 HMS25632J2V-15 HMS25632J2V-70 HMS25632J2V-85 HMS25632J2V-100 1MByte 1MByte 1MByte 1MByte 1MByte 1MByte 256KX 32bit 256KX 32bit 256KX 32bit 256KX 32bit 256KX 32bit 256KX 32bit 68 Pin-JLCC 68 Pin-JLCC 68 Pin-JLCC 68 Pin-JLCC 68 Pin-JLCC 68 Pin-JLCC Low power Low power Low power Low power Low power Low power 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V 10ns 12ns 15ns 70ns 85ns 100ns URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 7 HANBit Electronics Co.,Ltd.
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