0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
HMS51232J4-12

HMS51232J4-12

  • 厂商:

    HANBIT

  • 封装:

  • 描述:

    HMS51232J4-12 - SRAM MODULE 2Mbyte (512K x 32-Bit), 68-Pin JLCC Packaging - Hanbit Electronics Co.,L...

  • 详情介绍
  • 数据手册
  • 价格&库存
HMS51232J4-12 数据手册
HANBit HMS51232J4 SRAM MODULE 2Mbyte (512K x 32-Bit), 68-Pin JLCC Packaging Part No. HMS51232J4 GENERAL DESCRIPTION The HMS51232J4 is a static random access memory (SRAM) module containing 524,288 words organized in a x32-bit configuration. The module consists of four 512K x 8 SRAMs mounted on a 68-pin, single-sided, FR4-printed circuit board. Four chip enable inputs, (/CE1, /CE2, /CE3 and /CE4) are used to enable the module’s 4 bytes independently. Output enable(/OE) and write enable(/WE) can set the memory input and output. Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW. accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW. For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be powered from a single +5V DC power supply and all inputs and outputs are fully TTL-compatible. Reading is FEATURES w Access time : 10, 12 and 15ns w High-density 2MByte design w High-reliability, low-power design w Single +5V ±0.5V power supply w Three state output and TTL-compatible w FR4-PCB design w Low profile 68-Pin JLCC PIN ASSIGNMENT DQ 1 6 A1 8 A1 7 / CE 4 / CE 3 / CE 2 / CE 1 NC V cc NC NC / OE / WE A1 6 A1 5 A1 4 DQ 1 5 DQ17 DQ18 DQ19 Vss DQ20 DQ21 DQ22 DQ23 Vcc DQ24 DQ25 DQ26 DQ27 Vss DQ28 DQ29 DQ30 10 9 8 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 26 44 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 OPTIONS w Timing 10ns access 12ns access 15ns access w Packages 68-pin JLCC MARKING -10 -12 -15 J URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 1 DQ 3 1 A6 A5 A4 A3 A2 A1 A0 V cc A1 3 A1 2 A1 1 A1 0 A9 A8 A7 DQ 0 HANBit Electronics Co.,Ltd. 68-Pin JLCC TOP VIEW DQ14 DQ13 DQ12 Vss DQ11 DQ10 DQ9 DQ8 Vcc DQ7 DQ6 DQ5 DQ4 Vss DQ3 DQ2 DQ1 HANBit PIN DESCRIPTION DQ0 – DQ31 A0 – A18 /WE /CE1-4 /OE Vcc Vss Data Inputs/Outputs Address Inputs Write Enable Chip Selects Output Enable Power Supply Ground HMS51232J4 BLOCK DIAGRAM /CE1 /WE /OE A0-18 /CE2 /CE3 /CE4 U1 512Kx8 U2 512Kx8 U3 512Kx8 U4 512Kx8 8 8 8 8 DQ0-7 DQ8-15 DQ16-23 DQ24-31 TRUTH TABLE MODE STANDBY NOT SELECTED READ WRITE /OE X H L X /CE H L L L /WE X H H L DQ HIGH-Z HIGH-Z Dout Din POWER STANDBY ACTIVE ACTIVE ACTIVE URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 2 HANBit Electronics Co.,Ltd. HANBit ABSOLUTE MAXIMUM RATINGS PARAMETER Voltage on Any Pin Relative to Vss Voltage on Vcc Supply Relative to Vss Power Dissipation Storage Temperature Operating Temperature SYMBOL VIN,OUT VCC PD TSTG TA HMS51232J4 RATING -0.5V to +7.0V -0.5V to +7.0V 4W oC to +125oC -55 0oC to +70oC w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. RECOMMENDED DC OPERATING CONDITIONS ( TA=0 to 70 o C ) PARAMETER Supply Voltage Ground Input High Voltage Input Low Voltage * SYMBOL VCC VSS VIH VIL MIN 4.5V 0 2.2 -0.5* TYP. 5.0V 0 MAX 5.5V 0 Vcc+0.5V** 0.8V VIL(Min.) = -2.0V (Pulse Width ≤ 10ns) for I ≤ 20 mA ** VIH(Max.) = Vcc+2.0V (Pulse Width ≤ 10ns) for I ≤ 20 mA DC AND OPERATING CHARACTERISTICS (1)(0oC ≤ TA ≤ 70 oC ; Vcc = 5V ± 0.5V ) PARAMETER Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage * Vcc=5.0V, Temp=25 oC TEST CONDITIONS VIN = Vss to Vcc /CE=VIH or /OE =VIH or /WE=VIL VOUT=Vss to VCC IOH = -4.0mA IOL = 8.0mA SYMBOL ILI IL0 VOH VOL MIN -8 -8 2.4 MAX 8 8 0.4 UNITS µA µA V V DC AND OPERATING CHARACTERISTICS (2) DESCRIPTION TEST CONDITIONS Min. Cycle, 100% Duty /CE=VIL, VIN=VIH or VIL, IOUT=0mA Min. Cycle, /CE=VIH f=0MHZ, /CE≥VCC-0.2V, VIN≥ VCC-0.2V or VIN≤0.2V lSB lSB1 200 40 200 40 200 40 mA mA lCC 840 820 800 mA SYMBOL MAX -10 -12 -15 UNIT Power Supply Current: Operating Power Supply Current: Standby URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 3 HANBit Electronics Co.,Ltd. HANBit HMS51232J4 CAPACITANCE DESCRIPTION Input /Output Capacitance Input Capacitance TEST CONDITIONS VI/O=0V VIN=0V SYMBOL CI/O CIN MAX 32 28 UNIT pF pF * NOTE : Capacitance is sampled and not 100% tested AC CHARACTERISTICS (0oC ≤ TA ≤ 70 oC ; Vcc = 5V ± 0.5V, unless otherwise specified) TEST CONDITIONS PARAMETER Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Levels Output Load VALUE 0.V to 3V 3ns 1.5V See below Output Load (A) +5V 480Ω DOUT 255Ω 30pF* DOUT 255Ω Output Load (B) for tHZ, tLZ, tWHZ, tOW, tOLZ & tOHZ +5V 480Ω 5pF* * Including scope and jig capacitance READ CYCLE -10 PARAMETER Read Cycle Time Address Access Time Chip Select to Output Output Enable to Output Output Enable to Low-Z Output Chip Enable to Low-Z Output Output Disable to High-Z Output Chip Disable to High-Z Output Output Hold from Address Change Chip Select to Power Up Time Chip Select to Power Down Time URL: www.hbe.co.kr Rev. 1.0 (September / 2002) -12 MAX 10 10 5 5 5 10 MIN 12 0 3 0 0 3 0 MAX 12 12 6 6 6 12 MIN 15 0 3 0 0 3 0 - -15 UNIT MAX 15 15 7 7 7 15 ns ns ns ns ns ns ns ns ns ns ns SYMBOL MIN tRC tAA tCO tOE tOLZ tLZ tOHZ tHZ tOH tPU tPD 4 10 0 3 0 0 3 0 - HANBit Electronics Co.,Ltd. HANBit HMS51232J4 WRITE CYCLE PARAMETER Write Cycle Time Chip Select to End of Write Address Set-up Time Address Valid to End of Write Write Pulse Width (/OE=High) Write Pulse Width(/OE=Low) Write Recovery Time Write to Output High-Z Data to Write Time Overlap Data Hold from Write Time End of Write to Output Low-Z SYMBOL tWC tCW tAS tAW tWP tWP1 tWR tWZ tDW tDH tOW -10 MIN 10 10 0 7 7 10 0 0 5 0 3 MAX 5 MIN 12 12 0 8 8 12 0 0 6 0 3 -12 MAX 6 MIN 15 15 0 10 10 14 0 0 7 0 3 -15 MAX 7 UNIT ns ns ns ns ns ns ns ns ns ns ns TIMING DIAGRAMS Please refer to timing diagram chart. FUNCTIONAL DESCRIPTION /CE H L L L /WE X* H H L /OE X H L X MODE Not Select Output Disable Read Write I/O PIN High-Z High-Z DOUT DIN SUPPLY CURRENT I SB, I SB1 ICC ICC ICC Note: X means Don't Care URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 5 HANBit Electronics Co.,Ltd. HANBit PACKAGE DIMENSIONS HMS51232J4 4.30±0.20mm 0.46±0.20mm 1.278±0.20mm 23.44±0.25mm ORDERING INFORMATION Part Number Density Org. Package Component Number 4EA 4EA 4EA Vcc Access time HMS51232J4-10 HMS51232J4-12 HMS51232J4-15 2MByte 2MByte 2MByte 512KX 32bit 512KX 32bit 512KX 32bit 68 Pin-JLCC 68 Pin-JLCC 68 Pin-JLCC 5V 5V 5V 10ns 12ns 15ns URL: www.hbe.co.kr Rev. 1.0 (September / 2002) 6 HANBit Electronics Co.,Ltd.
HMS51232J4-12
1. 物料型号: - 型号为HMS51232.J4,这是一个静态随机存取存储器(SRAM)模块,包含524,288个存储单元,配置为512K x 32位。

2. 器件简介: - HMS51232.J4是一个包含524,288个存储单元的SRAM模块,这些存储单元被组织成32位配置。模块由四个512K x 8的SRAM组成,安装在一个68引脚的单面、FR4印刷电路板上。模块有四个芯片使能输入(CE1、CE2、CE3和CE4),可以独立启用模块的4个字节。输出使能(OE)和写入使能(WE)可以设置存储器的输入和输出。

3. 引脚分配: - 数据引脚(DQ0-DQ31):数据输入/输出。 - 地址引脚(A0-A18):地址输入。 - /WE:写使能。 - /CE1-4:芯片选择。 - /OE:输出使能。 - Vcc:电源。 - Vss:地。

4. 参数特性: - 访问时间有10ns、12ns和15ns三种规格。 - 高密度2MByte设计。 - 高可靠性、低功耗设计。 - 单+5V+0.5V电源供电。 - 三态输出,与TTL兼容。 - FR4-PCB设计。 - 低轮廓68引脚JLCC封装。

5. 功能详解: - 数据在写使能(WE)和芯片使能(CE)输入都为低电平时写入SRAM存储器。 - 当/WE保持高电平,/CE和输出使能/OE为低电平时完成读取。 - 为提高可靠性,该SRAM模块设计为多个电源和地引脚。所有模块组件都可以通过单个+5V电源供电。

6. 应用信息: - 该SRAM模块适用于需要高可靠性和低功耗存储解决方案的应用场合。

7. 封装信息: - 封装类型为68引脚JLCC(J-Lead Chip Carrier)。
HMS51232J4-12 价格&库存

很抱歉,暂时无法提供与“HMS51232J4-12”相匹配的价格&库存,您可以联系我们找货

免费人工找货