CA3028AM

SEMICONDUCTOR CA3028A, CA3028B, CA3053 Differential/Cascode Amplifiers for Commercial and Industrial Equipment from DC to 120MHz Description The CA3028A and CA3028B are differential/cascode amplifiers designed for use in communications and industrial equipment operating at frequencies from DC to 120MHz. The CA3028B is like the CA3028A but is capable of premium performance particularly in critical DC and differential amplifier applications requiring tight controls for input offset voltage, input offset current, and input bias current. The CA3053 is similar to the CA3028A and CA3028B but is recommended for IF amplifier applications. November 1996 Features • Controlled for Input Offset Voltage, Input Offset Current and Input Bias Current (CA3028 Series Only) • Balanced Differential Amplifier Configuration with Controlled Constant Current Source • Single-Ended and Dual-Ended Operation Applications • RF and IF Amplifiers (Differential or Cascode) • DC, Audio and Sense Amplifiers • Converter in the Commercial FM Band • Oscillator • Mixer • Limiter • Related Literature - Application Note AN5337 “Application of the CA3028 Integrated Circuit Amplifier in the HF and VHF Ranges.” This note covers characteristics of different operating modes, noise performance, mixer, limiter, and amplifier design considerations Ordering Information PART NUMBER (BRAND) CA3028A CA3028AE CA3028AM (3028A) CA3028AM96 (3028A) CA3028B CA3028BE CA3028BM (3028B) CA3053 CA3053E TEMP. RANGE (oC) -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 PACKAGE 8 Pin Metal Can 8 Ld PDIP 8 Ld SOIC 8 Ld SOIC Tape and Reel 8 Pin Metal Can 8 Ld PDIP 8 Ld SOIC 8 Pin Metal Can 8 Ld PDIP PKG. NO. T8.C E8.3 M8.15 M8.15 T8.C E8.3 M8.15 T8.C E8.3 Pinouts CA3028A/B, CA3053 (METAL CAN) TOP VIEW 8 1 7 Schematic Diagram CA3028A/B, (PDIP, SOIC) CA3053 (PDIP) TOP VIEW (Terminal Numbers Apply to All Packages) 8 6 1 2 8 7 6 5 1 7 2 R1 5kΩ Q1 Q2 5 2 – + 3 4 5 6 3 4 Q3 R2 2.8kΩ 4 R3 500Ω 3 SUBSTRATE AND CASE CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1996 File Number 382.3 7-6 CA3028A, CA3028B, CA3053 Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Thermal Information Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W) Metal Can Package . . . . . . . . . . . . . . . 225 140 PDIP Package . . . . . . . . . . . . . . . . . . . 155 N/A SOIC Package . . . . . . . . . . . . . . . . . . . 185 N/A Maximum Junction Temperature (Metal Can Package) . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Absolute Maximum Voltage Ratings TA = 25oC The following chart gives the range of voltages which can be applied to the terminals listed horizontally with respect to the terminals listed vertically. For example, the voltage range of the horizontal Terminal 4 with respect to Terminal 2 is -1V to +5V. TERM NO. 1 2 3 (Note 2) 4 5 6 7 8 +10 to 0 1 2 0 to -15 (Note 4) 3 0 to -15 (Note 4) +5 to -11 4 0 to -15 (Note 4) +5 to -1 5 +5 to -5 +15 to 0 (Note 6) +15 to 0 (Note 6) +15 to 0 (Note 6) 6 Note 3 Note 3 +30 to 0 (Note 7) Note 3 +20 to 0 (Note 5) 7 Note 3 +15 to 0 (Note 6) +15 to 0 (Note 6) Note 3 Note 3 Note 3 8 +20 to 0 (Note 5) Note 3 Absolute Maximum Current Ratings TERM NO. 1 2 IIN mA 0.6 4 0.1 20 0.6 20 4 20 IOUT mA 0.1 0.1 23 0.1 0.1 0.1 0.1 0.1 +30 to 0 (Note 7) Note 3 3 4 Note 3 5 Note 3 6 Note 3 7 8 NOTES: 2. Terminal No. 3 is connected to the substrate and case. 3. Voltages are not normally applied between these terminals. Voltages appearing between these terminals will be safe, if the specified voltage limits between all other terminals are not exceeded. 4. Limit is -12V for CA3053. 5. Limit is +15V for CA3053. 6. Limit is +12V for CA3053. 7. Limit is +24V for CA3028A and +18V for CA3053. Electrical Specifications PARAMETER DC CHARACTERISTICS Input Offset Voltage (Figures 1, 14) Input Offset Current (Figures 2, 14) Input Bias Current (Figures 2, 3, 15, 16) VIO IIO II TA = 25oC CA3028A CA3028B MAX MIN 70 106 TYP 0.98 0.89 0.56 1.06 16.6 36 MAX MIN 5.0 5.0 5.0 6.0 40 80 CA3053 TYP 29 36 MAX UNIT 85 125 mV mV µA µA µA µA µA µA SYMBOL TEST CONDITIONS VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V VCC = 9V VCC = 12V MIN - TYP 16.6 36 - 7-7 CA3028A, CA3028B, CA3053 Electrical Specifications PARAMETER Quiescent Operating Current (Figures 2, 3, 17, 18, 19) TA = 25oC (Continued) CA3028A SYMBOL I6, I8 TEST CONDITIONS VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V VCC = 9V VCC = 12V AGC Bias Current (Into Constant Current Source Terminal 7) (Figures 4, 20) Input Current (Terminal 7) Power Dissipation (Figures 2, 3, 21) I7 VCC = 12V, VAGC = 9V VCC = 12V, VAGC = 12V VCC = 9V VCC = 12V I7 PT VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V VCC = 9V VCC = 12V DYNAMIC CHARACTERISTICS Power Gain (Figures 5, 6, 7, 22, 24, 26) GP f = 100MHz Cascode VCC = 9V Diff. Amp. f = 10.7MHz Cascode (Note 8) VCC = 9V Noise Figure (Figures 5, 6, 7, 23, 25, 26) Input Admittance (Figures 27, 28) NF Y11 Diff. Amp. (Note 8) 16 14 35 28 20 17 39 32 7.2 6.7 0.6 + j1.6 0.5 + j0.5 0.0003 - j0 0.01 j0.0002 99 j18 -37 + j0.5 0+ j0.08 0.04 + j0.23 5.7 9.0 9.0 16 14 35 28 20 17 39 32 7.2 6.7 0.6 + j1.6 0.5 + j0.5 0.0003 - j0 0.01 j0.0002 99 j18 -37 + j0.5 0+ j0.08 0.04 + j0.23 5.7 9.0 9.0 35 28 39 32 0.6 + j1.6 0.5 + j0.5 0.0003 - j0 0.01 j0.0002 99 j18 -37 + j0.5 0+ j0.08 0.04 + j0.23 dB dB dB dB dB dB mS mS mS mS mS mS mS mS µW MIN 0.8 2.0 0.5 1.0 24 120 TYP 1.25 3.3 1.28 1.65 0.85 1.65 36 175 MAX MIN 2.0 5.0 1.0 2.1 54 260 1.0 2.5 0.5 1.0 24 120 CA3028B TYP 1.25 3.3 1.28 1.65 0.85 1.65 36 175 MAX MIN 1.5 4.0 1.0 2.1 42 220 1.2 2.0 CA3053 TYP 2.2 3.3 1.15 1.55 50 100 MAX UNIT 3.5 5.0 80 150 mA mA mA mA mA mA mA mA mA mA mW mW mW mW f = 100MHz, Cascode VCC = 9V Diff. Amp. f = 10.7MHz, Cascode VCC = 9V Diff. Amp. Reverse Transfer Admittance (Figures 29, 30) Forward Transfer Admittance (Figures 31, 32) Output Admittance (Figures 33, 34) Y12 f = 10.7MHz, Cascode VCC = 9V Diff. Amp. Y21 f = 10.7MHz, Cascode VCC = 9V Diff. Amp. Y22 f = 10.7MHz, Cascode VCC = 9V Diff. Amp. Output Power (Untuned) (Figures 8, 35) AGC Range (Maximum Power Gain to Full Cutoff) (Figures 9, 36) Voltage Gain (Figures 10, 11, 37, 38) Differential Voltage Gain at f = 1kHz (Figure 12) PO f = 10.7MHz, Diff. Amp., VCC = 9V 50Ω InputOutput f = 10.7MHz, Diff. Amp. VCC = 9V f = 10.7MHz, Cascode VCC = 9V, Diff. Amp. RL = 1kΩ VCC = 6V, VEE = -6V, RL = 2kΩ VCC = 12V, VEE = -12V, RL = 1.6kΩ AGC - 62 - - 62 - - - - dB A - 40 30 - - 35 40 40 30 38 42.5 42 45 - 40 30 - - dB dB dB dB A 7-8 CA3028A, CA3028B, CA3053 Electrical Specifications PARAMETER Max Peak-to-Peak Output Voltage at f = 1kHz (Figure 12) Bandwidth at -3dB Point (Figure 12) TA = 25oC (Continued) CA3028A SYMBOL VO(P-P) TEST CONDITIONS VCC = 6V, VEE = -6V, RL = 2kΩ VCC = 12V, VEE = -12V, RL = 1.6kΩ BW VCC = 6V, VEE = -6V, RL = 2kΩ VCC = 12V, VEE = -12V, RL = 1.6kΩ Common Mode Input Voltage Range (Figure 13) Common Mode Rejection Ratio (Figure 13) Input Impedance at f = 1kHz Peak-to-Peak Output Current VCMR VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V CMRR ZIN IP-P VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V f = 10.7MHz, VCC = 9V eIN = VCC = 12V 400mV, Diff. Amp. MIN 2.0 3.5 TYP 4.0 6.0 MAX MIN 7.0 10 7.0 15 -2.5 -5.0 60 60 2.5 4.5 CA3028B TYP 11.5 23 7.3 8.0 -3.2 to -4.5 -7 to -9 110 90 5.5 3.0 4.0 6.0 MAX MIN 4 7 6.0 8.0 2.0 3.5 CA3053 TYP 4.0 6.0 MAX UNIT 7.0 10 VP-P VP-P MHz MHz V V dB dB kΩ kΩ mA mA NOTE: 8. Does not apply to CA3053. Test Circuits VCC VCC 3µF 1kΩ 1kΩ DC DIFF. VOLTMETER FLUKE TYPE 80 OR EQUIV. I6 + + 3µF I8 270Ω 6 2.7Ω 2.7Ω 1 + 2.7Ω R1 10Ω NOTE 9 VIO NOTE 10 DC VTVM 5 2.7Ω ICUT 8 VOUT 6 8 - 3V 1 I1 3 + ICUT 3 270Ω 7 3µF VEE + 5 + I5 7+ I7 I3 3µF VEE NOTES: 9. Adjust R1 for VOUT = 0V ±0.1V. 10. Record Input Offset Voltage. FIGURE 1. INPUT OFFSET VOLTAGE TEST CIRCUIT FOR CA3028B NOTE: Power Dissipation = I3 V EE + ( I 6 + I 8 ) V CC . FIGURE 2. INPUT OFFSET CURRENT, INPUT BIAS CURRENT, POWER DISSIPATION, AND QUIESCENT OPERATING CURRENT TEST CIRCUIT FOR CA3028A AND CA3028B 7-9 CA3028A, CA3028B, CA3053 Test Circuits (Continued) VCC 1kΩ 7 I1 1 I7 I8 8 5 CA3053 5 6 ICUT 6 3 I3 I6 8 7 I7 3 1 2kΩ 1kΩ VCC I5 2kΩ 5kΩ VCC NOTE: Power Dissipation = VCCI3. FIGURE 3. INPUT BIAS CURRENT, POWER DISSIPATION AND QUIESCENT OPERATING CURRENT TEST CIRCUIT FOR CA3053 FIGURE 4. AGC BIAS CURRENT TEST CIRCUIT (DIFFERENTIAL AMPLIFIER CONFIGURATION) FOR CA3028A AND CA3028B VCC 7 470pF 2 C1 L1 4 50Ω SIGNAL SOURCE (NOTE 11) OR NOISE DIODE (NOTE 12) 3 0.001µF 0.001µF 2kΩ ICUT 1 5 6 8 C2 50Ω RF VOLTMETER (NOTE 11) OR NOISE AMP (NOTE 12) L1 3 1kΩ 0.001 µF C1 1 ICUT 5 8 7 6 C2 1kΩ L2 VCC L2 50Ω SIGNAL SOURCE (NOTE 14) OR NOISE DIODE (NOTE 15) 50Ω RF VOLTMETER (NOTE 14 OR NOISE AMP (NOTE 15) 0.001µF 2kΩ f (MHz) 10.7 100 NOTES: C1 (pF) C2 (pF) L1 (µH) 3-5 L2 (µH) 3-5 f (MHz) 10.7 100 NOTES: C1 (pF) C2 (pF) L1 (µH) 3-6 0.2 - 0.5 L2 (µH) 3-6 0.2 - 0.5 20 - 60 20 - 60 3 - 30 30 - 60 20 - 50 2 - 15 2 - 15 3 - 30 0.1 - 0.25 0.15 - 0.3 11. For Power Gain Test. 12. For Noise Figure Test. 13. 10.7MHz Power Gain Test Only. FIGURE 5. POWER GAIN AND NOISE FIGURE TEST CIRCUIT (CASCODE CONFIGURATION) FOR CA3028A, CA3028B AND CA3053 (NOTE 3) 14. For Power Gain Test. 15. For Noise Figure Test. 16. 10.7MHz Power Gain Test Only. FIGURE 6. POWER GAIN AND NOISE FIGURE TEST CIRCUIT (DIFFERENTIAL AMPLIFIER CONFIGURATION AND TERMINAL 7 CONNECTED TO VCC) FOR CA3028A, CA3028B AND CA3053 (NOTE 3) 7-10 CA3028A, CA3028B, CA3053 Test Circuits (Continued) 5kΩ VCC 7 C1 1 L1 3 ICUT 5 8 6 C2 50Ω RF VOLTMETER (NOTE 17) OR NOISE AMP (NOTE 18) VCC VCC 1kΩ 1kΩ L2 50Ω SIGNAL SOURCE (NOTE 17) OR NOISE DIODE (NOTE 18) 0.001µF 2kΩ f (MHz) 10.7 100 NOTES: C1 (pF) C2 (pF) L1 (µH) 3-6 0.2 - 0.5 L2 (µH) 3-6 0.2 - 0.5 5 0.01 µF 2kΩ 50Ω 1 3 INPUT 0.01µF ICUT 7 8 6 0.01 µF 30 - 60 20 - 50 2 - 15 2 - 15 50Ω OUTPUT 0.01µF 17. For Power Gain Test. 18. For Noise Figure Test. FIGURE 7. POWER GAIN AND NOISE FIGURE TEST CIRCUIT (DIFFERENTIAL AMPLIFIER CONFIGURATION) FOR CA3028A AND CA3028B FIGURE 8. OUTPUT POWER TEST CIRCUIT FOR CA3028A AND CA3028B 5kΩ VCC 7 C1 50Ω SIGNAL SOURCE 1 L1 3 ICUT 5 8 6 1kΩ L2 C2 50Ω RF VOLTMETER 8 7 OUTPUT 0.001µF 1 2kΩ INPUT 2 50Ω 0.01µF 3 4 0.01µF 0.01µF ICUT 5 1kΩ 0.01µF 6 1kΩ LOAD VCC 10Ω f (MHz) 10.7 100 C1 (pF) C2 (pF) L1 (µH) 3-6 0.2 - 0.5 L2 (µH) 3-6 0.2 - 0.5 2kΩ 30 - 60 20 - 50 2 - 15 2 - 15 FIGURE 9. AGC RANGE TEST CIRCUIT (DIFFERENTIAL AMPLIFIER) FOR CA3028A AND CA3028B FIGURE 10. TRANSFER CHARACTERISTIC (VOLTAGE GAIN) TEST CIRCUIT (10.7MHz) CASCODE CONFIGURATION FOR CA3028A, CA3028B AND CA3053 7-11 CA3028A, CA3028B, CA3053 Test Circuits (Continued) VCC OSCILLOSCOPE WITH HIGH GAIN DIFF. INPUT (TEKTRONIX TYPE 530, 540, OR 580 VDIFF WITH TYPE D (RMS) PLUG-IN TEKTRONIX TYPE 502 OR EQUIVALENT) VCC 10Ω 3µF R (NOTE) R (NOTE) 1kΩ LOAD 8 INPUT 50Ω ICUT 3 5 1kΩ 0.01µF 0.01µF 1 7 OUTPUT 6 6 5µF 1 50Ω VIN = 10mV (RMS) INPUT SIGNAL f = 1kHz ICUT 3 7 5 8 10µH 0.001µF 3µF VEE 2kΩ NOTE: For R = 1.6kΩ: VCC = 12V, VEE = -12V For R = 2.0kΩ: VCC = 6V, VEE = -6V. FIGURE 11. TRANSFER CHARACTERISTIC (VOLTAGE GAIN) TEST CIRCUIT (10.7MHz) DIFFERENTIAL AMPLIFIER CONFIGURATION FOR CA3028A, CA3028B AND CA3053 FIGURE 12. DIFFERENTIAL VOLTAGE GAIN, MAXIMUM PEAKTO-PEAK OUTPUT VOLTAGE AND BANDWIDTH TEST CIRCUIT FOR CA3028B VCC 3µF 1kΩ 6 5µF 1 500Ω INPUT SIGNAL f = 1kHz 5 S1 7 3 VIN = 0.3V (RMS) VEE VX RANGE OF COMMON MODE REJECTION ICUT OSCILLOSCOPE WITH HIGH GAIN DIFF. INPUT (TEKTRONIX TYPE 530, 540, OR 580 VDIFF WITH TYPE D (RMS) PLUG-IN TEKTRONIX TYPE 502 OR 8 EQUIVALENT) 1kΩ 3µF NOTES: 19. For CMR test: S1 to GND. 20. For Input Common Mode Voltage Range Test: S1 to VX. ( A ) ( 2 ) ( 0.3 ) 21. Common Mode Rejection Ratio = 20log 10 -----------------------------------V DIFF ( RMS ) A = Single-Ended Voltage Gain. FIGURE 13. COMMON MODE REJECTION RATIO AND COMMON MODE INPUT VOLTAGE RANGE TEST CIRCUIT FOR CA3028B 7-12 CA3028A, CA3028B, CA3053 Typical Performance Curves POSITIVE DC SUPPLY VOLTS (VCC) NEGATIVE DC SUPPLY VOLTS (VEE) INPUT OFFSET VOLTAGE (mV), INPUT OFFSET CURRENT (µA) INPUT BIAS CURRENT (µA) POSITIVE DC SUPPLY VOLTS (VCC) NEGATIVE DC SUPPLY VOLTS (VEE) 75.0 62.5 50.0 37.5 25.0 12.5 2.0 1.5 1.0 0.5 0 -75 OFFSET CURRENT VCC = +12V VEE = -12V VCC = +12V VEE = -12V VCC = +6V VEE = -6V VCC = +6V VEE = -6V -50 -25 0 25 50 75 TEMPERATURE (oC) 100 125 0 -75 -50 -25 0 25 50 75 TEMPERATURE (oC) 100 125 FIGURE 14. INPUT OFFSET VOLTAGE AND INPUT OFFSET CURRENT FOR CA3028B vs TEMPERATURE FIGURE 15. INPUT BIAS CURRENT vs TEMPERATURE FOR CA3028A AND CA3028B 75.0 INPUT BIAS CURRENT (µA) 62.5 50.0 VCC = +12V 37.5 VCC = +9V 25.0 12.5 0 -75 QUIESCENT OPERATING CURRENT (mA) POSITIVE DC SUPPLY VOLTS (VCC ) DIFFERENTIAL AMPLIFIER CONFIGURATION 3.5 VEE = -12V 2.5 VEE = -9V -50 -25 0 25 50 75 TEMPERATURE (oC) 100 125 1.5 -75 -50 -25 0 25 50 75 TEMPERATURE (oC) 100 125 FIGURE 16. INPUT BIAS CURRENT vs TEMPERATURE FOR CA3053 FIGURE 17. QUIESCENT OPERATING CURRENT vs TEMPERATURE FOR CA3028A AND CA3028B 3.5 DIFFERENTIAL AMPLIFIER CONFIGURATION QUIESCENT OPERATING CURRENT (mA) OPERATING CURRENT, I6 OR I8 (mA) 3.0 2.5 2.0 1.5 1.0 0.5 0 -50 -25 0 25 50 75 TEMPERATURE (oC) 100 125 VCC = 6V 3.5 VCC = +12V 2.5 VCC = +9V 1.5 -75 0 -5 -10 -15 DC EMITTER SUPPLY (V) -20 FIGURE 18. QUIESCENT OPERATING CURRENT vs TEMPERATURE FOR CA3053 FIGURE 19. OPERATING CURRENT vs VEE VOLTAGE FOR CA3028A AND CA3028B 7-13 CA3028A, CA3028B, CA3053 Typical Performance Curves (Continued) TOTAL POWER DISSIPATION, ±6V (mW) TOTAL POWER DISSIPATION, ±12V (mW) DIFFERENTIAL AMPLIFIER CONFIGURATION TA = 25oC 180 VCC = +12V VEE = -12V 40 2 AGC BIAS CURRENT (mA) 170 VCC = +6V VEE = -6V 35 1 160 30 0 0 2 6 8 4 10 AGC BIAS, TERMINAL NO. 7 (V) 12 150 -50 -25 0 25 50 75 100 TEMPERATURE (oC) 25 125 FIGURE 20. AGC BIAS CURRENT vs BIAS VOLTAGE (TERMINAL 7) FOR CA3028A AND CA3028B FIGURE 21. POWER DISSIPATION vs TEMPERATURE FOR CA3028A AND CA3028B 45 40 35 POWER GAIN (dB) 30 25 20 15 10 5 0 10 CASCODE CONFIGURATION TA = 25oC VCC = +12V 9 VCC = +9V NOISE FIGURE (dB) 8 7 6 5 20 30 40 50 FREQUENCY (MHz) 60 70 80 90 100 CASCODE CONFIGURATION TA = 25oC, f = 100MHz 9 10 11 12 DC COLLECTOR SUPPLY VOLTAGE (V) FIGURE 22. POWER GAIN vs FREQUENCY (CASCODE CONFIGURATION) FOR CA3028A AND CA3028B FIGURE 23. 100MHz NOISE FIGURE vs COLLECTOR SUPPLY VOLTAGE (CASCODE CONFIGURATION) FOR CA3028A AND CA3028B 40 35 POWER GAIN (dB) 30 25 20 15 10 5 DIFFERENTIAL AMPLIFIER CONFIGURATION DIFFERENTIAL AMPLIFIER CONFIGURATION TA = 25oC DIFFERENTIAL AMPLIFIER CONFIGURATION TA = 25oC, f = 100MHz VCC = +12V 9 VCC = +9V NOISE FIGURE (dB) 8 7 6 5 20 30 40 50 60 70 80 90 100 FREQUENCY (MHz) 9 12 10 11 DC COLLECTOR SUPPLY VOLTAGE (V) 0 10 FIGURE 24. POWER GAIN vs FREQUENCY (DIFFERENTIAL AMPLIFIER CONFIGURATION) FOR CA3028A AND CA3028B FIGURE 25. 100MHz NOISE FIGURE vs COLLECTOR SUPPLY VOLTAGE (DIFFERENTIAL AMPLIFIER CONFIGURATION) FOR CA3028A AND CA3028B 7-14 CA3028A, CA3028B, CA3053 Typical Performance Curves NOISE FIGURE (dB) OR POWER GAIN (dB) (Continued) DIFFERENTIAL AMPLIFIER CONFIGURATION TA = 25oC, VCC = +9V, f = 100MHz INPUT CONDUCTANCE (g11) OR SUSCEPTANCE (b11) (mS) CASCODE CONFIGURATION, TA = 25oC IC(STAGE) = 4.5mA, VCC = +9V 7 6 5 4 3 2 1 0 g11 b11 20 POWER GAIN 15 10 NOISE FIGURE 5 0 9 8 7 6 5 4 POSITIVE DC BIAS VOLTAGE (V) 3 2 1 10 FREQUENCY (MHz) 100 FIGURE 26. 100MHz NOISE FIGURE AND POWER GAIN vs BASE-TO-EMITTER BIAS VOLTAGE (TERMINAL 7) FOR CA3028A AND CA3028B FIGURE 27. INPUT ADMITTANCE (Y11) vs FREQUENCY (CASCODE CONFIGURATION) REVERSE TRANSFER CONDUCTANCE (g12) OR SUSCEPTANCE (b12) (µS) DIFFERENTIAL AMPLIFIER CONFIGURATION TA = 25oC, VCC = +9V 3 INPUT CONDUCTANCE (g11) OR SUSCEPTANCE (b11) (mS) IC OF EACH TRANSISTOR = 2.2mA CASCODE CONFIGURATION, TA = 25oC IC(STAGE) = 4.5mA, VCC = +9V 20 15 10 5 0 -5 -10 -15 -20 1 10 FREQUENCY (MHz) 100 b12 g12 2 b11 1 g11 0 1 10 FREQUENCY (MHz) 100 FIGURE 28. INPUT ADMITTANCE (Y11) vs FREQUENCY (DIFFERENTIAL AMPLIFIER CONFIGURATION) REVERSE TRANSFER CONDUCTANCE (g12) OR SUSCEPTANCE (b12) (mS) FIGURE 29. REVERSE TRANSADMITTANCE (Y12) vs FREQUENCY (CASCODE CONFIGURATION) FORWARD TRANSFER CONDUCTANCE (g21) OR SUSCEPTANCE (b21) (mS) 0.3 0.2 DIFFERENTIAL AMPLIFIER CONFIGURATION TA = 25oC, VCC = +9V IC OF EACH TRANSISTOR = 2.2mA g12 CASCODE CONFIGURATION, TA = 25oC IC(STAGE) = 4.5mA, VCC = +9V 100 80 60 40 20 0 -20 -40 -60 -80 1 2 3 4 5 6 7 8 910 FREQUENCY (MHz) 100 b21 g21 0.1 0 -0.1 -0.2 -0.3 10 b12 20 30 40 50 60 80 100 200 300 FREQUENCY (MHz) FIGURE 30. REVERSE TRANSADMITTANCE (Y12) vs FREQUENCY (DIFFERENTIAL AMPLIFIER CONFIGURATION) FIGURE 31. FORWARD TRANSADMITTANCE (Y21) vs FREQUENCY (CASCODE CONFIGURATION) 7-15 CA3028A, CA3028B, CA3053 Typical Performance Curves FORWARD TRANSFER CONDUCTANCE (g21) OR SUSCEPTANCE (b21) (mS) (Continued) CASCODE CONFIGURATION, TA = 25oC IC(STAGE) = 4.5mA, VCC = +9V 3 b22 2 1 0 -0.02 -0.04 -0.06 -0.08 1 10 FREQUENCY (MHz) 100 g22 0 OUTPUT CONDUCTANCE (g22) (mS) 30 20 10 0 -10 -20 -30 -40 1 b21 g21 10 FREQUENCY (MHz) 100 FIGURE 32. FORWARD TRANSADMITTANCE (Y21) vs FREQUENCY (DIFFERENTIAL AMPLIFIER CONFIGURATION) FIGURE 33. OUTPUT ADMITTANCE (Y22) vs FREQUENCY (CASCODE CONFIGURATION) OUTPUT CONDUCTANCE (g22) (mS) DIFFERENTIAL AMPLIFIER CONFIGURATION, TA = 25oC IC OF EACH TRANSISTOR = 2.2mA, VCC = +9V 10 OUTPUT SUSCEPTANCE (b22) (mS) 2 DIFFERENTIAL AMPLIFIER CONFIGURATION TA = 25oC, CONSTANT POWER INPUT = 2µW OUTPUT POWER (µW) 0.6 0.5 0.4 0.3 0.2 0.1 0 1 10 FREQUENCY (MHz) g22 b22 1.5 VCC = +12V 1.0 VCC = +9V 0.5 0 100 1 10 FREQUENCY (MHz) 100 FIGURE 34. OUTPUT ADMITTANCE (Y22) vs FREQUENCY (DIFFERENTIAL AMPLIFIER CONFIGURATION) FIGURE 35. OUTPUT POWER vs FREQUENCY - 50Ω INPUT AND 50Ω OUTPUT (DIFFERENTIAL AMPLIFIER CONFIGURATION) FOR CA3028A AND CA3028B CASCODE CONFIGURATION TA = 25oC, f = 10.7MHz 5 DIFFERENTIAL AMPLIFIER CONFIGURATION TA = 25oC, VCC = +9V f = 10.7MHz POWER GAIN (dB) 20 100MHz 0 OUTPUT VOLTAGE (V) 40 4 3 VCC = +12V VCC = +9V 2 1 0 0 0.05 0.1 INPUT VOLTAGE (V) 0.15 -20 -40 9 8 7 6 5 4 3 2 1 0 DC BIAS VOLTAGE ON TERMINAL NO. 7 (V) FIGURE 36. AGC CHARACTERISTICS FOR CA3028A AND CA3028B FIGURE 37. TRANSFER CHARACTERISTICS (CASCODE CONFIGURATION) 7-16 OUTPUT SUSCEPTANCE (b22) (mS) DIFFERENTIAL AMPLIFIER CONFIGURATION TA = 25oC, VCC = +9V IC OF EACH TRANSISTOR = 2.2mA CA3028A, CA3028B, CA3053 Typical Performance Curves 3.0 DIFFERENTIAL AMPLIFIER CONFIGURATION TA = 25oC, f = 10.7MHz OUTPUT VOLTAGE (V) 2.5 2.0 VCC = +12V (Continued) 1.5 VCC = +9V 1.0 0.5 0 0.05 0.1 INPUT VOLTAGE (V) 0.15 FIGURE 38. TRANSFER CHARACTERISTICS (DIFFERENTIAL AMPLIFIER CONFIGURATION) Glossary of Terms AGC Bias Current The current drawn by the device from the AGC voltage source, at maximum AGC voltage. AGC Range The total change in voltage gain (from maximum gain to complete cutoff) which may be achieved by application of the specified range of dc voltage to the AGC input terminal of the device. Common Mode Rejection Ratio The ratio of the full differential voltage gain to the common mode voltage gain. Power Dissipation The total power drain of the device with no signal applied and no external load current. Input Bias Current The average value (one half the sum) of the currents at the two input terminals when the quiescent operating voltages at the two output terminals are equal. Input Offset Current The difference in the currents at the two input terminals when the quiescent operating voltages at the two output terminals are equal. Input Offset Voltage The difference in the DC voltages which must be applied to the input terminals to obtain equal quiescent operating voltages (zero output offset voltage) at the output terminals. Noise Figure The ratio of the total noise power of the device and a resistive signal source to the noise power of the signal source alone, the signal source representing a generator of zero impedance in series with the source resistance. Power Gain The ratio of the signal power developed at the output of the device to the signal power applied to the input, expressed in dB. Quiescent Operating Current The average (DC) value of the current in either output terminal. Voltage Gain The ratio of the change in output voltage at either output terminal with respect to ground, to a change in input voltage at either input terminal with respect to ground, with the other input terminal at AC ground. 7-17