RFD3055SM

SEMICONDUCTOR RFD3055, RFD3055SM RFP3055 12A, 60V, Avalanche Rated, N-Channel Enhancement-Mode Power MOSFETs (MegaFETs) Packaging JEDEC TO-220AB TOP VIEW DRAIN (FLANGE) SOURCE DRAIN GATE February 1994 Features • 12A, 60V • rDS(ON) = 0.150Ω • Temperature Compensating PSPICE Model • Peak Current vs Pulse Width Curve • UIS Rating Curve • +175oC Operating Temperature Description DRAIN (FLANGE) JEDEC TO-251AA TOP VIEW SOURCE DRAIN GATE DRAIN (FLANGE) The RFD3055, RFD3055SM and RFP3055 N-Channel power MOSFETs are manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI integrated circuits gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switching regulators, switching converters, motor drivers, relay drivers and emitter switches for bipolar transistors. These transistors can be operated directly from integrated circuits. The RFD3055 is supplied in the JEDEC TO-251AA plastic package, the RFD3055SM is supplied in the JEDEC TO-252AA plastic package and the RFP3055 is supplied in the JEDEC TO-220AB plastic package. Due to space limitations the RFD3055 and RFD3055SM are branded FD3055. When ordering RFD3055SM. use the entire part number; eg. JEDEC TO-252AA TOP VIEW SOURCE DRAIN GATE Symbol D Developmental type TA49082. G S Absolute Maximum Ratings (TC = +25oC), Unless Otherwise Specified RFD3055, RFD3055SM, RFP3055 60 60 ±20 12 Refer to Peak Current Curve Refer to UIS Curve 30 53 0.357 -55 to +175 UNITS V V V A Drain Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain Gate Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Drain Current RMS Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Maximum Avalanche Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IAM Power Dissipation TC = +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate above +25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PT Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TSTG, TJ A W W/oC oC Copyright © Harris Corporation 1994 1 File Number 3648 Specifications RFD3055, RFD3055SM, RFP3055 Electrical Specifications TC = +25oC, Unless Otherwise Specified LIMITS PARAMETER Drain-Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current SYMBOL BVDSS VGS(TH) IDSS TEST CONDITIONS ID = 0.25mA, VGS = 0V VGS = VDS, ID = 0.25mA VDS = 60V, VGS = 0V VGS = ±20V ID = 12A, VGS = 10V VDD = 30V, ID = 12A RL = 2.5Ω, VGS = +10V RGS = 10Ω TC = +25oC TC = +150oC MIN 60 2 VGS = 0 to 20V VGS = 0 to 10V VGS = 0 to 2V ID = 12A, VDS = 15V VDS = 25V, VGS = 0V f = 1MHz VDD = 48V, ID = 12A, RL = 4Ω TO-251 and TO-252 Package TO-220 Package TYP 7 21 16 10 19 10 0.6 300 100 30 MAX 4 1 50 100 0.150 40 40 23 12 0.8 7.5 2.8 100 80 UNITS V V µA µA nA W ns ns ns ns ns ns nC nC nC V pF pF pF oC/W oC/W oC/W Gate-Source Leakage Current On Resistance Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time Total Gate Charge Gate Charge at 10V Threshold Gate Charge Plateau Voltage Input Capacitance Output Capacitance Reverse Transfer Capacitance Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient IGSS rDS(ON) tON tD(ON) tR tD(OFF) tF tOFF QG(TOT) QG(10) QG(TH) V(PLATEAU) CISS COSS CRSS RθJC RθJA Source-Drain Diode Ratings and Characteristics LIMITS PARAMETER Forward Voltage Reverse Recovery Time SYMBOL VSD tRR TEST CONDITIONS ISD = 12A ISD = 12A, dISD /dt = 100A/µs MIN TYP MAX 1.5 100 UNITS V ns 2 RFD3055, RFD3055SM, RFP3055 Typical Performance Curves 50 TC = +25oC 10 10 100µs NORMALIZED THERMAL RESPONSE (ZθJC) ID , DRAIN CURRENT (A) 1 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE PDM 1ms 10ms DC OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 0.1 1 10 VDS , DRAIN-TO-SOURCE VOLTAGE (V) 100 1 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC 10-2 10-1 100 101 VDSS MAX = 60V 0.01 10-5 10-4 10-3 t, RECTANGULAR PULSE DURATION (s) FIGURE 1. SAFE- OPERATING AREA CURVE FIGURE 2. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE TC = +25oC 200 IDM , PEAK CURRENT CAPABILITY (A) FOR TEMPERATURES ABOVE +25oC DERATE PEAK CURRENT CAPABILITY AS FOLLOWS: 175 – T C * ------------------150 14 12 ID , DRAIN CURRENT (A) 10 8 6 4 2 0 25 50 75 100 125 150 175 TC , CASE TEMPERATURE (oC) 100 'I VGS = 20V = I 25 VGS = 10V TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION 10 10-3 10-2 10-1 100 101 102 103 104 t, PULSE WIDTH (ms) FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs TEMPERATURE PULSE DURATION = 250µs 24 VGS = 10V ID , DRAIN CURRENT (A) 18 VGS = 7V 12 VGS = 6V 6 VGS = 5V VGS = 4.5V 0 0.0 1.5 3.0 4.5 6.0 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 7.5 TC = +25oC VGS = 8V ID(ON) , ON STATE DRAIN CURRENT (A) 24 FIGURE 4. PEAK CURRENT CAPABILITY VDD = 15V PULSE TEST PULSE DURATION = 250µs DUTY CYCLE = 0.5% MAX 18 -55oC +25oC +175oC 12 6 0 0.0 2.0 4.0 6.0 8.0 10.0 VGS , GATE-TO-SOURCE VOLTAGE (V) FIGURE 5. TYPICAL SATURATION CHARACTERISTICS FIGURE 6. TYPICAL TRANSFER CHARACTERISTICS 3 RFD3055, RFD3055SM, RFP3055 Typical Performance Curves 2.5 (Continued) VGS = VDS, ID = 250µA 2.0 PULSE DURATION = 250µs, VGS = 10V, ID = 12A 2.0 NORMALIZED RDS(ON) NORMALIZED VGS(TH) 1.5 1.5 1.0 1.0 0.5 0.5 0.0 -80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC) 200 0.0 -80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC) 200 FIGURE 7. NORMALIZED RDS(ON) vs JUNCTION TEMPERATURE 2.0 ID = 250µA FIGURE 8. NORMALIZED GATE THRESHOLD VOLTAGE vs TEMPERATURE 1.2 POWER DISSIPATION MULTIPLIER 1.0 NORMALIZED BVDSS 1.5 0.8 1.0 0.6 0.4 0.5 0.2 0.0 -80 0.0 0 80 120 160 -40 40 TJ, JUNCTION TEMPERATURE (oC) 200 0 25 50 75 100 125 150 175 TC , CASE TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN SOURCE BREAKDOWN VOLTAGE vs TEMPERATURE 600 VGS = 0V, f = 1MHz FIGURE 10. NORMALIZED POWER DISSIPATION vs TEMPERATURE DERATING CURVE 60 VDS, DRAIN SOURCE VOLTAGE (V) VDD = BVDSS 45 10 VGS, GATE-SOURCE VOLTAGE (V) VDD = BVDSS 7.5 C, CAPACITANCE (pF) 400 CISS 30 0.75 BVDSS 0.50 BVDSS 15 0.25 BVDSS 0.75 BVDSS 0.50 BVDSS 0.25 BVDSS 5.0 200 COSS 2.5 CRSS 0 0 0 10 15 20 VDS , DRAIN-TO-SOURCE VOLTAGE (V) 5 25 IG(REF) 20 IG(ACT) RL = 5Ω IG(REF) = 0.24mA VGS = 10V 0 t, TIME (µs) IG(REF) 80 IG(ACT) FIGURE 11. TYPICAL CAPACITANCE vs VOLTAGE FIGURE 12. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT. REFER TO APPLICATION NOTE AN7254 AND AN7260 4 RFD3055, RFD3055SM, RFP3055 Typical Performance Curves 50 (Continued) IAS, AVALANCHE CURRENT (A) STARTING TJ = +25oC 10 STARTING TJ = +150oC If R = 0 tAV = (L) (IAS) / (1.3RATED BVDSS - VDD) IF R ≠ 0 tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1] 1 0.001 0.01 0.1 1 tAV, TIME IN AVALANCHE (msec) FIGURE 13. UNCLAMPED INDUCTIVE SWITCHING Test Circuits VDS BVDSS tp IAS L VDS VDD VARY tP TO OBTAIN REQUIRED PEAK IAS VGS RG DUT + VDD 0V tAV tP IL 0.01Ω FIGURE 14. UNCLAMPED ENERGY WAVEFORMS FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT tON tD(ON) tR VDS 90% tOFF tD(OFF) tF 90% VGS VDD RL VDS 10% 10% 0V 90% RGS DUT VGS 10% 50% PULSE WIDTH 50% FIGURE 16. RESISTIVE SWITCHING WAVEFORMS FIGURE 17. RESISTIVE SWITCHING TEST CIRCUIT 5 RFD3055, RFD3055SM, RFP3055 PSpice Model Listing Temperature Compensated PSPICE Model for the RFD3055, RFD3055SM, RFP3055 .SUBCKT RFP3055 2 1 3 ; CA 12 8 0.540e-9 CB 15 14 0.540e-9 CIN 6 8 0.300e-9 DBODY 7 5 DBDMOD DBREAK 5 11 DBKMOD DPLCAP 10 5 DPLCAPMOD EBREAK 11 7 17 18 67.9 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTO 20 6 18 8 1 IT 8 17 1 LDRAIN 2 5 1e-9 LGATE 1 9 4.61e-9 LSOURCE 3 7 4.61e-9 MOS1 16 6 8 8 MOSMOD M=0.99 MOS2 16 21 8 8 MOSMOD M=0.01 RBREAK 17 18 RBKMOD 1 RDRAIN 50 16 RDSMOD 1e-4 RGATE 9 20 7.23 RIN 6 8 1e9 RSCL1 5 51 RSLVCMOD 1e-6 RSCL2 5 50 1e3 RSOURCE 8 7 RDSMOD 108e-3 RVTO 18 19 RVTOMOD 1 S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD VBAT 8 19 DC 1 VTO 21 6 0.5 ESCL 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/30,6.5))} .MODEL DBDMOD D (IS=4.33e-14 RS=2.78e-2 TRS1=1.10e-3 TRS2=5.19e-6 CJO=3.94e-10 TT=7.63e-8) .MODEL DBKMOD D (RS=0.676 TRS1=1.94e-3 TRS2=-1.09e-6) .MODEL DPLCAPMOD D (CJO=0.238e-9 IS=1e-30 N=10) .MODEL MOSMOD NMOS (VTO=4.078 KP=12 IS=1e-30 N=10 TOX=1 L=1u W=1u) .MODEL RBKMOD RES (TC1=1.06e-3 TC2=-1.92e-6) .MODEL RDSMOD RES (TC1=5.03e-3 TC2=1.53e-5) .MODEL RSLVCMOD RES (TC1=2.2e-3 TC2=-5e-6) .MODEL RVTOMOD RES (TC1=-5.02e-3 TC2=-9.16e-6) .MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-6.5 VOFF=-3.5) .MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.5 VOFF=-6.5) .MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2.50 VOFF=2.50) .MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=2.50 VOFF=-2.50) .ENDS NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-circuit for the Power MOSFet Featuring Global Temperature Options; authored by William J. Hepp and C. Frank Wheatley. S1A 12 S1B CA EGS 13 8 13 + 6 8 14 13 ESG 6 8 + rev 10/26/93 DPLCAP 10 RSCL1 RSCL2 DBREAK + 51 5 ESCL 51 50 RDRAIN 16 VTO + 21 6 RIN CIN 8 RSOURCE 7 S2A 15 S2B CB + EDS 5 8 14 IT RBREAK 17 18 RVTO 19 VBAT + LSOURCE 3 SOURCE MOS1 11 + 17 EBREAK 18 MOS2 DBODY 5 LDRAIN DRAIN 2 GATE 1 LGATE RGATE 9 EVTO + 18 8 6 RFD3055, RFD3055SM, RFP3055 Packaging A ØP Q H1 D E1 45o D1 TERM. 4 E A1 TO-220AB 3 LEAD JEDEC TO-220AB PLASTIC PACKAGE INCHES SYMBOL A A1 b b1 c D MIN 0.170 0.048 0.030 0.045 0.014 0.590 0.395 MAX 0.180 0.052 0.034 0.055 0.019 0.610 0.160 0.410 0.030 0.100 TYP 0.200 BSC 0.235 0.100 0.530 0.130 0.149 0.102 0.255 0.110 0.550 0.150 0.153 0.112 MILLIMETERS MIN 4.32 1.22 0.77 1.15 0.36 14.99 10.04 MAX 4.57 1.32 0.86 1.39 0.48 15.49 4.06 10.41 0.76 2.54 TYP 5.08 BSC 5.97 2.54 13.47 3.31 3.79 2.60 6.47 2.79 13.97 3.81 3.88 2.84 NOTES 3, 4 2, 3 2, 3, 4 5 5 6 2 - L1 b1 b c D1 E E1 e e1 J1 L 60o 1 2 3 e e1 NOTES: H1 J1 L L1 ØP Q 1. These dimensions are within allowable dimensions of Rev. J of JEDEC TO-220AB outline dated 3-24-87. 2. Lead dimension and finish uncontrolled in L1. 3. Lead dimension (without solder). 4. Add typically 0.002 inches (0.05mm) for solder coating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 1 dated 1-93. TO-251AA E H1 A A1 TERM. 4 SEATING PLANE 3 LEAD JEDEC TO-251AA PLASTIC PACKAGE INCHES SYMBOL A A1 b b1 MIN 0.086 0.018 0.028 0.033 0.205 0.018 0.270 0.250 MAX 0.094 0.022 0.032 0.040 0.215 0.022 0.290 0.265 MILLIMETERS MIN 2.19 0.46 0.72 0.84 5.21 0.46 6.86 6.35 MAX 2.38 0.55 0.81 1.01 5.46 0.55 7.36 6.73 NOTES 3, 4 3, 4 3 3, 4 3, 4 5 5 6 2 b2 D b1 L1 L b2 c D b 1 2 3 c E e 0.090 TYP 0.180 BSC 0.035 0.040 0.355 0.075 0.045 0.045 0.375 0.090 2.28 TYP 4.57 BSC 0.89 1.02 9.02 1.91 1.14 1.14 9.52 2.28 e e1 J1 e1 H1 J1 L L1 NOTES: 1. These dimensions are within allowable dimensions of Rev. C of JEDEC TO-251AA outline dated 9-88. 2. Solder finish uncontrolled. 3. Dimension (without solder). 4. Add typically 0.0006 inches (0.015mm) for solder coating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bot- tom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 1 dated 1-93. 7 RFD3055, RFD3055SM, RFP3055 Packaging (Continued) E H1 A A1 SEATING PLANE D L2 L1 1 3 L TO-252AA 2 LEAD JEDEC TO-252AA PLASTIC PACKAGE INCHES SYMBOL A A1 b b1 b2 b3 c L3 MILLIMETERS MIN 2.19 0.46 0.72 0.84 5.21 4.83 0.46 6.86 6.35 MAX 2.38 0.55 0.81 1.01 5.46 0.55 7.36 6.73 NOTES 4, 5 4, 5 4 4, 5 2 4, 5 7 7 3 4, 6 2 b2 MIN 0.086 0.018 0.028 0.033 0.205 0.190 0.018 0.270 0.250 MAX 0.094 0.022 0.032 0.040 0.215 0.022 0.290 0.265 b e e1 TERM. 4 b1 c J1 0.265 (6.7) D E e e1 H1 J1 0.090 TYP 0.180 BSC 0.035 0.040 0.100 0.075 0.025 0.020 0.170 0.045 0.045 0.115 0.090 0.040 - 2.28 TYP 4.57 BSC 0.89 1.02 2.54 1.91 0.64 0.51 4.32 1.14 1.14 2.92 2.28 1.01 - b3 L4 0.265 (6.7) L L1 L2 0.070 (1.8) 0.118 (3.0) BACK VIEW 0.063 (1.6) 0.090 (2.3) 0.090 (2.3) MINIMUM PAD SIZE RECOMMENDED FOR SURFACE-MOUNTED APPLICATIONS 0.063 (1.6) L3 L4 NOTES: 1. These dimensions are within allowable dimensions of Rev. B of JEDEC TO-252AA outline dated 9-88. 2. L4 and b3 dimensions establish a minimum mounting surface for terminal 4. 3. Solder finish uncontrolled. 4. Dimension (without solder). 5. Add typically 0.0006 inches (0.015mm) for solder coating. 6. L3 is the terminal length for soldering. 7. Position of lead to be measured 0.090 inches (2.28mm) from bottom of dimension D. 8. Controlling dimension: Inch. 9. Revision 2 dated 6-93. Harris Semiconductor products are sold by description only. Harris Semiconductor reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries. Sales Office Headquarters For general information regarding Harris Semiconductor and its products, call 1-800-4-HARRIS UNITED STATES Harris Semiconductor P. O. Box 883, Mail Stop 53-210 Melbourne, FL 32902 TEL: 1-800-442-7747 (407) 729-4984 FAX: (407) 729-5321 EUROPE Harris Semiconductor Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2-724-2111 SOUTH ASIA Harris Semiconductor H.K. Ltd. 13/F Fourseas Building 208-212 Nathan Road Tsimshatsui, Kowloon Hong Kong TEL: (852) 723-6339 NORTH ASIA Harris K.K. Kojimachi-Nakata Bldg. 4F 5-3-5 Kojimachi Chiyoda-ku, Tokyo 102 Japan TEL: (81) 3-3265-7571 TEL: (81) 3-3265-7572 (Sales) SEMICONDUCTOR 8