2SJ172

2SJ172 Silicon P-Channel MOS FET November 1996 Application High speed power switching Features • • • • Low on-resistance High speed switching Low drive current 4 V gate drive device  Can be driven from 5 V source • Suitable for motor drive, DC-DC converter, power switch and solenoid drive Outline TO-220AB D G 1 2 3 1. Gate 2. Drain (Flange) 3. Source S 2SJ172 Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body to drain diode reverse drain current Channel dissipation Channel temperature Storage temperature Notes 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at TC = 25°C Symbol VDSS VGSS ID I D(pulse)* I DR Pch* Tch Tstg 2 1 Ratings –60 ±20 –10 –40 –10 40 150 –55 to +150 Unit V V A A A W °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate to source breakdown voltage Gate to source leak current Symbol Min V(BR)DSS V(BR)GSS I GSS –60 ±20 — — –1.0 — — |yfs| Ciss Coss Crss t d(on) tr t d(off) tf VDF t rr 4.0 — — — — — — — — — Typ — — — — — 0.13 0.18 6.5 900 460 130 8 65 170 105 –1.1 200 Max — — ±10 250 –2.0 0.18 0.25 — — — — — — — — — — S pF pF pF ns ns ns ns V ns I F = –10 A, VGS = 0 I F = –10 A, VGS = 0, diF/dt = 50 A/µs I D = –5 A, VGS = –10 V, RL = 6 Ω Unit V V µA µA V Ω Test conditions I D = –10 mA, VGS = 0 I G = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 VDS = –50 V, VGS = 0 I D = –1 mA, VDS = –10 V I D = –5 A, VGS = –10 V*1 I D = –5 A, VGS = –4 V*1 I D = –5 A, VDS = –10 V*1 VDS = –10 V, VGS = 0, f = 1 MHz Zero gate voltage drain current I DSS Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body to drain diode forward voltage Body to drain diode reverse recovery time Note 1. Pulse test VGS(off) RDS(on) 2 2SJ172 Power vs. Temperature Derating 60 Channel Dissipation Pch (W) –100 10 µs –30 Drain Current ID (A) PW Maximum Safe Operation Area 10 1 0 40 –10 –3 –1.0 –0.3 µs = 10 DC m s m tion a er Op s (1 sh ot ) = (T C 20 Operation in this area is limited by RDS(on) 0 50 100 Case Temperature TC (°C) 150 Ta = 25°C –0.1 –10 –30 –100 –0.1 –0.3 –1.0 –3 Drain to Source Voltage VDS (V) Typical Output Characteristics –20 –10 V –16 Drain Current ID (A) –4.5 V –5 V –7 V –4 V Pulse Test Typical Transfer Characteristics –10 VDS = –10 V Pulse Test ) °C 25 –8 Drain Current ID (A) –12 –3.5 V –8 –3 V –4 VGS = –2.5 V 0 –8 –20 –4 –12 –16 Drain to Source Voltage VDS (V) –6 –4 75°C TC = 25°C –25°C –2 0 –2 –5 –1 –3 –4 Gate to Source Voltage VGS (V) 3 2SJ172 Drain to Source Saturation Voltage VDS (on) (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source on State Resistance RDS (on) (Ω) –2.0 Pulse Test –1.6 ID = –10 A 5 Pulse Test Static Drain to Source on State Resistance vs. Drain Current 2 1.0 0.5 –1.2 VGS = –4 V –0.8 –5 A 0.2 0.1 –10 V –0.4 –2 A 0 –2 –6 –8 –4 –10 Gate to Source Voltage VGS (V) 0.05 –0.5 –1.0 –2 –5 –10 –20 Drain Current ID (A) –50 Static Drain to Source on State Resistance vs. Temperature Static Drain to Source on State Resistance RDS (on) (Ω) Forward Transfer Admittance yfs (S) 0.5 Pulse Test ID = –10 A 0.3 VGS = –4 V –5 A –2 A –10 A –5 A –2 A 50 Forward Transfer Admittance vs. Drain Current VGS = 10 V Pulse Test –25°C TC = 25°C 75°C 0.4 20 10 5 0.2 2 1.0 0.5 –0.1 –0.2 0.1 VGS = –10 V 0 –40 40 0 80 120 Case Temperature TC (°C) 160 –0.5 –1.0 –2 Drain Current ID (A) –5 –10 4 2SJ172 Body to Drain Diode Reverse Recovery Time 500 Reverse Recovery Time trr (ns) 10,000 VGS = 0 f = 1 MHz Capacitance C (pF) 1,000 Ciss Coss Crss Typical Capacitance vs. Drain to Source Voltage 200 100 50 di/dt = 50 A/µs, Ta = 25°C VGS = 0 Pulse Test 20 10 100 5 –0.2 10 –5 –0.5 –1.0 –2 –10 –20 Reverse Drain Current IDR (A) 0 –10 –20 –30 –40 –50 Drain to Source Voltage VDS (V) Dynamic Input Characteristics 0 Drain to Source Voltage VDS (V) VDD = –10 V –20 –25 V ID = –10 A –4 0 Gate to Source Voltage VGS (V) 500 Switching Characteristics td (off) Switching Time t (ns) 200 100 50 tr td (on) tf –40 –50 V –60 VDS VGS VDD = –50 V –25 V –10 V –80 –8 –12 20 10 5 –0.2 –16 PW = 10 µs, VGS = –10 V . . duty < 1% VDD = 30V –100 0 20 60 80 40 Gate Charge Qg (nc) –20 100 –0.5 –1.0 –2 –5 –10 Drain Current ID (A) –20 5 2SJ172 Reverse Drain Current vs. Source to Drain Voltage –20 Reverse Drain Current IDR (A) Pulse Test –16 –12 –8 –10 V –5 V –4 VGS = 0, 5 V 0 –0.4 –1.2 –1.6 –0.8 –2.0 Source to Drain Voltage VSD (V) Normalized Transient Thermal Impedance γS (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 D=1 0.5 0.3 0.1 0.2 0.1 0.05 0.02 1.0 TC = 25°C θch–c (t) = γS (t) · θch–c θch–c = 3.13°C/W, TC = 25°C PDM PW 1 D = PW T 0.03 0.01 10 µ e 1 0.0 Puls ot h 1S 100 µ 1m 10 m Pulse Width PW (s) 100 m T 10 Waveforms Switching Time Test Circuit Vin Monitor Vout Monitor D.U.T RL 50 Ω Vin –10 V Vout VDD . = 30 V . td (on) 90% 10% tr td (off) 90% 90% 10% tf Vin 10% 6 2SJ172 When using this document, keep the following in mind: 1. This document may, wholly or partially, be subject to change without notice. 2. All rights are reserved: No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without Hitachi’s permission. 3. Hitachi will not be held responsible for any damage to the user that may result from accidents or any other reasons during operation of the user’s unit according to this document. 4. Circuitry and other examples described herein are meant merely to indicate the characteristics and performance of Hitachi’s semiconductor products. Hitachi assumes no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein. 5. No license is granted by implication or otherwise under any patents or other rights of any third party or Hitachi, Ltd. 6. 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