74HC595

HD74HC595 8-bit Shift Register/Latch (with 3-state outputs) Description This device each contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct-overriding clear, serial input, and serial output pins for cascading. Both the shift register and storage register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the shift register state will always be one clock pulse ahead of the storage register. Features • • • • • High Speed Operation: tpd (RCK to Q) = 17 ns typ (C L = 50 pF) High Output Current: Fanout of 15 LSTTL Loads (QA to QH outputs) Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table RCK X X X X SCK X X SCLR X L H H G H X X X Function QA to QH high impedance Shift register cleared QH ’ = L Shift register clocked Qn = Qn – 1, QA = SER Contents of shift register transferred to output latches HD74HC595 Pin Arrangement QB 1 QC 2 QD 3 QE 4 QF 5 QG 6 QH 7 GND 8 (Top view) 16 VCC 15 QA 14 SER 13 G 12 RCK 11 SCK 10 SCLR 9 QH' Absolute Maximum Ratings Item Supply voltage range Input voltage Output voltage Output current DC current drain per VCC, GND DC input diode current DC output diode current Power dissipation per package Storage Temperature Symbol VCC VIN VOUT I OUT I CC, I GND I IK I OK PT Tstg Rating –0.5 to +7.0 –0.5 to VCC + 0.5 –0.5 to VCC + 0.5 ±35 ±75 ±20 ±20 500 –65 to +150 Unit V V V mA mA mA mA mW °C 2 HD74HC595 Logic Diagram G RCK SER DQ R D QA DQ R D QB DQ R D QC DQ R D QD DQ R D QE DQ R D QF DQ R D QG DQ SCK R SCLR D QH QH' 3 HD74HC595 DC Characteristics Ta = 25°C Item Input voltage Symbol VIH Ta = –40 to +85°C Max — — — 0.5 1.35 1.8 — — — — — 0.1 0.1 0.1 0.33 0.33 — — — — — 0.1 0.1 0.1 0.33 0.33 ±5.0 ±1.0 40 µA µA µA I OL = 4 mA I OL = 5.2 mA Vin = VIH or VIL, Vout = VCC or GND Vin = VCC or GND Vin = VCC or GND, Iout = 0 µA V Q’H Vin = VIH or VIL I OH = –4 mA I OH = –5.2 mA I OL = 20 µA V Q’H Vin = VIH or VIL I OL = 6 mA I OL = 7.8 mA I OH = –20 µA V QA to QH Vin = VIH or VIL I OH = –6 mA I OH = –7.8 mA I OL = 20 µA V QA to QH Vin = VIH or VIL I OH = –20 µA V Unit V Test Conditions VCC (V) Min Typ Max Min 2.0 4.5 6.0 1.5 — 3.15 — 4.2 — — — — — — — — — — 0.5 1.5 3.15 4.2 — VIL 2.0 4.5 6.0 1.35 — 1.8 — 1.9 4.4 5.9 4.13 5.63 — — — Output voltage VOH 2.0 4.5 6.0 4.5 6.0 1.9 2.0 — 4.4 4.5 — 5.9 6.0 — 4.18 — 5.68 — — — — — — — — VOL 2.0 4.5 6.0 4.5 6.0 0.0 0.1 0.0 0.1 0.0 0.1 — — 0.26 — 0.26 — 1.9 4.4 5.9 4.13 5.63 — — — Output voltage VOH 2.0 4.5 6.0 4.5 6.0 1.9 2.0 — 4.4 4.5 — 5.9 6.0 — 4.18 — 5.68 — — — — — — — — — — — VOL 2.0 4.5 6.0 4.5 6.0 0.0 0.1 0.0 0.1 0.0 0.1 — — — — — 0.26 — 0.26 — ±0.5 — ±0.1 — 4.0 — Off-state output current Input current Quiescent supply current I OZ Iin I CC 6.0 6.0 6.0 4 HD74HC595 AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = 25°C Item Maximum clock frequency Symbol f max Ta = –40 to +85°C Max 4 21 24 145 29 25 190 38 33 220 44 37 190 38 33 190 38 33 — — — — — — — — — — — — ns ns ns SCK to RCK ns SER to SCK ns ns ns SCLR to Q H ’ ns RCK to Q ns SCK to QH ’ Unit MHz Test Conditions VCC (V) Min Typ Max Min 2.0 4.5 6.0 — — — — — — — — — — — — — — — — — — — — — — 12 — — 17 — — 20 — — 13 — — 15 — 5 27 31 — — — Propagation delay t PLH time t PHL 2.0 4.5 6.0 115 — 23 20 — — t PLH t PHL 2.0 4.5 6.0 150 — 30 26 — — t PLH 2.0 4.5 6.0 175 — 35 30 — — Output enable time t ZL t ZH 2.0 4.5 6.0 150 — 30 26 — — Output disable time t LZ t HZ 2.0 4.5 6.0 150 — 30 26 — — — — — — — — — — — — — — 125 25 21 250 50 43 100 20 17 125 25 21 Setup time t su 2.0 4.5 6.0 2.0 4.5 6.0 100 — 20 17 1 — 200 — 40 34 80 16 14 8 — — 8 — Pulse width tw 2.0 4.5 6.0 Removal time t rem 2.0 4.5 6.0 100 — 20 17 — — 5 HD74HC595 AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) (cont) Ta = 25°C Item Hold time Symbol th Ta = –40 to +85°C Max — — — 95 19 16 75 15 13 5 pF ns Q ns QH ’ Unit ns Test Conditions VCC (V) Min Typ Max Min 2.0 4.5 6.0 5 5 5 — — — — — — — — 1 — — 5 — — 4 — 5 — — — 75 15 13 60 12 10 10 5 5 5 — — — — — — — Output rise/fall time t TLH t THL 2.0 4.5 6.0 2.0 4.5 6.0 Input capacitance Cin — 6 19.20 20.00 Max 16 9 7.40 Max 6.30 Unit: mm 1 1.3 1.11 Max 8 0.51 Min 2.54 Min 5.06 Max 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) + 0.13 DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 16 9 5.5 1 *0.22 ± 0.05 0.20 ± 0.04 8 0.80 Max 2.20 Max 0.20 7.80 + 0.30 – 1.15 0° – 8° 0.70 ± 0.20 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.12 M Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DA — Conforms 0.24 g *Dimension including the plating thickness Base material dimension 0.10 ± 0.10 0.15 Unit: mm 9.9 10.3 Max 16 9 3.95 1 1.27 0.635 Max 8 0.11 0.14 + 0.04 – 1.75 Max *0.22 ± 0.03 0.20 ± 0.03 0.10 6.10 + 0.30 – 1.08 0° – 8° 0.67 0.60 + 0.20 – *0.42 ± 0.08 0.40 ± 0.06 0.15 0.25 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DN Conforms Conforms 0.15 g Cautions 1. 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