BB501

BB501M Build in Biasing Circuit MOS FET IC UHF RF Amplifier ADE-208-700C (Z) 4th. Edition Nov. 1998 Features • Build in Biasing Circuit; To reduce using parts cost & PC board space. • High gain; PG = 21.5 dB typ. at f = 900 MHz • Low noise; NF = 1.85 dB typ. at f = 900 MHz • Withstanding to ESD; Build in ESD absorbing diode. Withstand up to 200V at C=200pF, Rs=0 conditions. • Provide mini mold packages; MPAK-4(SOT-143mod) Outline MPAK-4 2 3 1 4 1. Source 2. Gate1 3. Gate2 4. Drain Notes: 1. Marking is “AS–”. 2. BB501M is individual type number of HITACHI BBFET. BB501M Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate1 to source voltage Gate2 to source voltage Drain current Channel power dissipation Channel temperature Storage temperature Symbol VDS VG1S VG2S ID Pch Tch Tstg Ratings 6 +6 –0 +6 –0 20 150 150 –55 to +150 Unit V V V mA mW °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate1 to source breakdown voltage Gate2 to source breakdown voltage Symbol V(BR)DSS V(BR)G1SS V(BR)G2SS Min 6 +6 +6 — — 0.5 0.5 7 19 Typ — — — — — 0.7 0.7 10 24 Max — — — +100 +100 1.0 1.0 13 29 Unit V V V nA nA V V mA mS Test Conditions I D = 200µA VG1S = VG2S = 0 I G1 = +10 µA VG2S = VDS = 0 I G2 = +10 µA VG1S = VDS = 0 VG1S = +5V VG2S = VDS = 0 VG2S = +5V VG1S = VDS = 0 VDS = 5V, VG2S = 4V I D = 100µA VDS = 5V, VG1S = 5V I D = 100µA VDS = 5V, VG1 = 5V VG2S = 4V, RG = 47kΩ VDS = 5V, VG1 = 5V VG2S =4V RG = 47kΩ, f = 1kHz VDS = 5V, VG1 = 5V VG2S =4V, RG = 47kΩ f = 1MHz VDS = 5V, VG1 = 5V VG2S =4V, RG = 47kΩ Noise figure NF — 1.85 2.4 dB f = 900MHz Gate1 to source cutoff current I G1SS Gate2 to source cutoff current I G2SS Gate1 to source cutoff voltage VG1S(off) Gate2 to source cutoff voltage VG2S(off) Drain current Forward transfer admittance I D(op) |yfs| Input capacitance Output capacitance c iss c oss 1.4 0.7 — 17 1.7 1.1 0.019 21.5 2.0 1.5 0.04 — pF pF pF dB Reverse transfer capacitance c rss Power gain PG 2 BB501M Main Characteristics Test Circuit for Operating Items (I D(op) , |yfs|, Ciss, Coss, Crss, NF, PG) VG2 Gate 2 Gate 1 RG VG1 Drain A ID Source Application Circuit VAGC = 4 to 0.3 V BBFET V DS = 5 V RFC Output Input RG V GG = 5 V 3 BB501M 900MHz Power Gain, Noise Test Circuit VG1 VG2 C4 C5 VD C6 R1 R2 C3 G2 R3 D L3 RFC Output L4 Input L1 L2 G1 S C1 C2 C1, C2 ： C3 ： C4∼C6 ： R1 ： R2 ： R3 ： Variable Capacitor（10pF MAX) Disk Capacitor（1000pF) Air Capacitor（1000pF) 47 kΩ 47 kΩ 4.7 kΩ L1： 10 L2： 10 26 （φ1mm Copper wire） Unit：mm 8 21 L4： 29 3 L3： 18 10 7 7 RFC：φ1mm Copper wire with enamel 4turns inside dia 6mm 4 10 3 BB501M Maximum Channel Power Dissipation Curve Typical Output Characteristics 20 V G2S = 4 V V G1 = VDS 16 G = 22 kΩ Pch (mW) 200 150 I D (mA) Channel Power Dissipation 12 R 100 8 50 4 kΩ 27 Ω k 33 k Ω 39 Ω k 47 k Ω 56 k Ω 68 k Ω 82 kΩ 100 Drain Current 50 100 150 Ta (°C) 200 0 0 Ambient Temperature 1 2 3 Drain to Source Voltage 4 5 V DS (V) Drain Current vs. Gate1 Voltage 20 20 V DS = 5 V R G = 33 kΩ Drain Current vs. Gate1 Voltage V DS = 5 V R G = 47 kΩ 16 I D (mA) 16 12 4V 3V I D (mA) Drain Current 12 3V 4V 2V 4 VG2S = 1 V Drain Current 8 2V 8 4 VG2S = 1 V 0 1 2 Gate1 Voltage 3 V G1 4 (V) 5 0 1 2 3 Gate1 Voltage V G1 4 (V) 5 5 BB501M Forward Transfer Admittance vs. Gate1 Voltage 30 V DS = 5 V R G = 33 kΩ f = 1 kHz 4V 3V 20 V DS = 5 V R G = 68 kΩ I D (mA) 16 Forward Transfer Admittance |y fs | (mS) Drain Current vs. Gate1 Voltage 24 12 18 2V Drain Current 8 3V 4V 2V 12 4 6 VG2S = 1 V VG2S = 1 V 0 1 2 3 V G1 4 (V) 5 0 Gate1 Voltage 1 2 3 4 Gate1 Voltage V G1 (V) 5 Forward Transfer Admittance |y fs | (mS) Forward Transfer Admittance vs. Gate1 Voltage 30 V DS = 5 V R G = 47 kΩ f = 1 kHz Forward Transfer Admittance |y fs | (mS) Forward Transfer Admittance vs. Gate1 Voltage 30 V DS = 5 V R G = 68 kΩ f = 1 kHz 24 4V 3V 24 4V 3V 18 2V 18 2V 12 12 6 VG2S = 1 V 6 VG2S = 1 V 0 1 2 3 4 Gate1 Voltage V G1 (V) 5 0 1 2 3 4 Gate1 Voltage V G1 (V) 5 6 BB501M Power Gain vs. Gate Resistance 30 25 20 15 10 5 0 10 0 10 VDS = VG1 = 5 V VG2S = 4 V f = 900 MHz 4 Noise Figure vs. Gate Resistance Power Gain PG (dB) Noise Figure NF (dB) 3 2 VDS = VG1 = 5 V VG2S = 4 V f = 900 MHz 1 20 50 Gate Resistance R G (k Ω ) 100 20 50 Gate Resistance R G (k Ω ) 100 Power Gain vs. Drain Current 30 25 Power Gain PG (dB) Noise Figure vs. Drain Current 4 Noise Figure NF (dB) 3 20 15 10 5 0 0 VDS = VG1 = 5 V VG2S = 4 V RG = variable f = 900 MHz 5 10 15 20 2 1 VDS = VG1 = 5 V VG2S = 4 V RG = variable f = 900 MHz 0 5 10 15 20 0 Drain Current I D (mA) Drain Current I D (mA) 7 BB501M Power Gain vs. Gate2 to Source Voltage 25 Drain Current vs. Gate Resistance 20 Drain Current I D (mA) 15 Power Gain PG (dB) 20 15 10 10 V DS = 5 V R G = 47 kΩ f = 900 MHz 5 VDS = VG1 = 5 V VG2S = 4 V 5 0 10 20 50 100 0 1 2 3 4 Gate Resistance R G (k Ω ) Gate2 to Source Voltage V G2S (V) 5 Noise Figure vs. Gate2 to Source Voltage V DS = 5 V R G = 47 kΩ f = 900 MHz Input Capacitance Ciss (pF) Input Capacitance vs. Gate2 to Source Voltage 4 Noise Figure NF (dB) 4 3 3 2 2 1 V DS = 5 V R G = 47 kΩ f = 1 MHz 0 1 2 3 4 1 1 0 4 2 3 Gate2 to Source Voltage V G2S (V) Gate2 to Source Voltage V G2S (V) 8 BB501M Gain Reduction vs. Gate2 to Source Voltage 0 Gain Reduction GR (dB) 10 20 30 V DS = V G1 = 5 V V G2S = 4 V R G = 47 kΩ 40 50 4 3 2 1 0 Gate2 to Source Voltage V G2S (V) 9 BB501M S11 Parameter vs. Frequency .8 .6 .4 3 .2 4 5 10 0 .2 .4 .6 .8 1 1.5 2 3 45 10 –10 –.2 –5 –4 –3 –.4 –.6 –.8 –1.5 –2 –120° –90° –60° –1 180° 0° 150° 30° 1 1.5 2 S21 Parameter vs. Frequency 90° 120° Scale: 1 / div. 60° –150° –30° Test Condition: V DS = 5 V , V G1 = 5 V V G2S = 4 V , R G = 47 k Ω , Zo = 50 Ω 50 ∼ 1000 MHz (50 MHz step) Test Condition: V DS = 5 V , V G1 = 5 V V G2S = 4 V , R G = 47 k Ω , Zo = 50 Ω 50 ∼ 1000 MHz (50 MHz step) S12 Parameter vs. Frequency 90° 120° S22 Parameter vs. Frequency .8 .6 .4 3 1 1.5 2 Scale: 0.002 / div. 60° 150° 30° .2 4 5 10 180° 0° 0 .2 .4 .6 .8 1 1.5 2 3 45 10 –10 –.2 –150° –30° –.4 –120° –90° –60° –.6 –.8 –1.5 –2 –1 –5 –4 –3 Test Condition: V DS = 5 V , V G1 = 5 V V G2S = 4 V , R G = 47 k Ω , Zo = 50 Ω 50 ∼ 1000 MHz (50 MHz step) Test Condition: V DS = 5 V , V G1 = 5 V V G2S = 4 V , R G = 47 k Ω , Zo = 50 Ω 50 ∼ 1000 MHz (50 MHz step) 10 BB501M Sparameter (VDS = VG1 = 5V, VG2S = 4V, RG = 47kΩ, Zo = 50Ω) S11 f (MHz) MAG 50 100 150 200 250 300 350 400 450 500 550 600 650 700 750 800 850 900 950 1000 0.974 0.974 0.974 0.965 0.963 0.953 0.947 0.942 0.929 0.923 0.912 0.903 0.886 0.879 0.873 0.859 0.846 0.836 0.827 0.815 ANG –2.8 –10.0 –13.6 –16.5 –20.0 –23.7 –26.8 –29.6 –32.8 –35.4 –38.5 –41.2 –44.2 –46.8 –49.2 –52.4 –55.4 –58.0 –60.4 –62.8 S21 MAG 2.40 2.38 2.38 2.37 2.35 2.32 2.30 2.28 2.26 2.21 2.19 2.15 2.12 2.08 2.06 2.03 2.00 1.96 1.93 1.89 ANG 176.4 172.2 168.4 164.1 160.4 156.8 152.9 148.6 144.9 141.2 137.6 134.2 130.6 127.4 124.3 120.8 117.3 114.3 111.0 108.0 S12 MAG 0.00057 0.00144 0.00211 0.00316 0.00358 0.00431 0.00503 0.00545 0.00630 0.00646 0.00693 0.00732 0.00729 0.00733 0.00762 0.00756 0.00772 0.00775 0.00801 0.00704 ANG 78.1 82.4 78.7 84.8 76.3 84.0 79.0 76.6 80.3 76.1 73.7 72.9 74.6 72.0 74.5 73.7 75.5 79.6 81.7 81.0 S22 MAG 0.997 0.998 0.997 0.995 0.994 0.992 0.990 0.987 0.984 0.981 0.977 0.974 0.971 0.967 0.962 0.959 0.955 0.951 0.946 0.942 ANG –2.0 –4.2 –6.0 –8.1 –10.2 –12.2 –14.2 –16.2 –18.1 –20.2 –22.1 –24.1 –26.0 –27.8 –29.7 –31.7 –33.6 –35.5 –37.3 –39.4 11 BB501M Package Dimensions Unit: mm 2.8 – 0.1 + 0.3 0.65 – 0.3 + 0.1 1.9 0.95 0.95 0.4 – 0.05 + 0.1 + 0.1 0.4 – 0.05 0.16 – 0.06 + 0.1 3 2 + 0.2 2.8 – 0.6 4 0.4 – 0.05 0.95 1.8 + 0.1 1 0.6 – 0.05 0.85 + 0.1 0.3 + 0.2 1.1– 0.1 0.65– 0.3 + 0.1 1.5 0 ~ 0.1 Hitachi Code EIAJ JEDEC MPAK–4 SC–61AA — 12 Cautions 1. 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Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. 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Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: (2) 2718-3666 Fax: (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: (2) 735 9218 Fax: (2) 730 0281 Telex: 40815 HITEC HX Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.