HT1382

HT1382 I2C/3-Wire Real Time Clock Feature Applications • Real Time Clock/Calendar Functions –– Includes: Sec, Minutes, Hours, Day, Date, Month, and year in BCD format • Utility meters • Clock operating voltage: 2.0V~5.5V • Wireless equipment • Consumer electronics • Portable equipment • Supply voltage VDD=2.7V~5.5V • POS equipment • Automatic leap year correction, valid until year 2099 • Computer products • Other industrial/Medical/Automotive applications • Automatic supply switch over • Integrated oscillator load capacitors – CL=12.5pF General Description • Clock compensation The HT1382 is a low power real time clock device with two serial interface: I2C or 3-wire. The interface mode is selected by the chosen chip version. The device provides both clock and calendar information in BCD format and also includes alarm functions. The calendar is accurate until the year 2099 and includes automatic leap year correction. • Programmable alarm and interrupt function • 15 selectable frequency outputs • 4 Bytes EEPROM for user • Serial commutation via I2C or 3-wire interface • 8-pin SOP package for I2C interface • 10-pin MSOP package for 3-wire interface Rev. 1.60 An external 32768Hz crystal is used as the device oscillator for device timing for which is provided an integrated crystal load capacitance of 12.5pF. The device includes a crystal oscillator temperature compensation function and internal power control circuitry detects power failures and automatically switches to the battery supply when a power failure occurs. 1 February 05, 2018 HT1382 Block Diagram Internal power supply VDD VCOMP ＋ － Switch RTC Register VBAT X1 Crystal Oscillator X2 Oscillator Compensation Control & Status Register Divider Circuit Alarm Register CE IRQ /FOUT 2 I C or 3-wire Interface SCL/SCLK SDA/I/O DT & USER EEPROM IFS VSS Note: IFS pin is used for selecting I2C interface or 3-wire interface. I2C interface is selected when IFS is unconnected. 3-wire interface is selected when IFS is connected to VSS. Pin Assignment X1 1 X2 2 VBAT 7 3 VSS 6 4 5 8 1 10 X2 2 9 IRQ/FOUT VBAT 3 8 SCLK SCL CE 4 7 I/O SDA VSS 5 6 NC IRQ/FOUT HT1382 8 SOP-A Rev. 1.60 VDD X1 VDD HT1382 10 MSOP-A 2 February 05, 2018 HT1382 Pad Assignment (0 ,0 ) X 1 1 X 2 V B A T C E 2 8 5 S C L K 7 6 V D D IR Q /F O U T 9 4 IF S V S S 1 0 3 S D A Chip size: 1245 × 1520 (μm)2 * The IC substrate should be connected to VSS in the PCB layout artwork. Pad Coordinates Unit: mm Pad No. X Y Pad No. X Y 1 −520.005 -161.460 6 −520.005 −646.610 2 −520.005 -256.460 7 521.000 −625.000 3 −520.005 -360.130 8 521.000 −530.000 4 −520.005 −455.130 9 521.000 −425.300 5 −520.005 −550.130 10 516.450 -288.400 Pin Description Pin Name I/O Description X1 I 32768Hz crystal input pin X2 O 32768Hz crystal output pin VBAT — Battery power supply CE I Not used for I2C interface Chip Enable for 3-Wire interface IFS I Interface selection pin. I2C interface is selected when IFS is unconnected, 3-wire interface is selected when IFS is connected to VSS. VSS — Negative power supply, ground SDA/I/O I/O Serial Data Input/Output for I2C and 3wire interfaces SCL/SCLK I/O Serial Clock input for I2C and 3-wire interfaces IRQ/FOUT O Interrupt/Frequency Output, this pin is open drain output VDD — Positive power supply Rev. 1.60 3 February 05, 2018 HT1382 Approximate Internal Connections IFS, CE SCL, SCLK SDA, I/O VDD VDD VDD GND GND X1, X2 GND IRQ/FOUT X2 X1 GND GND Absolute Maximum Ratings Supply Voltage .......................... VSS-0.3V to VSS+6.0V Storage Temperature ............................ -50˚C to 125˚C Input Voltage............................. VSS-0.3V to VDD+0.3V Operating Temperature........................... -40˚C to 85˚C Note: These are stress ratings only. Stresses exceeding the range specified under “Absolute Maximum Ratings” may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. Rev. 1.60 4 February 05, 2018 HT1382 D.C. Characteristics Symbol Parameter Ta=-40˚C~85˚C Test Conditions VDD Conditions Min. Typ. Max. Unit V VDD Supply Voltage ― ― 2.7 ― 5.5 VBAT Battery Supply Voltage ― ― 2.0 ― 5.5 V ISTB Standby Current ― VBAT=3V, "CH"=1 ― ― 0.1 μA IBAT Battery Supply Current ― VBAT=3V, "CH"=0 ― 0.8 1.2 μA SCL/SCLK=0Hz, "LPM"=1 ― 5 15 ― 15 30 SCL/SCLK=0Hz, "LPM"=0 ― 50 100 ― 70 150 ― 80 150 ― 150 300 3V IDD1 Supply Current (Low Power Mode) IDD2 Supply Current IDD3 Supply Current with I2C Active IDD4 Supply Current with 3-wire Active VIH “H” Input Voltage ― VIL “L” Input Voltage ― VOH I/O High Level Output Voltage VOL1 I/O, SCL and SDA Low Level Output Voltage VOL2 IRQ Low Level Output Voltage VCOMP VBATHYS Rev. 1.60 5V 3V 5V 3V 5V SCLK=400kHz μA μA μA 3V SCLK=1MHz ― 100 200 5V SCLK=2MHz ― 300 500 ― 0.7VDD ― ― V ― ― ― 0.3VDD V 3V IOH1=-1.5mA 2.7 ― ― 5V IOH1=-3.0mA 4.5 ― ― 3V IOL1=3.0mA 0 ― 0.4 5V IOL1=6.0mA 0 ― 0.4 3V IOL2=1.5mA 0 ― 0.4 5V IOL2=3.0mA 0 ― 0.4 μA V V V VBAT Mode Compared Voltage ― ― 2.40 2.55 2.70 V Hysteresis ― ― ― 25 ― mV VBAT Hysteresis ― ― ― 40 ― mV 5 February 05, 2018 HT1382 A.C. Characteristics Power-Down Timing VDD=2.7V~5.5V, Ta=-40˚C~85˚C Symbol tFSR Parameter Conditions Min. Typ. Max. Unit ― ― ― 10 V/ms VDD Falling Slew Rate Note: In order to ensure proper timekeeping, the tFSR specification must be followed. I2C Interface Symbol Parameter Remark Min. Typ. Max. Unit fSCL Clock frequency ― ― ― 400 kHz tHIGH Clock High Time ― 600 ― ― ns tLOW Clock Low Time ― 1300 ― ― ns tr SDA and SCL Rise Time Note ― ― 300 ns tf SDA and SCL Fall Time Note ― ― 300 ns tHD:STA START Condition Hold Time After this period, the first clock pulse is generated. 600 ― ― ns tSU:STA START Condition Setup Time Only relevant for repeated START condition. 600 ― ― ns tHD:DAT Data Input Hold Time ― 0 ― ― ns tSU:DAT Data Input Setup Time ― 100 ― ― ns tSU:STO STOP Condition Setup Time ― 600 ― ― ns tAA Output Valid from Clock ― ― ― 900 ns 1300 ― ― ns ― ― 50 ns tBUF Bus Free Time Time in which the bus must be free before a new transmission can start tSP Input Filter Time Constant (SDA and SCL Pins) Noise suppression time Note: These parameters are periodically sampled but not 100% tested. Rev. 1.60 6 February 05, 2018 HT1382 3-Wire Interface Ta=-40˚C~85 ˚C Symbol Parameter fSCLK Serial Clock tDC Data to Clock Setup tCDH Clock to Data Hold tCDD Clock to Data Delay tCL Clock Low Time tCH Clock High Time tr tf Clock Rise and Fall time tCC CE to Clock Setup tCCH Clock to CE Hold tCWH CE Inactive Time tCDZ CE to I/O High Impedance Rev. 1.60 Test Conditions Min. Typ. Max. ― ― ― 1 ― ― ― 2 3V ― 100 ― ― 5V ― 50 ― ― 3V ― 140 ― ― 5V ― 70 ― ― 3V ― ― ― 400 5V ― ― ― 200 3V ― 500 ― ― 5V ― 250 ― ― 3V ― 500 ― ― 5V ― 250 ― ― 3V ― ― ― 1000 5V ― ― ― 500 3V ― 2 ― ― 5V ― 1 ― ― 3V ― 120 ― ― 5V ― 60 ― ― 3V ― 2 ― ― 5V ― 1 ― ― 3V ― ― ― 140 5V ― ― ― 70 VDD Conditions 3V 5V 7 Unit MHz ns ns ns ns ns ns μs ns μs ns February 05, 2018 HT1382 Timing Diagrams Power-Down Timing         I2C Interface SDA tBUF tSU:DAT tf tLOW tHD:STA tr tSP SCL tHD:SDA tHD:DAT S tHIGH tSU:STA tAA tSU:STO P Sr S SDA OUT 3-Wire Interface Read Data Transfer                                          Write Data Transfer tC W H C E S C L K tC D H tD C I/O 7 0 tC C H tf tC L 7 0 C o m m a n d B y te Rev. 1.60 tr tC H tC C In p u t D a ta B y te 8 February 05, 2018 HT1382 Crystal Specifications Symbol Battery Backup Mode (VBAT) to Normal Mode (VDD) To switch from the V BAT to V DD mode, one of the following conditions must be valid: Parameter Min. Typ. Max. Unit f0 Nominal Frequency ― 32.768 ― kHz VDD>VBAT+VBATHYS or VDD>VCOMP+VCOMPHYS ESR Series Resistance ― 35 50 kΩ CL Load Capacitance ― 12.5 ― pF The power control situation is illustrated graphically below: Note: 1. It is strongly recommended to use a crystal with load capacitance 12.5pF. Battery Backup Mode VDD 2. The oscillator selection can be optimized using a high quality resonator with small ESR value. Refer to crystal manufacturer for more details: www.microcrystal.com VCOMP VBAT VBAT-VBATHYS 2.55V 2.0V VBAT+VBATHYS Note: Battery switchover when VBAT < VCOMP Functional Description Battery Backup Mode VDD VBAT VCOMP The HT1382 is a low power real time clock device which provides full date and time functions. Communication with the device is provided through two integral serial interfaces, I2C or 3-wire. The device version selects the type of interface. The clock and calendar information is generated in BCD format and also has alarm features. The calendar is accurate until the year 2099, with automatic leap year correction. VCOMP 3.0V 2.55V VCOMP+VCOMPHYS Note: Battery switchover when VBAT > VCOMP Low Power Mode In normal mode, the HT1382 switched into battery backup mode when the VDD power is lost. This will ensure that the device can accept a wide range of backup voltages from many types of sources while reliably switching into backup mode. Another mode, called Low Power Mode, is available to allow direct switching from VDD to VBAT without requiring VDD to drop below VCOMP. The power switchover circuit is disabled and less power is used while operating from VDD. The Low Power Mode is activated using the LPM bit. Basic timing is provided using an external 32768Hz crystal, for which the device includes load capacitances of 12.5pF. An oscillator compensation function is provided to compensate for crystal oscillator temperatures. With fully integrated power control circuitry which can detect power failures, the device can automatically switch to a reserve battery supply when a power failure occurs. Power Control Function The Low Power Mode is useful when VDD is normally higher than VBAT. The device will switch from VDD to VBAT when VDD drops below VBAT, with about 40mV of hysteresis to prevent any switchback of VDD after switchover. In a system with VDD=5V and VBAT= 3V, the Low Power Mode can be used. However, it is not recommended to use the Low Power Mode in VDD = 3.3V±10%, VBAT≥3V. The internal battery switchover circuit continually monitors the main power supply on the VDD pin and automatically switches to the backup battery supply when a power failure condition is detected. In the battery backup mode, the interface is disabled to minimise power consumption. The interface inputs will not be recognised which prevents extraneous data being written to the device. The interface outputs are high-impedance. All RTC functions are operational when the device is in the battery backup mode. Normal Mode (VDD) to Battery Backup Mode (VBAT) To switch from the VDD to VBAT mode, both of the following conditions must be valid: VDD