HI-8594PSMF

October, 2010 Single-Rail ARINC 429 Differential Line Driver PIN CONFIGURATION (TOP VIEW) V+ 1 SLP 2 TX0IN 3 TX1IN 4 GND 5 CAP+ 6 CAP- 7 14 AMPB 13 TXBOUT 12 AMPA 11 TXAOUT 10 V9 GND 8 V+ HI-8592, HI-8593, HI-8594 GENERAL DESCRIPTION The HI-8592 bus interface product is a silicon gate CMOS device designed as a line driver in accordance with the ARINC 429 bus specifications. The part includes a negative voltage converter allowing it to operate from a single +5V supply using only two external capacitors. The part also features high-impedance outputs (tri-state) when both data inputs are taken high, allowing multiple line drivers to be connected to a common bus. The HI-8593 and HI-8594 are reduced pin count versions of HI-8592 which do not incorporate the negative voltage converter. These devices are compatible with Holt’s existing HI-8570 and HI-8571 respectively, with the added advantage of the tri-state outputs. For even smaller board footprint, versions are also available in leadless, surface mount QFN-style packages. Logic inputs feature built-in 2,000V minimum ESD input protection as well as 5V or 3.3V logic level compatibility. Products with 5 Ohm or 37.5 Ohm resistors in series with each ARINC output are available to allow the use of external resistors for lightning protection. The HI-859x series of line drivers are intended for use where logic signals must be converted to ARINC 429 levels such as when using an FPGA or the HI-3584 ARINC 429 Serial Transmitter/Dual Receiver. The family of parts are available in Industrial -40 C to o o o +85 C, or Extended, -55 C to +125 C temperature ranges. Optional burn-in is available on the extended temperature range. o HI-8592PS 14-PIN PLASTIC SMALL OUTLINE (ESOIC) NB SLP 1 TX0IN 2 TX1IN 3 GND 4 8 V+ 7 TXBOUT 6 TXAOUT 5 V- HI-8593PS 8-PIN PLASTIC SMALL OUTLINE (ESOIC) NB SLP 1 TX0IN 2 TX1IN 3 GND 4 8 V+ 7 AMPB 6 AMPA 5 V- HI-8594PS 8-PIN PLASTIC SMALL OUTLINE (ESOIC) NB (See page 9 for additional package pin configurations) FEATURES • Single +5V supply • Negative voltage generated on-chip (HI-8592) • Digitally selectable rise and fall times • Tri-state Outputs • Plastic 8 & 14-pin thermally enhanced SOIC packages available • 5 Ohm or 37.5 Ohm output resistance • Industrial and Extended temperature ranges • Burn-in available HOLT INTEGRATED CIRCUITS www.holtic.com 1 TX1IN 0 0 0 1 1 1 0 1 1 0 0 1 Table 1. Function Table TX0IN SLP X 0 1 0 1 X TXAOUT 0V -5V -5V 5V 5V Hi-Z TXBOUT 0V 5V 5V -5V -5V Hi-Z SLOPE N/A 10μs 1.5μs 10μs 1.5μs N/A DS8592 Rev. B 10/10 HI-8592, HI-8593, HI-8594 BLOCK DIAGRAM V+ CSUPPLY SLP TX0IN TX1IN 5V AMPA 5V ONE ESD PROTECTION & VOLTAGE TRANSLATION NULL ZERO CONTROL LOGIC CURRENT CONTROL “A” SIDE TXAOUT 5Ω 32.5Ω -5V 5V ONE NULL CURRENT CONTROL AMPB “B” SIDE 5Ω 32.5Ω TXBOUT GND V+ ZERO CONTROL LOGIC -5V CAP+ CFLY CAP- -5V Switched Capacitor DC-DC Inverter VCOUT Clock Generation Figure 1. HI-8592 Block Diagram HOLT INTEGRATED CIRCUITS 2 HI-8592, HI-8593, HI-8594 PIN DESCRIPTIONS Table 2. Pin Descriptions Pin V+ SLP TX0IN TX1IN GND CAP+ CAPVTXAOUT AMPA TXBOUT AMPB Function POWER INPUT INPUT INPUT POWER ANALOG ANALOG POWER OUTPUT OUTPUT OUTPUT OUTPUT Description +5V power supply Output slew rate control. High selects ARINC 429 high-speed. Low selects ARINC 429 low-speed. Data input zero Data input one Ground supply Positive connection for external capacitor, CFLY Negative connection for external capacitor, CFLY -5V supply, may be connected to supply or used with on-chip negative supply converter ARINC high output with 37.5 Ohms series resistance ARINC high output with 5 Ohms series resistance ARINC low output with 37.5 Ohms series resistance ARINC low output with 5 Ohms series resistance V+ = 5V HI-3584A TX0IN TX1IN CSUPPLY = 68µF SLP TXAOUT TXBOUT AMPA AMPB HI-8592 ARINC 429 Bus CAP+ CFLY = 4.7µF CAP- GND -5V COUT = 47µF Figure 2. Application Example HOLT INTEGRATED CIRCUITS 3 HI-8592, HI-8593, HI-8594 FUNCTIONAL DESCRIPTION Figure 1 is a block diagram of the line driver. The chip requires a positive 5V supply at V+. The negative 5V supply at V- may be from an external source or may be provided using the on-chip negative rail generator by connecting the two external capacitors, CFLY and COUT. Currents for slope control are set by on-chip resistors. The TX0IN and TX1IN inputs receive logic signals from a control transmitter chip such as the HI-3584. TXAOUT and TXBOUT hold each side of the ARINC bus at Ground until one of the inputs becomes a One. If for example TX1IN goes high, a charging path is enabled to 5V on an “A” side internal capacitor while the “B” side is enabled to -5V. The charging current is selected by the SLP pin. If the SLP pin is high, the capacitor is nominally charged from 10% to 90% in 1.5μs. If SLP is low, the rise and fall times are 10μs. The reduced pin-count HI-8593 and HI-8594 require an external -5V supply. A unity gain buffer receives the internally generated slopes and differentially drives the ARINC line. Current is limited by the series output resistors at each pin. There are no fuses at the outputs of the HI-859x family. The HI-8593 has 37.5 ohms in series with each TXOUT output and the HI-8594 has 5 ohms in series with each AMP output. The AMP outputs are for applications where external series resistance is required, typically for lightning protection devices. Both output types are available on the HI-8592. Holt Application Note AN-300 describes suitable lightning protection schemes. All devices feature tri-stateable outputs to allow multiple line drivers to be connected to the same ARINC 429 bus. Setting TX1IN and TX0IN both to a logic “1” puts the outputs in the high-impedance state. The HI-8592 family of line drivers are built using highspeed CMOS technology. Care should be taken to ensure the V+ and V- supplies are locally decoupled to reduce noise. An application example is shown in Figure 2. ABSOLUTE MAXIMUM RATINGS Supply Voltages V+ ........................................................... +7V V- ........................................................... -7V DC Current per input pin ................................... +10mA Power Dissipation at 25 C plastic SOIC ........... 1.0W, derate 10mW/ C ceramic DIP ......... 0.5W, derate 7mW/ C Solder Temperature ......................... 275 C for 10sec Storage Temperature ....................... -65 C to +150 C o o o o o o RECOMMENDED OPERATING CONDITIONS Supply Voltages V+ ................................... +4.85V to +5.25V V- ................................... -5.25V to -4.85V Temperature Range Industrial Screening .............. -40 C to +85 C Hi-Temp Screening .............. -55 C to +125 C NOTE: Stresses above absolute maximum ratings or outside recommended operating conditions may cause permanent damage to the device. These are stress ratings only. Operation at the limits is not recommended. o o o o Note: The HI-8592 family of drivers are available in small-footprint, thermally enhanced SOIC and QFN (chip-scale) packages. These packages include a metal heat sink located on the bottom surface of the device. This heat sink should be soldered down to the printed circuit board for optimum thermal dissipation. The heat sink is electrically isolated from the chip and can be soldered to any ground or power plane. HOLT INTEGRATED CIRCUITS 4 HI-8592, HI-8593, HI-8594 ELECTRICAL CHARACTERISTICS Table 3. DC Electrical Characteristics V+ = +5V, V- = -5V (HI-8593/4 only), TA = Operating Temperature Range (unless otherwise stated) Parameters Input Voltage (TX1IN, TX0IN, SLP) High Low Input Current (TX1IN, TX0IN, SLP) Source Sink ARINC Output Voltage (Differential) one zero null ARINC Output Voltage (Ref. to GND) one or zero null Operating Supply Current V+ GND VARINC Output Impedance TXOUT pins AMP pins ARINC Output Tri-State Current IOZ V- < VOUT < V+, TA = 125oC TX0IN = TX1IN = V+ -1.0 IDD IGND IEE ZOUT 37.5 5 0 +1.0 Ohms Ohms μA VDOUT VNOUT no load & magnitude at pin no load SLP = V+ TX1IN & TX0IN = 0V: no load TX1IN & TX0IN = 0V: no load TX1IN & TX0IN = 0V: no load -16 22 10 -10 28 16 mA mA mA 4.5 -0.25 5.0 0 5.5 0.25 V V VDIFF1 VDIFF0 VDIFFN no load; TXAOUT - TXBOUT no load; TXAOUT - TXBOUT no load; TXAOUT - TXBOUT 9 -11 -0.5 10 -10 0 11 -9 0.5 V V V IIH IIL VIN = 0V VIN = 5V 0.1 0.1 μA μA VIH VIL 2.1 V+ 0.5 V V Symbol Test Conditions Min Typ Max Units HOLT INTEGRATED CIRCUITS 5 HI-8592, HI-8593, HI-8594 Table 4. Converter Characteristics V+ = +5V, V- = -5V (HI-8593/4 only), TA = Operating Temperature Range (unless otherwise stated) Parameters Start-up transient (V+, V-) Operating Switching Frequency Symbol tSTART fsw CFLY Recommended Capacitors COUT CSUPPLY CSUPPLY >= COUT (connect from V+ to GND) COUT / CFLY >= 10 Test Conditions Min 425 2.2 22 47 Typ 550 4.7 47 68 Max 10 670 Units ms kHz μF μF μF Table 5. AC Electrical Characteristics V+ = +5V, V- = -5V (HI-8593/4 only), TA = Operating Temperature Range (unless otherwise stated) Parameters Line Driver Propogation Delay Output high to low Output low to high Line Driver Transition Times High Speed Output high to low Output low to high Low Speed Output high to low Output low to high Input Capacitance (Logic)1 Output Capacitance (Tri-state)1 Notes: 1. Guaranteed but not tested tfx trx CIN COUT TX0IN = TX1IN = V+ tfx trx SLP = V+ pin 1 = logic 1 pin 1 = logic 1 SLP = V+ pin 1 = logic 0 pin 1 = logic 0 5.0 5.0 10.0 10.0 15.0 15.0 10 1.5 μs μs pF pF 1.0 1.0 1.5 1.5 2.0 2.0 μs μs tphlx tplhx Symbol Test Conditions defined in Figure 2, no load 500 500 ns ns Min Typ Max Units HOLT INTEGRATED CIRCUITS 6 HI-8592, HI-8593, HI-8594 5V TX1IN 0V tphlx tplhx tplhx 5V TX0IN 0V tphlx trx trx VDIFF (TXAOUT - TXBOUT) 10% 90% 10% 90% 10% 10V 0V -10V tfx Figure 3. Line Driver Timing tfx PACKAGE THERMAL CHARACTERISTICS Maximum ARINC LOAD Package Style1 14-Lead Plastic ESOIC5 ARINC 429 Data Rate Low Speed3 High Speed4 Supply Current (mA)2 TA = 25oC 30 36 TA = 85oC 31 36 Junction Temp, Tj (oC) TA = 85oC 93 95 TA = 125oC 134 135 32 37 33 35 TA = 125oC TA = 25oC TXAOUT and TXBOUT Shorted to Ground6,7,8 Package Style1 14-Lead Plastic ESOIC5 Notes: 1. 2. 3. 4. 5. 6. 7. 8. All data taken in still air. At 100% duty cycle, 5V power supplies. Low Speed: Data Rate = 12.5 Kbps, Load: R = 400 Ohms, C = 30 nF. High Speed: Data Rate = 100 Kbps, Load: R = 400 Ohms, C = 10 nF. Data not presented for C = 30 nF as this is considered unrealistic for high speed operation. 14 Lead Plastic ESOIC (Thermally enhanced SOIC with built in heat sink). Heat sink not soldered. Similar results would be obtained with TXAOUT shorted to TXBOUT. For applications requiring survival with continuous short circuit, operation above Tj = 175°C is not recommended. Data will vary depending on air flow and the method of heat sinking employed. ARINC 429 Data Rate Low Speed3 High Speed4 Supply Current (mA)2 TA = 25oC 89 87 TA = 85oC 82 81 Junction Temp, Tj (oC) TA = 85oC 111 111 TA = 125oC 149 149 77 77 53 52 TA = 125oC TA = 25oC HOLT INTEGRATED CIRCUITS 7 HI-8592, HI-8593, HI-8594 ORDERING INFORMATION HI - 8592xx x x PART NUMBER Blank F PART NUMBER I T M PART NUMBER PS PC CR LEAD FINISH Tin / Lead (Sn / Pb) Solder 100% Matte Tin (Pb-free, RoHS compliant) TEMPERATURE RANGE -40 C to +85 C -55oC to +125oC -55 C to +125 C PACKAGE DESCRIPTION 14 PIN PLASTIC SMALL OUTLINE - NB ESOIC (14HNE) 24 PIN PLASTIC QFN (24PCS) 14 PIN CERDIP (14D). NOTE: Not Available Pb-Free o o o o FLOW I T M BURN IN No No Yes HI - 859x xx x x PART NUMBER Blank F PART NUMBER I T M PART NUMBER PS CR PART NUMBER 8593 8594 LEAD FINISH Tin / Lead (Sn / Pb) Solder 100% Matte Tin (Pb-free, RoHS compliant) TEMPERATURE RANGE -40oC to +85oC -55 C to +125 C -55oC to +125oC PACKAGE DESCRIPTION 8 PIN PLASTIC SMALL OUTLINE - NB ESOIC (8HNE) 8 PIN CERDIP (8D). NOTE: Not Available Pb-Free OUTPUT RESISTANCE 37.5 Ohms 5 Ohms o o FLOW I T M BURN IN No No Yes Legend: ESOIC NB - Thermally enhanced Small Outline Package (SOIC with built-in heat sink) Narrow Body HOLT INTEGRATED CIRCUITS 8 HI-8592, HI-8593, HI-8594 ADDITIONAL PIN CONFIGURATIONS NOTE: All power and ground pins must be connected. V+ 1 SLP 2 TX0IN 3 TX1IN 4 GND 5 CAP+ 6 CAP- 7 14 AMPB 13 TXBOUT 12 AMPA 11 TXAOUT 10 V9 GND 8 V+ SLP 1 TX0IN 2 TX1IN 3 GND 4 8 V+ 7 TXBOUT 6 TXAOUT 5 V- HI-8593CR 8-PIN CERDIP 19 AMPB 18 TXBOUT 17 AMPA 16 TXAOUT 15 V14 V13 GND HI-8592CR 14-PIN CERDIP 23 SLP 22 V+ CAP- 9 21 V+ V+ 10 24 - SLP 1 TX0IN 2 TX1IN 3 GND 4 8 V+ 7 AMPB 6 AMPA 5 V- -1 TX0IN 2 TX1IN 3 GND 4 GND 5 CAP+ 6 HI-8594CR 8-PIN CERDIP -7 -8 V+ 11 20 - HI-8592PC 24-LEAD 5mm x 5mm QFN HOLT INTEGRATED CIRCUITS 9 GND 12 HI-8592, HI-8593, HI-8594 REVISION HISTORY Revision DS8592, Rev. NEW Rev. A Rev. B Date 6/21/10 7/1/10 10/28/10 Description of Change Initial Release Corrected typo in features (no “fixed” rise and fall time) Rev. A had incorrect package drawing (SOIC-8). Replaced with correct ESOIC-8. HOLT INTEGRATED CIRCUITS 10 HI-8592, HI-8593, HI-8594 PACKAGE DIMENSIONS 14-PIN PLASTIC SMALL OUTLINE (ESOIC) - NB (Narrow Body, Thermally Enhanced) .341 ± .004 (8.65 ± .10) .0085 ± .001 (.220 ± .029) inches (millimeters) Package TYPE: 14HNE .270 typ (6.86) .236 ± .008 (6.00 ± .20) Top View .153 ± .003 (3.87 ± .06) .100 typ (2.54) Bottom View .0165 ± .003 (.419 ± .089) See Detail A .055 ± .005 (1.397 ± .13) Electrically isolated heat sink pad on bottom of package. Connect to any ground or power plane for optimum thermal dissipation. .050 BSC (1.27) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) 0o to 8o .033 ± .017 (.838 ± .43) .0025 ± .0015 (.0635 ± .04) Detail A inches (millimeters) Package Type: 8HNE Bottom View .140 ± .01 (3.56 ± .26) 8-PIN PLASTIC SMALL OUTLINE (ESOIC) - NB (Narrow Body, Thermally Enhanced) Top View .194 ± .004 (4.92 ± .09) .0085 ± .0015 (.216 ± .038) .236 ± .008 (5.99 ± .21) PIN 1 .154 ± .004 (3.90 ± .09) .100 ± .01 (2.54 ± .25) .0165 ± .003 (.419 ± .089) See Detail A .055 ± .005 (1.397 ± .127) Electrically isolated heat sink pad on bottom of package. Connect to any ground or power plane for optimum thermal dissipation. 0o to 8o .0025 ± .002 (.064 ± .038) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) .050 BSC (1.27) .033 ± .017 (.838 ± .432) Detail A HOLT INTEGRATED CIRCUITS 11 HI-8592, HI-8593, HI-8594 14-PIN CERDIP .767 max (19.48 max) .050 max (1.27 max) inches (millimeters) Package Type: 14D .005 min (.127 min) .288 + .003 (7.32 + .08) .056 typ (1.422 typ) .100 BSC (2.54) .310 + .010 (7.874 + .254) .180 max (4.572 max) .200 max (5.080 max) .015 min (.381 min) .125 min (3.175 min) .018 + .003 (.457 + .760) 0o to 15o .010 + .002 (.254 + .051) 8-PIN CERDIP Package Type: 8D .380 ± .004 (9.652 ± .102) .005 MIN. (.127 MIN.) .248 ± .003 (6.299 ± .076) .039 ± .006 (.991 ± .154) .100 ± .008 (2.540 ± .203) .015 MIN. (.381 MIN.) .314 ± .003 (7.976 ± .076) .200 MAX. (5.080 MAX.) .163 ± .037 (4.140 ± .940) Base Plane Seating Plane .056 ± .006 (1.422 ± .152) .018 ± .006 (.457 ± .152) .350 ± .030 (8.890 ± .762) .010 ± .006 (.254 ± .152) HOLT INTEGRATED CIRCUITS 12 HI-8592, HI-8593, HI-8594 24-PIN PLASTIC CHIP-SCALE PACKAGE (QFN) Heat sink pad on bottom of package. Heat sink can float or can be connected to V+. DO NOT connect heat sink to GND millimeters Package Type: 24PCS 5.00 + .05 3.65 + .15 0.65 BSC 5.00 + .05 Top View 3.65 + .15 Bottom View 0.35 typ. 0.45 typ. 0.93 max 0.025 max BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HOLT INTEGRATED CIRCUITS 13