C1206U104J050T

MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1705 1. Scope This specification is applied to Multilayer Ceramic Chip Capacitor(MLCC) for use in electric equipment for the voltage is ranging from 4V to 50V. The series suitable for general electrics circuit, telecommunications, personal computers and peripheral, power circuit and mobile application. (This product is compliant with the RoHS & HF.) 2. Parts Number Code C 1206 U 104 J 050 T (1) (2) (3) (4) (5) (6) (7) (4)Capacitance (1)Product Product Code C Multilayer Ceramic Chip Capacitor Code Nominal Capacitance (pF) 104 100,000.0 . If there is a decimal point, it shall be expressed by an English capital letter R ※ (2)Chip Size Code 1206 (5)Capacitance Tolerance Length×Width unit : mm(inch) 3.20× 1.60 (.126× .063) Code J (3)Temperature Characteristics Code U Temperature Temperatue Characteristic Range ℃ U2J ℃ ℃ -55 ~+25 +25~+125 unit :pico farads(pF) Tolerance ± 5.00 % Nominal Capacitance More Than 10 pF (6)Rated Voltage Temperature Coefficient Code 050 ℃ -750+120-347ppm/ -750±120 ppm/ ℃ Rated Voltage (Vdc) 50 (7)Tapping Code T Type Tape & Reel 3. Nominal Capacitance and Tolerance 3.1 Standard Combination of Nominal Capacitance and Tolerance Characteristic U2J Tolerance J (± 5.00 %) Nominal Capacitance E-12, E-24 series 3.2 E series(standard Number) Standard No. E- 3 E- 6 E-12 E-24 1.0 1.0 1.0 1.0 1.1 1.5 1.2 1.2 1.3 1.5 1.5 1.6 1.8 1.8 2.0 Application Capacitance 2.2 2.2 3.3 2.2 2.7 3.3 3.9 2.2 2.7 3.3 3.9 2.4 3.0 3.6 4.3 4. Operation Temperature Range Characteristic U2J Temperature Range -55 ~ +125 ℃ 5. Storage Condition ： ℃ Reference Temp. 25 ℃ ℃ Storage Temperature 5 to 40 ： Relative Humidity 20 to 70 % ： Storage Time 12 months max. Page : 1 /14 4.7 4.7 4.7 4.7 5.1 6.8 5.6 5.6 6.2 6.8 6.8 7.5 8.2 8.2 9.1 MULTILAYER CERAMIC CHIP CAPACITORS 6. Dimensions 6.1 Configuration and Dimension BW NCC-016-1705 ： B T W L TYPE 1206 L 3.20± 0.30 W 1.60± 0.20 T 1.60± 0.20 B (min) 1.50 ： 6.2 Termination Type Solder Metal Barrier External Electrodes Inner Electrodes Ceramic Body Page : 2 /14 Unit:mm BW (min) 0.30 MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1705 7. Performance No. Item 1 2 3 Visual Dimension Insulation Resistance 4 5 Capacitance Q 6 Withstanding Voltage Temperature Capacitance Coefficient 7 8 Adhesive Strength Of Termination Specification Test Condition No abnormal exterior appearance See Page 2 500/C Ω min. Visual Inspection Visual Inspection Applied Voltage: Rated Voltage Charge Time : 60±5 sec. Charge-Discharge current shall be less than 50mA current. Within The Specified Tolerance More Than 30pF : Q 1000 ≧ Char Frequency Voltage U2J 1KHz±10% 1.0±0.2Vrms Perform a heat temperature at 150±5℃ for 30min then place room temp. for 24±2hr. No dielectric breakdown or mechanical breakdown Char. Temp. Range Cap. Change(%) U2J -55 ~+25 -750+120/-347ppm/ +25 ~+125 -750±120ppm/ 250% of the rated voltage for 1~5 sec. charge/discharge Current is less than 50mA. No indication of peeling shall occur on the terminal electrode. Pull force shall be applied for 10± 1 second. ≦0603----5N( 0.5 Kg·f) ＞0603----10N( 1.0 Kg·f) ℃ ℃ ℃ ℃ ℃ ℃ C2－C1 ×100% C1(T2－T1) T1: Standard Temperature(25℃) T2: Test Temperature C1:Capacitance At Standard Temperature(25℃) C2: Capacitance At Test Temperature (T2) 0.2Vrms shall be applied. ≒ ≒ N·f 9 Resistance Appearto ance Flexure of Substrate C-Meter No mechanical damage or capacitance change more than the following table. Capacitance Change Char. Cap. Change ± 5.0% U2J ≦ The board shall be bend 1.0mm with a rate of 1.0 mm/sec. R230 Bending Limit C Meter 45±1mm Page : 3 /14 45±1mm MULTILAYER CERAMIC CHIP CAPACITORS No. Item Specification 10 Solderability More than 90% of the terminal surface is to be soldered newly, so metal part does not come out or dissolve. 11 Resistance To Soldering Heat Appearance Capacitance Q No mechanical damage shall occur. U2J ≤ ± 2.5% To satisfy the specified initial value NCC-016-1705 Test Condition ℃ Solder Temperature : 245± 5 Dip Time : 5 ± 0.5sec Immersing Speed : 25±10% mm/s Solder : Lead Free Solder Flux :Rosin Preheat : At 80~120 for 10~30sec. ℃ Preheat : at 150± 10℃ for 60~120sec. Dip : solder temperature of 260± 5℃ Dip Time : 10 ± 1sec. Immersing Speed : 25±10% mm/s Flux :Rosin Measure at room temperature after cooling for 24 ± 2 Hours Insulation To satisfy the specified initial value Resistance 12 Tempera-. ture Cycle Appearance Capacitance Q No mechanical damage shall occur. U2J ≤ ± 2.5% To satisfy the specified initial value Insulation To satisfy the specified initial value Resistance 13 Humidity Appearance Capacitance Q No mechanical damage shall occur. Characteristic U2J Cap. Change ≤ ± 5.0% measure. Capacitor shall be subjected to five cycles of the temperature cycle as following: Step Temp.(℃) Time(min) 1 Min Rated Temp. +0/-3 30 2 25 3 3 Max Rated Temp. +3/-0 30 4 25 3 Measure at room temperature after cooling for 24 ± 2 Hours measure. ℃ Temperature : 40± 2 Relative Humidity : 90 ~ 95%RH Test Time : 500 +12/-0Hr Measure at room temperature after cooling for 24 ± 2 Hours 30pF & Over : Q ≧350 Insulation 50/C Ω min. Resistance Page : 4 /14 MULTILAYER CERAMIC CHIP CAPACITORS No. 14 Item Humidity Load Specification Appearance Capacitance Q Applied Voltage :Rated Voltage Temperature : 40± 2 Relative Humidity : 90 ~ 95%RH Characteristic Cap. Change U2J Within ± 7.5% or ± 0.75pF Test Time : 500 +12/-0Hr Current Applied : 50 mA Max. whichever is larger of initial value Measure at room temperature after cooling for 30pF & Over : Q ≧350 24 ± 2 Hours Insulation 50/C Ω min. Resistance Vibration Appearance Capacitance Q Test Condition No mechanical damage shall occur. Insulation 25/C Ω min. Resistance 15 High AppearNo mechanical damage shall occur. Temperature ance Load CapacitCharacteristic Cap. Change Within 5.0% or ±0.5pF (Life Test) ance U2J whichever is larger of initial value 30pF & Over : Q ≧350 Q 16 NCC-016-1705 No mechanical damage shall occur Within the specified tolerance To satisfy the specified initial value Insulation To satisfy the specified initial value Resistance Page : 5 /14 ℃ The capacitors applied DC testing voltage is applied for one hour at maximum operation temperature ±3 then shell be set for 48± 4 hours at room temperature and the initial measurement shall be conducted. Applied Voltage: Rated Voltage Temperature: max. operation temperature Test Time : 1000 +48/-0 Hr Current Applied : 50mA Max Measure at room temperature after cooling for 24 ± 2 Hours ℃ Solder the capacitor on P.C. board. Vibrate the capacitor with amplitude of 1.5mm P-P changing the frequencies from 10Hz to 55Hz and back to 10Hz in about 1 min. Repeat this for 2 hours each in 3 perpendicular directions. MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1705 Fig.1 P.C. Board for Bending Strength Test Solder Resist Copper C 40mm Material : Glass Epoxy Substrate A : Copper (Thickness : 0.035mm) B : Solder Resist 100mm 1.6mm Fig.2 Test Substrate Solder Resist Copper C Material : Glass Epoxy Substrate A 40mm B : Copper (Thickness : 0.035mm) : Solder Resist Thickness : 1.6 mm 100mm Unit:mm Type 0201 0402 0603 0805 1206 1210 1808 1812 2208 2211 2220 A 0.2 0.5 1.0 1.2 2.2 2.2 3.5 3.5 4.5 4.5 4.5 B 0.9 1.5 3.0 4.0 5.0 5.0 7.0 7.0 8.0 8.0 8.0 Page : 6 /14 C 0.4 0.6 1.0 1.6 2.0 2.9 2.5 3.7 2.5 3.0 5.6 MULTILAYER CERAMIC CHIP CAPACITORS 8. Packing 8.1 Bulk Packing According to customer request. 8.2 Chip Capacitors Tape Packing Chip Section Empty Section 40mm min. Empty Section 20mm min. Drawing Direction 400mm min. 8.3 Material And Quantity Tape Material Paper Plastic 0201 T 0.33mm 15,000 pcs/Reel NA ≦ Tape Material Paper Plastic 0402 T 0.55mm 10,000 pcs/Reel NA ≦ T ＞ ≦ 1206 ≦ T 1.00mm 4,000 pcs/Reel NA Tape Material Paper Plastic 0603/0805 T 1.00mm T 1.00mm 4,000 pcs/Reel NA NA 3,000 pcs/Reel ≦1.25mm NA 3000 pcs/Reel 1.00mm ＜T≦1.25mm NA 3,000 pcs/Reel 1808/1210 1.25mm T 2.40mm NA 2000 pcs/Reel ＜≦ T ＞1.25mm NA 2,000 pcs/Reel T ＞2.40mm NA 500/1,000 pcs/Reel Tape 1812/2211/2220 1825/2225 2208 Material T 2.20mm T 2.20mm T 2.20mm T 2.20mm T 2.20mm Paper NA NA NA NA NA Plastic 1000 pcs/Reel 700 pcs/Reel 700 pcs/Reel 400 pcs/Reel 1000 pcs/Reel NA Not Available ≦ ＞ ≦ ＞ ≦ ： 8.4 Cover Tape Reel Off Force 8.4.1 Peel-Off Force 5 g·f ≦Peel-Off Force ≦70 g·f 8.4.2 Measure Method 165 to 180° Top Tape Bottom Tape Page : 7 /14 NCC-016-1705 MULTILAYER CERAMIC CHIP CAPACITORS 8.5 Paper Tape Pitch Hold NCC-016-1705 Chip Inserting Hole I F A G B C t D H E Unit:mm TYPE 0201 0402 0603 0805 1206 1210 A 0.37± 0.1 0.61± 0.1 1.10± 0.2 1.50± 0.2 1.90± 0.2 2.90± 0.2 B 0.67± 0.1 1.20± 0.1 1.90± 0.2 2.30± 0.2 3.50± 0.2 3.60± 0.2 C 4.00± 0.1 TYPE 0201 0402 0603 0805 1206 1210 F 1.75± 0.10 G 3.50± 0.05 H 8.0± 0.30 D 2.00± 0.05 E 2.00± 0.1 4.00± 0.1 I φ1.50 +0.10/-0 t 1.10 max. 8.6 Plastic Tape Pitch Hold Chip Inserting Hole I F A G H B t C O D E J Type 0805 1206 1210 1808 1812 1825 2208 2211 2220 2225 Unit:mm A 1.5±0.2 1.9±0.2 2.9±0.2 2.5±0.2 3.6±0.2 6.9 0.2 2.5±0.2 3.2±0.2 5.4±0.2 6.9 0.2 ± ± B 2.3±0.2 3.5±0.2 3.6±0.2 4.9±0.2 4.9±0.2 4.9 0.2 6.1±0.2 6.1±0.2 6.1±0.2 6.1 0.2 C 4.0± 0.1 D 2.0± 0.05 E 4.0± 0.1 8.0± 0.1 ± ± Page : 8 /14 F 1.75± 0.1 MULTILAYER CERAMIC CHIP CAPACITORS Type 0805 1206 1210 1808 1812 1825 2208 2211 2220 2225 G 3.5± 0.05 H 8.0± 0.3 5.5± 0.05 12.0 ± 0.3 I φ1.5+0.1/-0 J 3.0 max. t 0.3 max. 4.0 max. NCC-016-1705 O 1.0± 0.1 1.5± 0.1 8.7 Reel Dimensions ：Polystyrene Reel Material E C B D A W Unit:mm Type 0201 0402 0603 0805 1206 1210 1808 1812 1825 2208 2211 2220 2225 φ382 max A φ50 min B φ178±0.2 φ60±0.2 C φ13± 0.5 D φ21± 0.8 E 2.0±0.5 W 10± 0.15 ± 13 0.3 Page : 9 /14 MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1705 Precautionary Notes: 1. Storage Store the capacitors where the temperature and relative humidity don’t exceed 40°C and 70%RH. We recommend that the capacitors be used within 12 months from the date of manufacturing. Store the products in the original package and do not open the outer wrapped, polyethylene bag, till just before usage. If it is open, seal it as soon as possible or keep it in a desiccant with a desiccation agent. 2. Construction of Board Pattern Improper circuit layout and pad/land size may cause excessive or not enough solder amount on the PC board. Not enough solder may create weak joint, and excessive solder may increase the potential of mechanical or thermal cracks on the ceramic capacitor. Therefore we recommend the land size to be as shown in the following table: 2.1 Size and recommend land dimensions for reflow soldering Capacitor C Slit EIA Code Land 0201 0402 0603 0805 1206 1210 1808 1812 1825 2208 2211 2220 2225 E D B Solder Resistor A Chip (mm) L W 0.60 0.30 1.00 0.50 1.60 0.80 2.00 1.25 3.20 1.60 3.20 2.50 4.60 2.00 4.60 3.20 4.60 6.35 5.70 2.00 5.70 2.80 5.70 5.00 5.70 6.35 A 0.2~0.3 0.3~0.5 0.4~0.6 0.7~0.9 2.2~2.4 2.2~2.4 2.8~3.4 2.8~3.4 2.8~3.4 4.0~4.6 4.0~4.6 4.0~4.6 4.0~4.6 B 0.2~0.4 0.3~0.5 0.6~0.7 0.6~0.8 0.8~0.9 1.0~1.2 1.8~2.0 1.8~2.0 1.8~2.0 2.0~2.2 2.0~2.2 2.0~2.2 2.0~2.2 Land (mm) C 0.2~0.4 0.4~0.6 0.6~0.8 0.8~1.1 1.0~1.4 1.8~2.3 1.5~1.8 2.3~3.0 5.1~5.8 1.5~1.8 2.0~2.6 3.5~4.8 5.1~5.8 D ----1.0~2.0 1.0~2.0 1.0~2.8 1.0~2.8 1.0~4.0 1.0~4.0 1.0~4.0 1.0~4.0 1.0~4.0 2.2 Mechanical strength varies according to location of chip capacitors on the P.C. board. Design layout of components on the PC board such a way to minimize the stress imposed on the components, upon flexure of the boards in depanelization or other processes. Component layout close to the edge of the board or the “depanelization line” is not recommended. Susceptibility to stress is in the order of: a>b>c and d>e e b perforation a c slit d Page : 10 /14 E ----3.2~3.7 4.1~4.6 3.6~4.1 4.8~5.3 7.1~8.3 3.6~4.1 4.4~4.9 6.6~7.1 7.1~8.3 MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1705 2.3 Layout Recommendation Example Use of Common Solder Land Need to Avoid Solder With Chassis Lead Wire Chip Use of Common Solder Land With Other SMD Chassis Solder Excessive Solder Solder Land Adhesive Solder Land PCB Recommendation Lead Wire Chip α Solder Resist Solder Resist Adhesive PCB Solder Land β α>β 3. Mounting 3.1 Sometimes crack is caused by the impact load due to suction nozzle in pick and place operation. In pick and place operation, if the low dead point is too low, excessive stress is applied to component. This may cause cracks in the ceramic capacitor, therefore it is required to move low dead point of a suction nozzle to the higher level to minimize the board warp age and stress on the components. Nozzle pressure is typically adjusted to 1N to 3N (static load) during the pick and place operation. Excessive Stress Nozzle Warping of Board Warping of Board PCB Crack Support pin 3.2 Amount of Adhesive a b a Example : 0805 & 1206 0.2mm min. a b c c 70 ~ 100 µm Do not touch the solder land c Page : 11 /14 MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1705 4. Soldering 4.1. Wave Soldering Most of components are wave soldered with solder at 230 to 250°C. Adequate care must be taken to prevent the potential of thermal cracks on the ceramic capacitors. Refer to the soldering methods below for optimum soldering benefits. Recommend flow soldering temperature Profile Pre-heating Soldering Cooling Temperature (°C) 300 Soldering Method 1206 and Under 250 230 200 ℃ Change in Temp.( ) T ≤ 100~130 max. Δ ΔT 120seconds or more 60seconds or more 2 to 3 sec. To optimize the result of soldering, proper preheating is essential: 1) Preheat temperature is too low a. Flux flows to easily b. Possibility of thermal cracks 2) Preheat temperature is too high a. Flux deteriorates even when oxide film is removed b. Causes warping of circuit board c. Loss of reliability in chip and other components Cooling Condition: Natural cooling using air is recommended. If the chips are dipped into a solvent for cleaning, the temperature difference ( T) between the solvent and the chips must be less than 100°C. Δ 4.2 Reflow Soldering Preheat and gradual increase in temperature to the reflow temperature is recommended to decrease the potential of thermal crack on the components. The recommended heating rate depends on the size of component, however it should not exceed 3°C/Sec. Recommend reflow profile for Lead-Free soldering temperature Profile (MIL-STD-202G #210F) Soldering Cooling Pre-heating Temperature (°C) 217 ※ The cycles of soldering : Twice (max.) Soldering Method Change in Temp.( ℃) 1206 and Under ΔT ≦ 190 ℃ 1210 and Over ΔT ≦ 130 ℃ 260°C max./10sec. Min. 260max. ΔT 150°C /60sec. Min. 70 to 90 sec. Page : 12 /14 MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1705 4.3 Hand Soldering Sudden temperature change in components, results in a temperature gradient recommended in the following table, and therefore may cause internal thermal cracks in the components. In general a hand soldering method is not recommended unless proper preheating and handling practices have been taken. Care must also be taken not to touch the ceramic body of the capacitor with the tip of solder Iron. 350 Soldering Method 1206 and Under 1210 and Over 250 Temperature (°C) 200 Change in Temp.( T 150 T 130 Δ ≦ Δ ≦ ℃ ℃ ℃) ΔT Within 5 seconds. How to Solder Repair by Solder Iron 1) Selection of the soldering iron tip The required temperature of solder iron for any type of repair depends on the type of the tip, the substrate material, and the solder land size. 2) recommended solder iron condition a.) Preheating Condition Board and components should be preheated sufficiently at 150°C or over, and soldering should be conducted with soldering iron as boards and components are maintained at sufficient temperatures. b.) Soldering iron power shall not exceed 30 W. c.) Soldering iron tip diameter shall not exceed 3mm. d.) Temperature of iron tip shall not exceed 350°C to perform the process within 5 seconds. (refer to MIL-STD-202G) f.) Do not touch the ceramic body with the tip of solder iron. Direct contact of the soldering iron tip to ceramic body may cause thermal cracks. g.) After soldering operation, let the products cool down gradually in the room temperature. ： 5. Handling after chip mounted 5.1 Proper handling is recommended, since excessive bending and twist of the board, depends on the orientation of the chip on the board, may induce mechanical stress and cause internal crack in the capacitor. Higher potential of crack Lower potential of crack Bending → Twist 5.2 There is a potential of crack if board is warped due to excessive load by check pin ○ ╳ Check pin Support Pin Check pin Page : 13 /14 MULTILAYER CERAMIC CHIP CAPACITORS NCC-016-1705 5.3 Mechanical stress due to warping and torsion. (a) Crack occurrence ratio will be increased by manual separation. (b) Crack occurrence ratio will be increased by tensile force , rather than compressive force. ○ :Compressive Stress ╳ :Tensile Stresss Crack 6.. Handling of Loose Chip Capacitor 6.1 If dropped the chip capacitor may crack. Crack Floor 6.2 In piling and stacking of the P.C. boards after mounting for storage or handling, the corner of the P.C. board may hit the chip capacitor mounted on another board to cause crack. PCB Crack 7. Safekeeping condition and period For or safekeeping of the products, we recommend to keep the storage temperature between +5 to +40°C and under humidity of 20 to 70% % RH. The shelf life of capacitors is 12 months. Page : 14 /14