C1812X103K202TEP

MULTILAYER CERAMIC CHIP CAPACITORS HVC-019-2005 1. Scope This specification is applied to Multilayer Ceramic Chip Capacitor (MLCC) for use in electric equipment for the voltage is ranging from 1.5KV (Include) to 5KV. The MLCC support for Lead-Free wave and reflow soldering, and electrical characteristic and reliability are same as before. (This product is compliant with the RoHS & HF.) 2. Parts Number Code C 1812 X 103 K 202 T E P (1) (2) (3) (4) (5) (6) (7) (8) (9) (5)Capacitance Tolerance (1)Product Product Code C Code Tolerance Nominal Capacitance K ± 10.0 % More Than 10 pF Multilayer Ceramic Chip Capacitor (2)Chip Size Code 1812 (6)Rated Voltage Length×Width unit : mm(inch) 4.60× 3.20 (.181× .125) Code (3)Temperature Characteristics Code Temperature Characteristic X X7R Code ℃~+125℃ -55 Temperature Coefficient ± 15% unit :pico farads(pF) Nominal Capacitance (pF) 103 2,000 (7)Tapping Temperature Range (4)Capacitance Rated Voltage (Vdc) 202 10,000.0 ※. If there is a decimal point, it shall be expressed by an English capital letter R Code Type T Tape & Reel (8)Thickness Code E Thickness T (mm) 1.60± 0.20 (9)Special Code Code P 3. Nominal Capacitance and Tolerance Type Special Code 3.1 Standard Combination of Nominal Capacitance and Tolerance Class Ⅱ Characteristic X7R Tolerance K (± 10.0 %) Nominal Capacitance E-3, E-6 series 3.2 E series(standard Number) Standard No. E- 3 E- 6 E-12 E-24 1.0 1.0 1.0 1.0 1.1 1.5 1.2 1.2 1.3 1.5 1.5 1.6 1.8 1.8 2.0 Application Capacitance 2.2 2.2 3.3 2.2 2.7 3.3 3.9 2.2 2.7 3.3 3.9 2.4 3.0 3.6 4.3 4.7 4.7 4.7 4.7 5.1 6.8 5.6 5.6 6.2 6.8 6.8 7.5 8.2 8.2 9.1 4. Operation Temperature Range Class Ⅱ Characteristic X7R 5. Storage Condition ： Temperature Range -55 ~ +125 ℃ ℃ Reference Temp. 25 ℃ ℃ Storage Temperature 5 to 40 ： Relative Humidity 20 to 70 % ： Storage Time 12 months max. IHHEC is a trademark of Holy Stone Enterprise Co., Ltd Page : 1/14 MULTILAYER CERAMIC CHIP CAPACITORS HVC-019-2005 6. Dimensions 6.1 Configuration and Dimension： BW B T W L TYPE 1812 L 4.60± 0.30 W 3.20± 0.30 T 1.60± 0.20 B (min) 2.50 Unit:mm BW (min) 0.30 6.2 Termination Type： Solder Metal Barrier Polymer Electrodes (If applicable) External Electrodes Inner Electrodes Ceramic Body IHHEC is a trademark of Holy Stone Enterprise Co., Ltd Page : 2/14 MULTILAYER CERAMIC CHIP CAPACITORS HVC-019-2005 7. Performance No. Item 1 Visual 2 3 4 Specification Test Condition No abnormal exterior appearance Visual inspection Dimension See Page 2 Visual inspection Insulation Resistance 10,000M min. V 500V, Applied 500Vdc Charge Time 60sec. Is applied less than 50mA current. Capacitance Ω Class Ⅱ ＞ Within The Specified Tolerance ： Class Ⅱ： Frequency Voltage X7R 1KHz±10% 1.0±0.2Vrms Perform a heat temperature at 150±5 for 30min. then place room temp. for 24±2hr. ℃ 5 6 D.F. Class Ⅱ Withstanding Voltage Char. Maximum X7R: 2.5% max. No dielectric breakdown or mechanical breakdown ≦ 1000 V :120% Rated Voltage Voltage ramp up rate 500v/sec for 1~5 sec. charge/discharge Current is less than 50mA. ≦ ※ Withstanding voltage testing requires immersion of the element in a isolation fluid prevent arcing on the chip surface, at voltage over 1000Vdc. 7 8 Temperature Capacitance Coefficient Class Ⅱ Adhesive Strength of Termination Ⅱ Char. Temp. Range Cap. Change(%) Class : (C2-C1)/C1 × 100% X7R -55 ~+125 ± 15% C1:Capacitance at standard temperature(25 C2: Capacitance at test temperature (T2) No indication of peeling shall occur on Pull force shall be applied for 10± 1 second. the terminal electrode. 0603----5N( 0.5 Kg·f) 0603----10N( 1.0 Kg·f) ℃ ℃ ≦ ＞ ℃) ≒ ≒ N·f 9 Resistance Appear- No mechanical damage shall be occur. to ance Flexure C-Meter Capacitance Change of Substrate Char. Cap. Change X7R ± 12.5% ≦ Bending shall be applied to the 1.0 mm with 1.0 mm/sec. The duration of the applied forces shall be 5 ± 1sec R230 Bending Limit C Meter 45±1mm IHHEC is a trademark of Holy Stone Enterprise Co., Ltd 45±1mm Page : 3/14 MULTILAYER CERAMIC CHIP CAPACITORS No. Item Specification 10 Solderability More than 90% of the terminal surface is to be soldered newly, so metal part does not come out or dissolve . 11 Resistance To Soldering Heat Appearance Capacitance No mechanical damage shall occur. Characteristic Class X7R Ⅱ Cap. Change Within ± 10% D.F. To satisfy the specified initial value Class Insulation To satisfy the specified initial value Resistance Withstand To satisfy the specified initial value Voltage Ⅱ 12 Tempera-. Appearture ance Cycle Capacitance No mechanical damage shall occur Characteristic Class X7R Ⅱ Cap. Change Within ± 7.5% D.F. To satisfy the specified initial value Class Insulation To satisfy the specified initial value Resistance Ⅱ HVC-019-2005 Test Condition ℃ Solder Temperature : 245± 5 Dip Time : 5 ± 0.5 sec. Immersing Speed : 25±10% mm/s Solder : Lead Free Solder Flux :Rosin Preheat : At 80~120 for 10~30sec. ℃ Ⅱ Class capacitor shall be set for 48±4 hours at room temperature after one hour heat treatment at 150 +0/-10 before initial measure. Preheat : At 150± 10 For 60~120sec. Dip : Solder Temperature of 260± 5 Dip Time : 10 ± 1sec. Immersing Speed : 25±10% mm/s Flux :Rosin ℃ ℃ ℃ Measure at room temperature after cooling for Class : 48 ± 4 Hours Class capacitor shall be set for 48± 4 hours at room temperature after one hour heat treatment at 150 +0/-10 before initial measure. Ⅱ Ⅱ ℃ Capacitor shall be subjected to five cycles of the temperature cycle as following: ℃ Step Temp.( ) Time(min) 1 Min Rated Temp. +0/-3 30 2 25 3 3 Max Rated Temp. +3/-0 30 4 25 3 Measure at room temperature after cooling for Class :48 ± 4 Hrs Solder the capacitor on P.C. board shown in Fig 2. before testing. Class capacitor shall be set for 48± 4 hours at room temperature after one hour heat treatment at 150+0/-10 before initial measure. Temperature : 40± 2 Relative Humidity : 90 ~ 95%RH Test Time : 500 +12/-0Hr Ⅱ 13 Humidity Appearance Capacitance No mechanical damage shall occur Characteristic Class X7R Ⅱ D.F. Char. Class X7R: 5.0% max. Insulation 1,000M min. Resistance Ⅱ Cap. Change Within ± 15% Maximum Ω Ⅱ ℃ ℃ Measure at room temperature after cooling for Class : 48 ± 4Hrs Ⅱ Solder the capacitor on P.C. board shown in Fig 2. before testing. IHHEC is a trademark of Holy Stone Enterprise Co., Ltd Page : 4/14 MULTILAYER CERAMIC CHIP CAPACITORS No. 14 Item Specification High AppearTemperature ance Load Capacitance No mechanical damage shall occur Characteristic Class X7R Ⅱ D.F. Char. Class X7R: 5.0% max. Insulation 1,000M min. Resistance Ⅱ Cap. Change Within ± 15% maximum Ω HVC-019-2005 Test Condition Ⅱ Class capacitors applied DC voltage (following table) is applied for one hour at maximum operation temperature 3 then shall be set for 48 4 hours at room temperature and the initial measurement shall be conducted. Voltage Conditioning : ± 100% Rated Voltage meet ±℃ MIL-PRF-49467(Group A/B) Current Applied : 50 mA Max. Measure at room temperature after cooling for Class : 48 4 Hours Ⅱ 15 Vibration Appearance Capacitance No mechanical damage shall occur Characteristic Class X7R Ⅱ Cap. Change Within ± 7.5% D.F. To satisfy the specified initial value Class Insulation To satisfy the specified initial value Resistance Ⅱ IHHEC is a trademark of Holy Stone Enterprise Co., Ltd ± Solder the capacitor on P.C. Board shown in Fig 2. before testing. Vibrate the capacitor with amplitude of 1.5mm P-P changing the frequencies from 10Hz to 55Hz and back to 10Hz in about 1 min. Repeat this for 2 hours each in 3perpendicular directions. Page : 5/14 MULTILAYER CERAMIC CHIP CAPACITORS HVC-019-2005 Fig.1 P.C. Board for Bending Strength Test Solder Resist Copper C 40mm Material : Glass Epoxy Substrate A : Copper (Thickness : 0.035mm) B : Solder Resist 100mm 1.6mm Fig.2 Test Substrate Solder Resist Copper C Material : Glass Epoxy Substrate A 40mm B : Copper (Thickness : 0.035mm) : Solder Resist Thickness : 1.6 mm 100mm Unit:mm Type 0201 0402 0603 0805 1206 1210 1808 1812 1825 2208 2211 2220 2225 A 0.2 0.5 1.0 1.2 2.2 2.2 3.5 3.5 3.5 4.5 4.5 4.5 4.5 IHHEC is a trademark of Holy Stone Enterprise Co., Ltd B 0.9 1.5 3.0 4.0 5.0 5.0 7.0 7.0 7.0 8.0 8.0 8.0 8.0 C 0.4 0.6 1.0 1.6 2.0 2.9 2.5 3.7 6.9 2.5 3.0 5.6 7.0 Page : 6/14 MULTILAYER CERAMIC CHIP CAPACITORS HVC-019-2005 8. Packing 8.1 Bulk Packing According to customer request. 8.2 Chip Capacitors Tape Packing Chip Section Empty Section 40mm min. Empty Section 20mm min. Drawing Direction 400mm min. 8.3 Material And Quantity Tape Material Paper Plastic 0201 T 0.33mm 15,000 pcs/Reel NA 0402 T 0.55mm 10,000 pcs/Reel NA ≦ Tape Material Paper Plastic ≦ T ＞ ≦ 1206 ≦ T 1.00mm 4,000 pcs/Reel NA Tape Material Paper Plastic 0603/0805 T 1.00mm T 1.00mm 4,000 pcs/Reel NA NA 3,000 pcs/Reel ≦1.25mm NA 3,000 pcs/Reel 1.00mm ＜T≦1.25mm NA 3,000 pcs/Reel 1808/1210 1.25mm T 2.40mm NA 1,000/2,000 pcs/Reel ＜≦ T ＞1.25mm NA 2,000 pcs/Reel T ＞2.40mm NA 500/1,000 pcs/Reel Tape 1812/2211/2220 1825/2225 2208 Material T 2.20mm T 2.20mm T 2.20mm T 2.20mm T 2.20mm Paper NA NA NA NA NA Plastic 1,000 pcs/Reel 700 pcs/Reel 700 pcs/Reel 400 pcs/Reel 1,000 pcs/Reel NA Not Available ≦ ＞ ≦ ＞ ≦ ： 8.4 Cover Tape Reel Off Force 8.4.1 Peel-Off Force 5 g· f ≦Peel-Off Force ≦70 g·f 8.4.2 Measure Method 165 to 180° Top Tape Bottom Tape IHHEC is a trademark of Holy Stone Enterprise Co., Ltd Page : 7/14 MULTILAYER CERAMIC CHIP CAPACITORS 8.5 Paper Tape Pitch Hold HVC-019-2005 Chip Inserting Hole I F A H G B C t D E Unit:mm TYPE 0201 0402 0603 0805 1206 1210 A 0.37± 0.1 0.61± 0.1 1.10± 0.2 1.50± 0.2 1.90± 0.2 2.90± 0.2 B 0.67± 0.1 1.20± 0.1 1.90± 0.2 2.30± 0.2 3.50± 0.2 3.60± 0.2 C 4.00± 0.1 TYPE 0201 0402 0603 0805 1206 1210 F 1.75± 0.10 G 3.50± 0.05 H 8.0± 0.30 D 2.00± 0.05 E 2.00± 0.1 4.00± 0.1 I φ1.50 +0.10/-0 t 1.10 max. 8.6 Plastic Tape Pitch Hold Chip Inserting Hole I F A G H B t C O D E J Type 0805 1206 1210 1808 1812 1825 2208 2211 2220 2225 Unit:mm A 1.5±0.2 1.9±0.2 2.9±0.2 2.5±0.2 3.6±0.2 6.9 0.2 2.5±0.2 3.2±0.2 5.4±0.2 6.9 0.2 ± ± B 2.3±0.2 3.5±0.2 3.6±0.2 4.9±0.2 4.9±0.2 4.9 0.2 6.1±0.2 6.1±0.2 6.1±0.2 6.1 0.2 C 4.0± 0.1 ± D 2.0± 0.05 E 4.0± 0.1 F 1.75± 0.1 8.0± 0.1 ± IHHEC is a trademark of Holy Stone Enterprise Co., Ltd Page : 8/14 MULTILAYER CERAMIC CHIP CAPACITORS Type 0805 1206 1210 1808 1812 1825 2208 2211 2220 2225 G 3.5± 0.05 H 8.0± 0.3 5.5± 0.05 12.0 ± 0.3 I φ1.5+0.1/-0 J 3.0 max. t 0.3 max. 4.0 max. HVC-019-2005 O 1.0± 0.1 1.5± 0.1 8.7 Reel Dimensions ：Polystyrene Reel Material E C B D A W Unit:mm Type 0201 0402 0603 0805 1206 1210 1808 1812 1825 2208 2211 2220 2225 φ382 max A φ50 min B φ178±2.0 φ60±2.0 C φ13± 0.5 IHHEC is a trademark of Holy Stone Enterprise Co., Ltd D φ21± 0.8 E 2.0±0.5 W 10± 0.15 ± 13 0.3 Page : 9/14 MULTILAYER CERAMIC CHIP CAPACITORS HVC-019-2005 Precautionary Notes: 1. Storage Store the capacitors where the temperature and relative humidity don’t exceed 40°C and 70%RH. We recommend that the capacitors be used within 12 months from the date of manufacturing. Store the products in the original package and do not open the outer wrapped, polyethylene bag, till just before usage. If it is open, seal it as soon as possible or keep it in a desiccant with a desiccation agent. 2. Construction of Board Pattern Improper circuit layout and pad/land size may cause excessive or not enough solder amount on the PC board. Not enough solder may create weak joint, and excessive solder may increase the potential of mechanical or thermal cracks on the ceramic capacitor. Therefore we recommend the land size to be as shown in the following table: 2.1 Size and recommend land dimensions for reflow soldering . Capacitor C Slit 0201 0402 0603 0805 1206 1210 1808 1812 1825 2208 2211 2220 2225 E D B Chip (mm) L W 0.60 0.30 1.00 0.50 1.60 0.80 2.00 1.25 3.20 1.60 3.20 2.50 4.60 2.00 4.60 3.20 4.60 6.35 5.70 2.00 5.70 2.80 5.70 5.00 5.70 6.35 EIA Code Land Solder Resist A A 0.2~0.3 0.3~0.5 0.4~0.6 0.7~0.9 2.2~2.4 2.2~2.4 2.8~3.4 2.8~3.4 2.8~3.4 4.0~4.6 4.0~4.6 4.0~4.6 4.0~4.6 B 0.2~0.4 0.3~0.5 0.6~0.7 0.6~0.8 0.8~0.9 1.0~1.2 1.8~2.0 1.8~2.0 1.8~2.0 2.0~2.2 2.0~2.2 2.0~2.2 2.0~2.2 Land (mm) C 0.2~0.4 0.4~0.6 0.6~0.8 0.8~1.1 1.0~1.4 1.8~2.3 1.5~1.8 2.3~3.0 5.1~5.8 1.5~1.8 2.0~2.6 3.5~4.8 5.1~5.8 D ----1.0~2.0 1.0~2.0 1.0~2.8 1.0~2.8 1.0~4.0 1.0~4.0 1.0~4.0 1.0~4.0 1.0~4.0 E ----3.2~3.7 4.1~4.6 3.6~4.1 4.8~5.3 7.1~8.3 3.6~4.1 4.4~4.9 6.6~7.1 7.1~8.3 2.2 Mechanical strength varies according to location of chip capacitors on the P.C. board. Design layout of components on the PC board such a way to minimize the stress imposed on the components, upon flexure of the boards in depanelization or other processes. Component layout close to the edge of the board or the “depanelization line” is not recommended. Susceptibility to stress is in the order of: a>b>c and d>e e b perforation c slit a IHHEC is a trademark of Holy Stone Enterprise Co., Ltd d Page : 10/14 MULTILAYER CERAMIC CHIP CAPACITORS HVC-019-2005 2.3 Layout Recommendation Example Use of Common Solder Land Need to Avoid Solder With Chassis Lead Wire Chip Use of Common Solder Land With Other SMD Chassis Solder Excessive Solder Solder Land Adhesive Solder Land PCB Recommendation Lead Wire Chip α Solder Resist Solder Resist Adhesive PCB β Solder Land α>β 3. Mounting 3.1 Sometimes crack is caused by the impact load due to suction nozzle in pick and place operation. In pick and place operation, if the low dead point is too low, excessive stress is applied to component. This may cause cracks in the ceramic capacitor, therefore it is required to move low dead point of a suction nozzle to the higher level to minimize the board warp age and stress on the components. Nozzle pressure is typically adjusted to 1N to 3N (static load) during the pick and place operation. Excessive Stress Nozzle Warping of Board Warping of Board PCB Crack Support pin 3.2 Amount of Adhesive a b a Example : 0805 & 1206 0.2mm min. a b c c 70 ~ 100 µm Do not touch the solder land c IHHEC is a trademark of Holy Stone Enterprise Co., Ltd Page : 11/14 MULTILAYER CERAMIC CHIP CAPACITORS HVC-019-2005 4. Soldering 4.1. Wave Soldering Most of components are wave soldered with solder at Peak Temperature.. Adequate care must be taken to prevent the potential of thermal cracks on the ceramic capacitors. Refer to the soldering methods below for optimum soldering benefits. Recommend flow soldering temperature Profile Pre-heating Soldering 300 Cooling ℃ Max. Temperature (°C) Peak 260 200 ΔT Soldering Method 1206/0805/0603 Pb-Sn Solder Lead Free Solder ℃ Peak Temp.( ) / Duration (sec) T ≤ 100~150 max. 250 (max.) / 3sec(max.) 260 (max.) / 5sec(max.) Δ ℃ ℃ ℃ Recommended solder compositions Sn-37Pb (Pb - Sn Solder) Sn-3.0Ag-0.5Cu (Lead Free Solder) 120seconds or more 5sec.Max. 60seconds or more To optimize the result of soldering, proper preheating is essential: 1) Preheat temperature is too low a. Flux flows to easily b. Possibility of thermal cracks 2) Preheat temperature is too high a. Flux deteriorates even when oxide film is removed b. Causes warping of circuit board c. Loss of reliability in chip and other components Cooling Condition: Natural cooling using air is recommended. If the chips are dipped into a solvent for cleaning, the temperature difference ( ΔT) between the solvent and the chips must be less than 100°C. 4.2 Reflow Soldering Preheat and gradual increase in temperature to the reflow temperature is recommended to decrease the potential of thermal crack on the components. The recommended heating rate depends on the size of component, however it should not exceed 3°C/Sec. Recommend reflow profile for Lead-Free soldering temperature Profile (J-STD-020D) Soldering Cooling Pre-heating 260°C max./10sec. Min. 260max. Temperature (°C) 217 ΔT 150°C /60sec. Min. ※ The cycles of soldering : Twice (max.) Soldering Method 1206 and Under 1210 and Over Change in Temp.( T 190 T 130 Δ ≦ Δ ≦ ℃ ℃ ℃) 60 to 150 sec. IHHEC is a trademark of Holy Stone Enterprise Co., Ltd Page : 12/14 MULTILAYER CERAMIC CHIP CAPACITORS HVC-019-2005 4.3 Hand Soldering Sudden temperature change in components, results in a temperature gradient recommended in the following table, and therefore may cause internal thermal cracks in the components. In general a hand soldering method is not recommended unless proper preheating and handling practices have been taken. Care must also be taken not to touch the ceramic body of the capacitor with the tip of solder Iron. 350 Soldering Method 1206 and Under 1210 and Over 250 Temperature (°C) 200 Change in Temp.( T 150 T 130 Δ ≦ Δ ≦ ΔT ℃ ℃ ℃) Within 5 seconds. How to Solder Repair by Solder Iron 1) Selection of the soldering iron tip The required temperature of solder iron for any type of repair depends on the type of the tip, the substrate material, and the solder land size. 2) recommended solder iron condition a.) Preheating Condition Board and components should be preheated sufficiently at 150°C or over, and soldering should be conducted with soldering iron as boards and components are maintained at sufficient temperatures. b.) Soldering iron power shall not exceed 30 W. c.) Soldering iron tip diameter shall not exceed 3mm. d.) Temperature of iron tip shall not exceed 350°C., and the process should be finished within 5 seconds. ( refer to MIL-STD-202G) f.) Do not touch the ceramic body with the tip of solder iron. Direct contact of the soldering iron tip to ceramic body may cause thermal cracks. g.) After soldering operation, let the products cool down gradually in the room temperature. ： 5. Handling after chip mounted 5.1 Proper handling is recommended, since excessive bending and twist of the board, depends on the orientation of the chip on the board, may induce mechanical stress and cause internal crack in the capacitor. Higher potential of crack Lower potential of crack Bending → Twist 5.2 There is a potential of crack if board is warped due to excessive load by check pin ○ ╳ Check pin IHHEC is a trademark of Holy Stone Enterprise Co., Ltd Support Pin Check pin Page : 13/14 MULTILAYER CERAMIC CHIP CAPACITORS HVC-019-2005 5.3 Mechanical stress due to warping and torsion. (a) Crack occurrence ratio will be increased by manual separation. (b) Crack occurrence ratio will be increased by tensile force , rather than compressive force. ○ :Compressive Stress ╳ :Tensile Stresss Crack 6.. Handling of Loose Chip Capacitor 6.1 If dropped the chip capacitor may crack. Crack Floor 6.2 In piling and stacking of the P.C. boards after mounting for storage or handling, the corner of the P.C. board may hit the chip capacitor mounted on another board to cause crack. PCB Crack 7. Safekeeping condition and period For safekeeping of the products, we recommend to keep the storage temperature between +5 to +40°C and under humidity of 20 to 70% RH. The he shelf life of capacitors is 12 months. IHHEC is a trademark of Holy Sto Stone Enterprise Co., Ltd Page : 14/14