MSA-0500

Cascadable Silicon Bipolar MMIC Amplifier Technical Data MSA-0500 Features • Cascadable 50 Ω Gain Block • High Output Power: +23 dBm Typical P1 dB at 1.0 GHz • Low Distortion: 33 dBm Typical IP 3 at 1.0 GHz • 8.5 dB Typical Gain at 1.0 GHz The MSA-series is fabricated using HP’s 10 GHz fT, 25 GHz f MAX, silicon bipolar MMIC process which uses nitride self-alignment, ion implantation, and gold metallization to achieve excellent performance, uniformity and reliability. The use of an external bias resistor for temperature and current stability also allows bias flexibility. The recommended assembly procedure is gold-eutectic die attach at 400°C and either wedge or ball bonding using 0.7 mil gold wire. This chip is intended to be used with an external blocking capacitor completing the shunt feedback path (closed loop). Data sheet characterization is given for a Chip Outline[1] 3 5 2 1 2 The MSA-0500 is a high performance, medium power silicon bipolar Monolithic Microwave Integrated Circuit (MMIC) chip. This MMIC is designed for use as a general purpose 50 Ω gain block. Typical applications include narrow and broad band IF and RF amplifiers in industrial and military systems. 4 45 pF capacitor. Low frequency performance can be extended by using a larger valued capacitor.[1] Note: 1. See Application Note, AN-S009: “Silicon MMIC Chip Use” for additional information. Typical Biasing Configuration R bias (Required) C Fbl VCC > 15 V RFC (Optional) 4 C block 3 IN 1 MSA C block OUT Vd = 12 V 2 5965-9579E 6-346 AK Description MSA-0500 Absolute Maximum Ratings Parameter Device Current Power Dissipation[2,3] RF Input Power Junction Temperature Storage Temperature Absolute Maximum[1] 225 mA 3.0 W +25 dBm 200°C –65 to 200°C Thermal Resistance[2,4]: θjc = 20°C/W Notes: 1. Permanent damage may occur if any of these limits are exceeded. 2. TMounting Surface (TMS) = 25°C. 3. Derate at 50 mW/°C for TMS > 140 °C. 4. The small spot size of this technique results in a higher, though more accurate determination of θjc than do alternate methods. Electrical Specifications[1], TA = 25°C Unless otherwise noted, performance is for a MSA-0500 used with an external 45 pF capacitor. See bonding diagram. Symbol P1 dB GP ∆G P f3 dB VSWR IP3 NF tD Vd dV/dT Parameters and Test Conditions[2]: Id = 165 mA, ZO = 50 Ω Output Power at 1 dB Gain Compression Power Gain (|S21| 2) Gain Flatness 3 dB Bandwidth3 f = 0.1 to 2.0 GHz f = 0.1 to 2.0 GHz f = 1.0 GHz f = 1.0 GHz f = 1.0 GHz Input VSWR Output VSWR Third Order Intercept Point 50 Ω Noise Figure Group Delay Device Voltage Device Voltage Temperature Coefficient f = 1.0 GHz f = 0.1 GHz f = 0.1 to 2.0 GHz Units dBm dB dB GHz Min. Typ. 23.0 9.0 ± 0.75 2.8 2.0:1 2.5:1 Max. dBm dB psec V mV/°C 10.5 33.0 6.5 125 12.0 –16.0 13.5 Notes: 1. The recommended operating current range for this device is 80 to 200 mA. Typical performance as a function of current is on the following page. 2. RF performance of the chip is determined by packaging and testing 10 devices per wafer in a dual ground configuration. 3. Referenced from 0.1 GHz gain (G p). Bonding Diagram Input Trace 5 MSA Die 2 1 4 Capacitor (45 pF typ) Numbers refer to pin contacts listed on the Chip Outline. Part Number Ordering Information Ground Output Trace A05 Part Number MSA-0500-GP4 Devices Per Tray 100 3 (backside contact) Ground 6-347 MSA-0500 Typical Scattering Parameters[1,2] (TA = 25°C, Id = 165 mA) Freq. GHz S11 Mag Ang dB S21 Mag Ang dB S12 Mag Ang Mag S22 Ang k 0.001 0.005 0.010 0.050 0.100 0.200 0.400 0.600 0.800 1.00 1.50 2.00 2.50 3.00 3.50 4.00 Notes: .68 .57 .43 .16 .12 .12 .13 .16 .21 .25 .36 .45 .51 .52 .51 .46 –8 –38 –65 –111 –134 –141 –133 –124 –118 –115 –113 –120 –125 –134 –144 –157 15.6 14.6 12.8 9.8 9.3 9.1 9.1 9.1 9.0 9.0 8.8 8.2 7.3 6.0 4.8 3.7 6.05 5.37 4.38 3.08 2.90 2.86 2.84 2.84 2.83 2.83 2.75 2.58 2.32 2.00 1.75 1.53 176 186 158 164 169 168 162 155 148 139 118 96 83 66 52 39 –26.2 –19.3 –15.7 –14.2 –14.0 –13.9 –13.8 –13.7 –13.6 –13.4 –12.7 –11.6 –11.0 –10.5 –9.6 –9.2 .149 .108 .165 .194 .200 .202 .204 .207 .210 .213 .232 .262 .281 .297 .329 .347 25 38 30 10 4 4 4 4 5 6 9 12 17 18 20 21 .79 .67 .50 .19 .13 .12 .17 .22 .28 .34 .44 .66 .58 .58 .58 .54 –7 –35 –61 –101 –117 –125 –116 –109 –108 –106 –107 –111 –109 –109 –106 –104 0.92 0.56 0.64 1.06 1.11 1.13 1.10 1.05 0.99 0.91 0.72 0.39 0.43 .46 0.49 0.60 1. S-parameters are de-embedded from 200 mil BeO package measured data using the package model found in the DEVICE MODELS section. 2. S-parameter data assumes an external 45 pF capacitor. Low frequency performance can be extended using a larger valued capacitor. Typical Performance, TA = 25°C (unless otherwise noted) 10 36 IP3 (dBm) 28 26 P1 dB (dBm) 24 22 20 18 16 –50 0.5 GHz 8 GAIN (dB) 0.1 GHz 32 IP3 6 2.0 GHz 0.5 GHz 1.5 GHz 1.0 GHz 28 1.0 GHz 4 24 P1dB (dBm) P1dB 20 2 2.0 GHz 0 14 16 18 20 22 24 26 28 30 POWER OUT (dBm) 16 80 120 160 I d (mA) 200 +25 +100 CASE TEMPERATURE (°C) Figure 1. Typical Gain vs. Power Out, TA = 25°C, Id = 165 mA. 20 Figure 2. Output Power @ 1 dB Gain Compression, Third Order Intercept Point, f = 1.0 GHz. Figure 3. Output Power @ 1 dB Gain Compression vs. Temperature, Id = 165 mA. 16 G p (dB) 12 8 Closed Loop 4 Open Loop 0 0.1 0.2 0.3 0.5 1.0 2.0 4.0 FREQUENCY (GHz) Figure 4. Gain vs. Frequency. 6-348 MSA-0500 Chip Dimensions[1] 3 5 2 1 570 µm 22.4 mil 2 4 530 µm 20.8 mil Unless otherwise specified, tolerances are ±13 µm/ ±0.5 mils. Chip thickness is 114 µm/4.5 mil. Bond Pads are 41 µm/1.6 mil typical on each side. Note 1: Output contact is made by die attaching the backside of the die. AK 6-349