2178527-2

4 1 RELEASED FOR PUBLICATION THIS DRAWING IS UNPUBLISHED. C 2 3 LOC COPYRIGHT D REVISIONS DIST ALL RIGHTS RESERVED. P LTR DESCRIPTION DATE DWN APVD D PCB-LAYOUT 2.54 Leiterplatten-Layout A (10.6) 9.3 0.2 A C C B A PLATED THROGH HOLE SPECIFICATION Spezifikation fuer durchplatierte Bohrungen (2.9) 1+0.05 -0.10 B B 25-50 µm Sn THICKNESS Zinnschichtdicke DRILLED HOLE 1.150.025 Bohrloch1.150.025 PCB 4-15 µm +0.15 FINISHED HOLE 0.94 +0.15 platierter Loch0.94 (1.6) 3.6 0.2 Cu THICKNESS Kupferschichtdicke 0.08 B 5 0.08 A PACKAGING QUANTITY: 45K PCS PER REEL +0.1 (1.7-0.3) B B-B A-A 20:1 0.63-0.03 20:1 DIRECTION OFF TOP OF REEL B 0.63-0.03 1.24 0.08 DWN THIS DRAWING IS A CONTROLLED DOCUMENT. TE Connectivity CHK A DIMENSIONS: 1471-9 (3/11) 2178527-2 CuNiSi PART NO. MATERIAL MATERIAL SURFACE REELPACKING TOLERANCES UNLESS OTHERWISE SPECIFIED: 0 PLC 1 PLC 2 PLC 3 PLC 4 PLC ANGLES FINISH APVD A NAME PRODUCT SPEC APPLICATION SPEC SIZE WEIGHT A2 RESTRICTED TO CAGE CODE DRAWING NO SCALE SHEET OF REV