GM71C17400CLT-5

GM71C(S)17400C/CL 4,194,304 WORDS x 4 BIT CMOS DYNAMIC RAM Description T he GM71C(S)17400C/CL is the new generation dynamic RAM organized 4,194,304 words x 4 bit. GM71C(S)17400C/CL has realized higher density, higher performance and various functions by utilizing advanced CMOS process technology. The GM71C(S)17400C/CL offers Fast Page Mode as a high speed access mode. Multiplexed address inputs permit the GM71C(S)17400C/CL to be packaged in a standard 300 mil 24(26) pin SOJ, and a standard 300 mil 24(26) pin plastic TSOP II. The package size provides high system bit densities and is compatible with widely available automated testing and insertion equipment. System oriented features include single power supply 5.0V+/-10% tolerance, direct interfacing capability with high performance logic families such as Schottky TTL. Features * 4,194,304 Words x 4 Bit Organization * Fast Page Mode Capability * Single Power Supply (5.0V+/-10%) * Fast Access Time & Cycle Time (Unit: ns) tRAC tCAC tRC GM71C(S)17400C/CL-5 GM71C(S)17400C/CL-6 GM71C(S)17400C/CL-7 50 60 70 13 15 18 90 110 130 tPC 35 40 45 Pin Configuration 24(26) SOJ VCC I/O1 I/O2 WE RAS NC A10 A0 A1 A2 A3 1 2 3 4 5 6 26 25 24 23 22 21 * Low Power Active : 660/605/550mW (MAX) Standby : 11mW (CMOS level : MAX) : 0.83mW (L-version : MAX) * RAS Only Refresh, CAS before RAS Refresh, Hidden Refresh Capability * All inputs and outputs TTL Compatible * 2048 Refresh Cycles/32ms * 2048 Refresh Cycles/128ms (L-version) * Battery backup operation (L-version) * Test function : 16bit parallel test mode 24(26) TSOP II VSS I/O4 I/O3 CAS OE A9 A8 A7 A6 A5 A4 VSS VCC I/O1 I/O2 WE RAS A11 A10 A0 A1 A2 A3 1 2 3 4 5 6 26 25 24 23 22 21 VSS I/O4 I/O3 CAS OE A9 A8 A7 A6 A5 A4 VSS 8 9 10 11 12 19 18 17 16 15 14 8 9 10 11 12 19 18 17 16 15 14 VCC 13 VCC 13 (Top View) Rev 0.1 / Apr’01 GM71C(S)17400C/CL Pin Description Pin A0-A10 A0-A10 I/O1-I/O4 RAS CAS Function Address Inputs Refresh Address Inputs Data Input/Data Output Row Address Strobe Column Address Strobe Pin WE OE VCC VSS NC Function Read/Write Enable Output Enable Power (5.0V) Ground No Connection Ordering Information Type No. GM71C(S)17400CJ/CLJ-5 GM71C(S)17400CJ/CLJ-6 GM71C(S)17400CJ/CLJ-7 GM71C(S)17400CT/CLT-5 GM71C(S)17400CT/CLT-6 GM71C(S)17400CT/CLT-7 Access Time 50ns 60ns 70ns 50ns 60ns 70ns Package 300 Mil 24(26) Pin Plastic SOJ 300 Mil 24(26) Pin Plastic TSOP II Absolute Maximum Ratings* Symbol TA TSTG VIN/VOUT VCC IOUT PD Parameter Ambient Temperature under Bias Storage Temperature (Plastic) Voltage on any Pin Relative to VSS Voltage on VCC Relative to VSS Short Circuit Output Current Power Dissipation Rating 0 ~ 70 -55 ~ 125 -1.0 ~ 7.0 -1.0 ~ 7.0 50 1.0 Unit C C V V mA W *Note: Operation at or above Absolute Maximum Ratings can adversely affect device reliability. Recommended DC Operating Conditions (TA = 0 ~ 70C) Symbol VCC VIH VIL Parameter Supply Voltage Input High Voltage Input Low Voltage Min 4.5 2.4 -1.0 Typ 5.0 - Max 5.5 6.0 0.8 Unit V V V Note: All voltage referred to Vss. Rev 0.1 / Apr’01 GM71C(S)17400C/CL DC Electrical Characteristics (VCC = 5.0V+/-10%, Vss = 0V, TA = 0 ~ 70C) Symbol VOH VOL ICC1 Parameter Output Level Output "H" Level Voltage (IOUT = -5mA) Output Level Output "L" Level Voltage (IOUT = 4.2mA) Operating Current Average Power Supply Operating Current (RAS, CAS Cycling : tRC = tRC min) Standby Current (TTL) Power Supply Standby Current (RAS, CAS = VIH, DOUT = High-Z) RAS Only Refresh Current Average Power Supply Current RAS Only Refresh Mode (tRC = tRC min) Fast Page Mode Current Average Power Supply Current Fast Page Mode (tPC = tPC min) Standby Current (CMOS) Power Supply Standby Current (RAS, CAS >= VCC - 0.2V, DOUT = High-Z) CAS-before-RAS Refresh Current (tRC = tRC min) 50ns 60ns 70ns ICC7 Battery Backup Operating Current(Standby with CBR Refresh) (CBR refresh, tRC=62.5us, tRAS= t CWD (min), tAWD >= tAWD(min) and tCPW>=tCPW(min), the cycle is a read-modify-write and the data output will contain data read from the selected cell; if neither of the above sets of conditions is satisfied, the condition of the data out (at access time) is indeterminate. 15. These parameters are referenced to CAS leading edge in early write cycles and to WE leading edge in delayed write or read-modify-write cycles. 16. tRASP defines RAS pulse width in Fast page mode cycles. 17. Access time is determined by the longest among tAA or tCAC or tACP. Rev 0.1 / Apr’01 GM71C(S)17400C/CL 18. In delayed write or read-modify-write cycles, OE must disable output buffer prior to applying data to the device. After RAS is reset, if tOEH>=tCWL, the I/O pin will remain open circuit (high impedance); if tOEH < tCWL, invalid data will be out at each I/O. 19. The 16M DRAM offers a 16-bit time saving parallel test mode. Address CA0 and CA1 for the 4M x 4 are don't care during test mode. Test mode is set by performing a WE-and-CAS-beforeRAS (WCBR) cycle. In 16-bit parallel test mode, data is written into 4 bits in parallel at each I/O (I/O1 to I/O4) and read out from each I/O. If 4 bits of each I/O are equal (all 1s or 0s), data output pin is a high state during test mode read cycle, then the device has passed. If they are not equal, data output pin is a low state, then the device has failed. Refresh during test mode operation can be performed by normal read cycles or by WCBR refresh cycles. To get out of test mode and enter a normal operation mode, perform either a regular CAS-before-RAS refresh cycle or RAS-only refresh cycle. 20. In a test mode read cycle, the value of tRAC, tAA, tCAC and tACP is delayed by 2ns to 5ns for the specified value. These parameters should be specified in test mode cycles by adding the above value to the specified value in this data sheet. Rev 0.1 / Apr’01 GM71C(S)17400C/CL Package Dimension 24(26) SOJ 0.025(0.64) MIN 0.295(7.49) MIN 0.305(7.75) MAX 0.329(8.38) MIN 0.340(8.64) MAX Unit: Inches (mm) 0.661(16.80) MIN 0.669(17.00) MAX 0.085(2.16) MIN 0.128(3.25) MIN 0.147(3.75) MAX 0.050(1.27) TYP 0.015(0.38) MIN 0.020(0.50) MAX 0.026(0.66) MIN 0.032(0.81) MAX 24(26) TSOP (TYPE II) 0~5 o 0.016(0.40) MIN 0.024(0.60) MAX 0.296(7.52) MIN 0.303(7.72) MAX 0.670(17.04) MIN 0.678(17.24) MAX 0.037(0.95) MIN 0.041(1.05) MAX 0.047(1.20) MAX 0.012(0.30) MIN 0.020(0.50) MAX 0.050(1.27) TYP 0.003(0.08) MIN 0.007(0.18) MAX 0.355(9.02) MIN 0.371(9.42) MAX 0.004(0.12) MIN 0.008(0.21) MAX Rev 0.1 / Apr’01 0.275(6.99) MAX 0.260(6.60) MIN