IS61LV6424-10TQ

IS61LV6424 64K x 24 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY FEATURES • High-speed access time: 9, 10, 12, 15 ns • CMOS low power operation — 594 mW (max.) operating @ 9 ns — 36 mW (max.) CMOS standby • TTL compatible interface levels • Single 3.3V power supply • Fully static operation: no clock or refresh required • Three state outputs • Available in 100-pin LQFP DESCRIPTION The ICSI IS61LV6424 is a high-speed, static RAM organized as 65,536 words by 24 bits. It is fabricated using ICSI's highperformance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 9 ns with low power consumption. When CE1 is HIGH and CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE1, CE2, and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS61LV6424 is packaged in the JEDEC standard 100-pin 14*20*1.4mm LQFP. FUNCTIONAL BLOCK DIAGRAM VCC GND 64K x 24 MEMORY ARRAY A0-A14 ROW DECODER A15 X/Y V/S MULTIPLEX ADDRESS CONTROL COLUMN DECODER CE1 CE2 OE WE CONTROL CIRCUIT I/O DATA CIRCUIT I/O0-I/O23 ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc. Integrated Circuit Solution Inc. AHSR012-0D S2-95 IS61LV6424 PIN CONFIGURATION 100-Pin LQFP A14 A15 CE1 CE2 NC NC NC X/Y V/S VCC GND NC WE NC OE NC NC NC A0 A1 NC NC NC NC NC I/O12 I/O13 I/O14 I/O15 GNDQ VCCQ I/O16 I/O17 NC VCC NC GND I/O18 I/O19 VCCQ GNDQ I/O20 I/O21 I/O22 I/O23 NC NC NC NC NC 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 1 79 2 78 3 77 4 76 5 75 6 74 7 73 8 72 9 71 10 70 11 69 12 68 13 67 14 66 15 65 16 64 17 63 18 62 19 61 20 60 21 59 22 58 23 57 24 56 25 55 26 54 27 53 28 52 29 51 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 NC A13 A12 A11 A10 A9 A8 NC NC GND VCC NC NC A7 A6 A5 A4 A3 A2 NC NC NC NC NC NC I/O11 I/O10 I/O9 I/O8 GNDQ VCCQ I/O7 I/O6 GND NC VCC NC I/O5 I/O4 VCCQ GNDQ I/O3 I/O2 I/O1 I/O0 NC NC NC NC NC PIN DESCRIPTIONS A0-A14 A15, X/Y CE1, CE2 OE WE V/S NC Vcc VCCQ GND GNDQ Address Inputs Multiplexed Address Chip Enable Input Output Enable Input Write Enable Input Address Multiplexer No Connection Power Isolated Output Buffer Supply Ground solated Output Buffer Ground I/O0-I/O23 Data Inputs/Outputs S2-96 Integrated Circuit Solution Inc. AHSR012-0D IS61LV6424 TRUTH TABLE Mode Not Selected Read Using X/Y Read Using A15 Write Using X/Y Write Using A15 Output Disable CE1 H X L L L L L CE2 X H H H H H H OE X X L L X X H WE X X H H L L H V/S X X H L H L X I/O0-I/O23 High-Z High-Z DOUT DOUT DIN DIN High-Z Vcc Current ISB1, ISB2 ICC ICC ICC ICC ICC 1 2 3 4 5 6 7 8 9 ABSOLUTE MAXIMUM RATINGS(1) Symbol VCC VTERM TSTG TBIAS PT IOUT Parameter Power Supply Voltage Relative to GND Terminal Voltage with Respect to GND Storage Temperature Temperature Under Bias: Com. Ind. Power Dissipation DC Output Current Value –0.5 to 5.0 –0.5 to Vcc + 0.5 –65 to + 150 –10 to + 85 –45 to + 90 2.0 ±20 Unit V V °C °C °C W mA Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. OPERATING RANGE Range Commercial Industrial Ambient Temperature 0°C to +70°C –40°C to +85°C VCC (9, 10 ns) 3.3V + 10%, – 5% 3.3V + 10%, – 5% VCC (12, 15 ns) 3.3V ± 10% 3.3V ± 10% DC ELECTRICAL CHARACTERISTICS (Over Operating Range) Symbol VOH VOL VIH VIL ILI ILO Parameter Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage(1) GND ≤ VIN ≤ VCC GND ≤ VOUT ≤ VCC, Outputs Disabled Input Leakage Output Leakage Test Conditions VCC = Min., IOH = –4.0 mA VCC = Min., IOL = 8.0 mA Min. 2.4 — 2.2 –0.3 –1 –1 Max. — 0.4 VCC + 0.3 0.8 1 1 Unit V V V V µA µA 10 11 12 Note: 1. VIL (min.) = –0.3V DC; VIL (min.) = –2.0V AC (pulse width ≤ 2.0 ns). VIH (max.) = VCC + 0.3V DC; VIH (max.) = VCC + 2.0V AC (pulse width ≤ 2.0 ns). Integrated Circuit Solution Inc. AHSR012-0D S2-97 IS61LV6424 POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range) -9 ns Symbol Parameter ICC ISB1 Test Conditions Com. Ind. Com. Ind. Min. Max. -10ns Min. Max. -12 ns Min. Max. -15 ns Min. Max. Unit mA mA Vcc Dynamic Operating VCC = Max., Supply Current IOUT = 0 mA, f = fMAX TTL Standby Current (TTL Inputs) CMOS Standby Current (CMOS Inputs) VCC = Max., VIN = VIH or VIL, f = max. CE1 > VIH, CE2 < VIL — — — — — — 165 170 40 45 10 15 — — — — — — 150 155 40 45 10 15 — — — — — — 125 130 35 40 10 15 — — — — — — 100 105 30 25 10 15 ISB2 VCC = Max., Com. CE1 > VCC – 0.2V, Ind. CE2 < 0.2V, VIN > VCC – 0.2V, or VIN < 0.2V, f = 0 mA Note: 1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change. CAPACITANCE(1) Symbol CIN COUT Parameter Input Capacitance Input/Output Capacitance Conditions VIN = 0V VOUT = 0V Max. 6 8 Unit pF pF Note: 1. Tested initially and after any design or process changes that may affect these parameters. AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load Unit 0V to 3.0V 2 ns 1.5V See Figures 1 and 2 AC TEST LOADS ZO = 50Ω OUTPUT 50Ω OUTPUT 5 pF Including jig and scope 353 Ω 319 Ω 3.3V 1.5V Figure 1 Figure 2 S2-98 Integrated Circuit Solution Inc. AHSR012-0D IS61LV6424 READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range) Symbol Parameter Read Cycle Time Address Access Time V/S Access Time Output Hold Time From MUX Change Output Hold Time From Address Change CE1Access Time CE2 Access Time OE Access Time (2) 9 Min. Max. 9 — — 3 3 — — 0 0 0 3 — 9 9 — — 9 5 3 — 5 — Min. 10 — — 3 3 — — 0 0 0 3 -10 Max. — 10 10 — — 10 5 3 — 5 — -12 Min. 12 — — 3 3 — — 0 0 0 3 Max. — 12 12 — — 12 6 3 — 6 — -15 Min. Max. 15 — — 3 3 — — 0 0 0 3 — 15 15 — — 15 7 3 — 7 — Unit ns ns ns ns ns ns ns ns ns ns ns 1 2 3 4 5 6 7 8 9 10 11 12 tRC tAA tAV tOH tOHA tACE tACE2 tDOE tLZOE tHZOE(2) OE to High-Z Output OE to Low-Z Output tHZCE(2) CE1 to High-Z Output tHZCE2(2) CE2 to High-Z Output tLZCE(2) CE to Low-Z Output tLZCE2(2) CE2 to Low-Z Output Notes: 1. Test conditions assume signal transition times of 2 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100% tested. Integrated Circuit Solution Inc. AHSR012-0D S2-99 IS61LV6424 AC WAVEFORMS READ CYCLE NO. 1(1,2) (Address Controlled) (CE1= OE = VIL; CE2 = VIH) t RC ADDRESS t AV t OH V/S t OHA DOUT PREVIOUS DATA VALID t AA t OHA DATA VALID READ CYCLE NO. 2(1,3) t RC ADDRESS t AA OE t OHA t DOE CE1 t HZOE t LZOE CE2 t AV V/S t LZCE1 t LZCE2 DOUT HIGH-Z t ACE1 t ACE2 DATA VALID t HZCE1 t HZCE2 Notes: 1. WE is HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE1= VIL. CE2 = VIH. 3. Address is valid prior to or coincident with CE1 LOW and CE2 HIGH transition. S2-100 Integrated Circuit Solution Inc. AHSR012-0D IS61LV6424 WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range) Symbol Parameter 9 Min. Max. 9 7 7 7 0 0 0 9 5 7 0 — 3 — — — — — — — — — — — — 4 — Min. 10 7 7 7 0 0 0 7 10 5 7 0 — 3 -10 Max. — — — — — — — — — — — — 5 — -12 Min. 12 8 8 8 0 0 0 8 12 6 8 0 — 3 Max. — — — — — — — — — — — — 6 — -15 Min. Max. 15 10 10 10 0 0 0 10 15 7 10 0 — 3 — — — — — — — — — — — — 7 — Unit ns ns ns ns ns ns ns ns ns ns ns ns ns tWC tSCE tSCE2 tAW tHA tSA tVS tPWE1 tPWE2 tSD tVW tHD tHZWE (2) Write Cycle Time CE1 to Write End CE2 to Write End Address Setup Time to Write End Address Hold from Write End Address Setup Time V/S Setup Time WE Pulse Width (OE = LOW) Data Setup to Write End V/S to Write End Data Hold from Write End WE LOW to High-Z Output 1 2 3 4 5 6 7 8 9 10 11 12 WE Pulse Width (OE = HIGH) 7 tLZWE(2) WE HIGH to Low-Z Output Notes: 1. Test conditions assume signal transition times of 2 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100% tested. 3. The internal write time is defined by the overlap of CE1, LOW, CE2 HIGH and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the write. Integrated Circuit Solution Inc. AHSR012-0D S2-101 IS61LV6424 WRITE CYCLE NO. 1 (CE Controlled, OE = HIGH or LOW) t WC ADDRESS VALID ADDRESS t SA CE1 t SCE1 t SCE2 t HA CE2 t VS V/S t VW WE t AW t PWE1 t PWE2 t HZWE t LZWE HIGH-Z DOUT DATA UNDEFINED t SD DIN t HD DATAIN VALID WRITE CYCLE NO. 2(1) (WE Controlled: OE = HIGH during Write Cycle) t WC ADDRESS VALID ADDRESS t HA OE CE1 CE2 LOW HIGH t VW V/S t VS t AW t PWE1 WE t SA DOUT DATA UNDEFINED t HZWE HIGH-Z t LZWE t SD DIN t HD DATAIN VALID S2-102 Integrated Circuit Solution Inc. AHSR012-0D IS61LV6424 WRITE CYCLE NO. 3(1) (WE Controlled: OE I S LOW DURING WRITE CYLE) t WC ADDRESS VALID ADDRESS 1 t HA OE CE1 CE2 V/S LOW LOW HIGH 2 t VW 3 t PWE2 t AW WE 4 t LZWE t SA DOUT DATA UNDEFINED t HZWE HIGH-Z 5 t HD DATAIN VALID t SD DIN 6 7 8 9 10 11 12 Note: 1. The internal Write time is defined by the overlap of CE1 = LOW, CE2 = HIGH and WE = LOW. All signals must be in valid states to initiate a Write, but any can be deasserted to terminate the Write. The Data Input Setup and Hold timing is referenced to the rising or falling edge of the signal that terminates the Write. Integrated Circuit Solution Inc. AHSR012-0D S2-103 IS61LV6424 ORDERING INFORMATION Commercial Range: 0°C to +70°C Speed (ns) Order Part No. 9 10 12 15 IS61LV6424-9TQ IS61LV6424-10TQ IS61LV6424-12TQ IS61LV6424-15TQ Package 14*20*1.4mm LQFP 14*20*1.4mm LQFP 14*20*1.4mm LQFP 14*20*1.4mm LQFP Integrated Circuit Solution Inc. HEADQUARTER: NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU, TAIWAN, R.O.C. TEL: 886-3-5780333 Fax: 886-3-5783000 BRANCH OFFICE: 7F, NO. 106, SEC. 1, HSIN-TAI 5TH ROAD, HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C. TEL: 886-2-26962140 FAX: 886-2-26962252 http://www.icsi.com.tw S2-104 Integrated Circuit Solution Inc. AHSR012-0D