49FCT20805QGPYGI

IDT49FCT20805 2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE 2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER IDT49FCT20805 • • • • • • • • • • • • FEATURES: DESCRIPTION: Advanced CMOS Technology Guaranteed low skew < 200ps (max.) Very low propagation delay < 2.5ns (max) Very low duty cycle distortion < 270ps (max) Very low CMOS power levels Operating frequency up to 166MHz TTL compatible inputs and outputs Two independent output banks with 3-state control 1:5 fanout per bank "Heartbeat" monitor output VCC = 2.5V ± 0.2V Available in SSOP, QSOP, and VFQFPN packages The FCT20805 is a 2.5 volt clock driver built using advanced CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs and complies with the output specifications in this document. The FCT20805 offers low capacitance inputs. The FCT20805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT20805 also allows single point-to-point transmission line driving in applications such as address distribution, where one signal must be distributed to multiple recievers with low skew and high signal quality. FUNCTIONAL BLOCK DIAGRAM OEA INA 5 OA1 - OA5 INB OEB 5 OB1 - OB5 MON INDUSTRIAL TEMPERATURE RANGE 1 c 2007 Integrated Device Technology, Inc. The IDT logo is a registered trademark of Integrated Device Technology, Inc. MAY 2010 DSC-6172/113 IDT49FCT20805 2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE PIN CONFIGURATIONS VCCA VCCB OB1 OA1 OB2 VCCA OA1 OA2 OA3 GNDA OA4 OA5 GNDQ OEA INA 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCCB OB1 OB2 OB3 GNDB OB4 OB5 MON OEB 20 19 OA2 OA3 GNDA OA4 OA5 1 2 3 4 5 6 7 18 17 16 15 14 13 12 11 OB3 GNDB OB4 OB5 MON 8 9 10 GNDQ OEA INB SSOP/ QSOP TOP VIEW VFQFPN TOP VIEW ABSOLUTE MAXIMUM RATINGS(1) Symbol VCC VI VO TJ TSTG Description Input Power Supply Voltage Input Voltage Output Voltage Junction Temperature Storage Temperature Max –0.5 to +4.6 –0.5 to +5.5 –0.5 to VCC+0.5 150 –65 to +165 Unit V V V °C °C PIN DESCRIPTION Pin Names OEA, OEB INA, INB OAn, OBn MON Clock Inputs Clock Outputs Monitor Output Description 3-State Output Enable Inputs (Active LOW) NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. FUNCTION TABLE (1) Inputs OEA, OEB L L H H INA, INB L H L H OAn, OBn L H Z Z Outputs MON L H L H CAPACITANCE (TA = +25 C, f = 1.0MHz) O Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3 — Max. 4 6 Unit pF pF NOTE: 1. H = HIGH L = LOW Z = High-Impedance NOTE: 1. This parameter is measured at characterization but not tested. 2 OEB INA INB IDT49FCT20805 2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified Industrial: TA = -40°C to +85°C, VCC = 2.5V ± 0.2V Symbol VIH VIL IIH IIL IOZH IOZL VIK IODH IODL IOS VOH VOL Parameter Input HIGH Level Input LOW Level Input HIGH Current Input LOW Current High Impedance Output Current (3-State Outputs Pins) Clamp Diode Voltage Output HIGH Current Output LOW Current Short Circuit Current Output HIGH Voltage Output LOW Voltage VCC = Min., IIN = –18mA VCC = 2.5V, VIN = VIH or VIL, VO = 1.25V(3,4) VCC = 2.5V, VIN = VIH or VIL, VO = 1.25V(3,4) VCC = Max., VO = VCC = Min. VIN = VIH or VIL VCC = Min. VIN = VIH or VIL GND(3,4) IOH = –8mA IOH = –100µA IOL = 8mA IOL = 100µA VCC = Max. VCC = Max. VCC = Max. VI = 5.5V VI = GND VO = VCC VO = GND Test Conditions(1) Min. 1.7 –0.5 — — — — — –15 25 –30 1.7(5) VCC - 0.2 — — Typ.(2) — — — — — — –0.7 –35 55 –50 — — 0.2 — Max. 5.5 0.7 ±1 ±1 ±1 ±1 –1.2 –90 100 –120 — — 0.4 0.2 V V mA mA mA V µA Unit V V NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 2.5V, 25°C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = Vcc -0.6V at rated current. 3 IDT49FCT20805 2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Symbol ICCL ICCH ICCZ ∆ICC ICCD Parameter Quiescent Power Supply Current Test Conditions(1) VCC = Max. VIN = GND or VCC VCC = Max. VIN = VCC –0.6V VCC = Max. CL = 15pF All Outputs Toggling VCC = Max. CL = 15pF All Outputs Toggling fi = 133MHz VCC = Max. CL = 15pF All Outputs Toggling fi = 166MHz VIN = VCC VIN = GND VIN = VCC VIN = GND VIN = VCC –0.6V VIN = GND VIN = VCC VIN = GND VIN = VCC –0.6V VIN = GND Min. — Typ.(2) 0.1 Max. 20 Unit µA Power Supply Current per Input HIGH Dynamic Power Supply Current per Output(3) Total Power Supply Current(4) — — 35 65 250 100 µA µA/MHz IC — — — — 100 100 115 115 125 125 mA 150 150 NOTES: 1. 2. 3. 4. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. Typical values are at VCC = 2.5V, +25°C ambient. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ∆ICC DHNT + ICCD (fONO) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ∆ICC = Power Supply Current for a TTL High Input (VIN = VCC -0.6V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fO = Output Frequency NO = Number of Outputs at fO 4 IDT49FCT20805 2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE(3,4) Symbol tPLH tPHL tR tF tSK(O) tSK(P) tSK(PP) tPZL tPZH tPLZ tPHZ fMAX Parameter Propagation Delay INA to OAn, INB to OBn Output Rise Time (0.8V to 2V) Output Fall Time (2V to 0.8V) Same device output pin to pin skew(5) Pulse skew(6,9) Part to part skew(7) Output Enable Time OEA to OAn, OEB to OBn Output Disable Time OEA to OAn, OEB to OBn Input Frequency — 133 MHz — 5.2 ns Conditions(1) CL = 15pF f ≤ 133MHz — — — — — — 1.5 1.5 270 270 550 5.2 ns ns ps ps ps ns Min.(2) 1 Max. 3 Unit ns Symbol tPLH tPHL tR tF tSK(O) tSK(P) tSK(PP) tPZL tPZH tPLZ tPHZ fMAX Parameter Propagation Delay INA to OAn, INB to OBn Output Rise Time (0.7V to 1.7V) Output Fall Time (1.7V to 0.7V) Same device output pin to pin skew(5) Pulse skew(6,9) Part to part skew(7) Output Enable Time OEA to OAn, OEB to OBn Output Disable Time OEA to OAn, OEB to OBn Input Frequency Conditions(1,8) CL = 15pF 133MHz ≤ f ≤ 166MHz Min.(2) 0.5 — — — — — — — — Max. 2.5 1.25 1.25 200 270 550 5.2 5.2 166 Unit ns ns ns ps ps ps ns ns MHz NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. tPLH and tPHL are production tested. All other parameters guaranteed but not production tested. 4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay limits do not imply skew. 5. Skew measured between all outputs under identical transitions and load conditions. 6. Skew measured is difference between propagation delay times tPHL and tPLH of same outputs under identical load conditions. 7. Part to part skew for all outputs given identical transitions and load conditions at identical VCC levels and temperature. 8. Airflow of 1m/s is recommended for frequencies above 133MHz. 9. This parameter is measured using f = 1MHz. 5 IDT49FCT20805 2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS VCC 4.6V Open GND 500 VIN Pulse Generator RT D.U.T RL VOUT CL 500 Enable and Disable Time Circuit V CC INPUT tPLH1 tPHL1 VIN Pulse Generator RT D.U.T RL VOUT CL OUTPUT 1 tSK(o) OUTPUT 2 tPLH2 tPHL2 tSK(o) 2.5V 1.25V 0V VOH 1.25V VOL VOH 1.25V VOL tSK(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1| CL = 15pF Test Circuit Output Skew - tSK(O) SWITCH POSITION Test Disable Low Enable Low Disable High Enable High Switch 4.6V GND TEST CONDITIONS Symbol CL RT RL t R / tF VCC = 2.5V ±0.2V 15 ZOUT of pulse generator 33 1 (0V to 2.5V or 2.5V to 0V) Unit pF Ω Ω ns DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. tR / tF = Rise/Fall time of the input stimulus from the Pulse Generator. 6 IDT49FCT20805 2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS ENABLE CONTROL INPUT tPZL OUTPUT NORMALLY LOW OUTPUT NORMALLY HIGH SWITCH CLOSED t PZH SWITCH OPEN 1.25V VOL VOL VOH 1.25V 0.3V t PHZ 0.3V VOH t PLZ VOH VOL PACKAGE 2 OUTPUT tPLH2 tPHL2 tSK(PP) tSK(PP) VOH 1.25V VOL DISABLE 2.5V 1.25V 0V PACKAGE 1 OUTPUT INPUT tPLH1 tPHL1 2.5V 1.25V 0V VOH 1.25V VOL tSK(PP) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1| Enable and Disable Times NOTE: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH Part-to-Part Skew - tSK(PP) Part-to-Part Skew is for the same package and speed grade. 2.5V INPUT tPLH tPHL VOH OUTPUT 1.7V 0.7V tR tF 1.25V V OL tSK(P) = |tPLH - tPLH| OUTPUT 1.25V 0V tPLH tPHL INPUT 2.5V 1.25V 0V VOH 1.25V VOL Propagation Delay Pulse Skew 7 IDT49FCT20805 2.5V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION IDT49FCT XXXX Device Type X Package X Process I PY PYG Q QG NDG 20805 -40°C to +85°C (Industrial) Shrink Small Outline IC SSOP - Green Quarter-size Small Outline IC QSOP - Green Very Fine Pitch Quad Flat Pack - Green 2.5V CMOS Dual 1-to-5 Clock Driver CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com 8 for Tech Support: clockhelp@idt.com