501BMLF

DATASHEET LOCO™ PLL CLOCK MULTIPLIER Description The ICS501B LOCOTM is the most cost effective way to generate a high-quality clock output from a lower frequency crystal or clock input. The name LOCO stands for Low Cost Oscillator, as it is designed to replace crystal oscillators in most electronic systems. Using Phase-Locked Loop (PLL) techniques, the device uses a standard fundamental mode, inexpensive crystal to produce output clocks up to 15 MHz. Stored in the chip’s ROM is the ability to generate nine different multiplication factors, allowing one chip to output many common frequencies (see table on page 2). The device also has an output enable pin which tri-states the clock output when the OE pin is taken low. This product is intended for clock generation. It has low output jitter (variation in the output period), but input to output skew and jitter are not defined or guaranteed. For applications which require defined input to output skew, use the ICS570B. ICS501B Features • • • • • • • • • • • • • • • Packaged as 8 pin SOIC or die Pb (lead) free package IDT’s lowest cost PLL clock Zero ppm multiplication error Output clock frequencies up to 15 MHz Extremely low jitter of 25 ps (one sigma) Compatible with popular CPUs Duty cycle of 45/55 up to 20 MHz Nine selectable frequencies Operating voltage of 3.3 V or 5.5 V Tri-state output for board level testing 25 mA drive capability at TTL levels Ideal for oscillator replacement Industrial temperature version available Advanced, low-power CMOS process Block Diagram VDD S1:0 X1/ICLK Crystal or Clock input X2 2 Crystal Oscillator PLL Clock Multiplier Circuitry and ROM CLK Optional crystal capacitors GND OE IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 1 ICS501B REV F 051310 ICS501B LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER Pin Assignment Clock Output Table S1 S0 0 0 M 1 0 M 1 0 M 1 CLK 4X input 5.3125X input 5X input 6.25X input 2X input 3.125X input 6X input 3X input 8X input Minimum Input 0.5 MHz 1 MHz 0.5 MHz 0.5 MHz 1 MHz 1 MHz 0.5MHz 0.5MHz 0.5MHz X1/ I CLK VDD GND S1 1 2 3 4 8 7 6 5 X2 OE S0 CLK 0 0 M M M 1 1 1 8 Pi n ( 150 mi l ) SOI C 0 = connect directly to ground 1 = connect directly to VDD M = leave unconnected (floating) Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 Pin Name XI/ICLK VDD GND S1 CLK S0 OE X2 Pin Type Input Power Power Tri-level Iinput Output Tri-level Input Input Output Pin Description Crystal connection or clock input. Connect to +3.3 V or +5 V. Connect to ground. Select 1 for output clock. Connect to GND or VDD or float. Clock output per table above. Select 0 for output clock. Connect to GND or VDD or float. Output enable. Tri-states CLK output when low. Internal pull-up. Crystal connection. Leave unconnected for clock input. IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 2 ICS501B REV F 051310 ICS501B LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER External Components Decoupling Capacitor As with any high-performance mixed-signal IC, the ICS501B must be isolated from system power supply noise to perform optimally. A decoupling capacitor of 0.01µF must be connected between VDD and the GND. It must be connected close to the ICS501B to minimize lead inductance. No external power supply filtering is required for the ICS501B. parallel resonant, fundamental mode crystal should be used. The device crystal connections should include pads for small capacitors from X1 to ground and from X2 to ground. These capacitors are used to adjust the stray capacitance of the board to match the nominally required crystal load capacitance. Because load capacitance can only be increased in this trimming process, it is important to keep stray capacitance to a minimum by using very short PCB traces (and no vias) between the crystal and device. Crystal capacitors, if needed, must be connected from each of the pins X1 and X2 to ground. The value (in pF) of these crystal caps should equal (CL -12 pF)*2. In this equation, CL= crystal load capacitance in pF. Example: For a crystal with a 16 pF load capacitance, each crystal capacitor would be 8 pF [(16-12) x 2] = 8. Series Termination Resistor A 33Ω terminating resistor can be used next to the CLK pin for trace lengths over one inch. Crystal Load Capacitors The total on-chip capacitance is approximately 12 pF. A Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS501B. These ratings, which are standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Soldering Temperature 7V Rating -0.5 V to VDD+0.5 V -40 to +85° C -65 to +150° C 260° C Recommended Operation Conditions Parameter Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Min. 0 +3.14 Typ. Max. +70 +5.25 Units °C V IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 3 ICS501B REV F 051310 ICS501B LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER DC Electrical Characteristics VDD=5.0 V ±5% , Ambient temperature 0 to +70° C, unless stated otherwise Parameter Operating Voltage Input High Voltage, ICLK only Input Low Voltage, ICLK only Input High Voltage Input Low Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage IDD Operating Supply Current Short Circuit Current On-Chip Pull-up Resistor Input Capacitance, S1, S0, and OE Nominal Output Impedance Symbol VDD VIH VIL VIH VIL VIH VIL VOH VOL Conditions ICLK (pin 1) ICLK (pin 1) OE (pin 7) OE (pin 7) S0, S1 S0, S1 IOH = -25 mA IOL = 25 mA No load CLK output Pin 7 Pins 4, 6, 7 Min. 3.14 (VDD/2)+1 Typ. Max. 5.25 (VDD/2)-1 Units V V V V V V V V V mA mA kΩ pF Ω 2.0 0.8 VDD-0.5 0.5 2.4 0.4 20 +70 270 4 20 IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 4 ICS501B REV F 051310 ICS501B LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER AC Electrical Characteristics VDD = 5.0 V ±5%, Ambient Temperature 0 to +70° C, unless stated otherwise Parameter Input Frequency, crystal input Input Frequency, clock input Output Frequency, VDD = 5.0 V ±5% Output Frequency, VDD = 3.3 V ±5% Output Clock Rise Time Output Clock Fall Time Output Clock Duty Cycle PLL Bandwidth Output Enable Time, OE high to output on Output Disable Time, OE low to tri-state Absolute Clock Period Jitter One Sigma Clock Period Jitter Note 1: Measured with 15 pF load. Symbol FIN FIN FOUT FOUT tOR tOF tOD Conditions Min. 0.5 Typ. Max. 7.5 7.5 15 15 15 15 Units MHz MHz MHz MHz MHz MHz ns ns 0° C to +70° C -40° C to +85° C 0° C to +70° C -40° C to +85° C 0.8 to 2.0 V, Note 1 2.0 to 8.0 V, Note 1 1.5 V, up to 25 MHz 4 4 4 4 1 1 45 10 50 50 49-51 55 % kHz ns ns ps ps tja tjs Deviation from mean, Note 1 Note 1 +70 25 IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 5 ICS501B REV F 051310 ICS501B LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Narrow Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters 8 Inches Min Max Symbol Min Max E INDEX AREA H 12 D A A1 B C D E e H h L α 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0° 8° h x 45 .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .1890 .1968 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0° 8° A A1 C -Ce B SEATING PLANE L .10 (.004) C Ordering Information Part / Order Number 501BMLF 501BMLFT 501BMILF 501BMILFT 501-DWF 501-DPK Marking 501BML 501BML 501BMIL 501BMIL - Shipping Packaging Tubes Tape and Reel Tubes Tape and Reel Die on uncut, probed wafers Tested die in waffle pack Package 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC Temperature 0 to +70° C 0 to +70° C -40 to +85° C -40 to +85° C 0 to +70° C 0 to +70° C “LF” denotes Pb (lead) free package. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments. IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER 6 ICS501B REV F 051310 ICS501B LOCO™ PLL CLOCK MULTIPLIER CLOCK MULTIPLIER Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 For Tech Support www.idt.com/go/clockhelp Corporate Headquarters Integrated Device Technology, Inc. www.idt.com © 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA