IDT5V2310PG

IDT5V2310 2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER INDUSTRIAL TEMPERATURE RANGE 2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER FEATURES: DESCRIPTION: IDT5V2310 ADVANCE INFORMATION • High performance 1:10 clock driver for general purpose applications • Operates up to 200MHz at VDD = 3.3V • Pin-to-pin skew < 50ps • VDD range: 2.3V to 3.6V • Output enable glitch suppression • Distributes one clock input to two banks of five outputs • 25Ω on-chip series dampening resistors • Available in TSSOP and VFQFPN packages The IDT5V2310 is a high performance, low skew clock buffer that operates up to 200MHz. Two banks of five outputs each provide low skew copies of CLK. Through the use of control pins 1G and 2G, the outputs of banks 1Y(0:4) and 2Y(0:4) can be placed in a low state regardless of CLK input. The device operates in 2.5V and 3.3V environments. The built-in output enable glitch suppression ensures a synchronized output enable sequence to distribute full period clock signals. The IDT5V2310 is characterized for operation from -40°C to +85°C. FUNCTIONAL BLOCK DIAGRAM 3 25 Ω 1Y 0 4 25 Ω 1Y 1 5 25 Ω 1Y 2 8 25 Ω 1Y 3 9 25 Ω 11 1Y 4 1G LOGIC CONTROL 13 2G LOGIC CONTROL 21 24 2Y 0 CLK 25 Ω 20 25 Ω 2Y 1 17 25 Ω 2Y 2 16 25 Ω 2Y 3 12 The IDT logo is a registered trademark of Integrated Device Technology, Inc. 2Y 4 25 Ω INDUSTRIAL TEMPERATURE RANGE 1 c 2003 Integrated Device Technology, Inc. JUNE 2003 DSC 6173/17 IDT5V2310 2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER INDUSTRIAL TEMPERATURE RANGE PIN CONFIGURATION GND VDD 1 Y0 1 Y1 1 Y2 1 2 3 4 5 6 7 8 9 10 11 12 TSSOP TOP VIEW 24 23 22 21 20 19 18 17 16 15 14 13 CLK VDD VDD 1 20 19 18 17 16 GND 15 14 13 12 VDD VDD 2Y 0 2Y 1 2Y 2 2Y 3 VDD 2Y0 2Y1 VDD 1Y 0 1Y 1 1Y 2 1 Y3 1Y 4 2 3 4 5 6 7 8 9 10 11 GND GND 1 Y3 1 Y4 GND GND 2Y2 2Y3 VDD 1G CLK VDD VDD VDD 1G 2 Y4 VDD VDD ABSOLUTE MAXIMUM RATINGS(1) Symbol VDD VI VO IIK IOK IO TSTG Description Power Supply Voltage Input Voltage(2) Output Voltage(2) Input Clamp Current VI < 0 or VI > VDD Output Clamp Current VO < 0 or VO > VDD Continuous Total Output Current VO < 0 to VDD Storage Temperature Max –0.5 to +4.6 –0.5 to VDD +0.5 –0.5 to VDD +0.5 Unit V V V mA mA mA °C CAPACITANCE(TA = +25°C, f = 1MHz, VIN = 0V) Parameter CIN Description Input Capacitance VI = 0V or VDD Min. — Typ. 2.5 Max. — Unit pF ±50 ±50 ±50 –65 to +150 FUNCTION TABLE(1) Inputs 1G L H L H 2G L L H H CLK X H H H 1Y(0:4) 2Y 4 VFQFPN TOP VIEW 2G 2G Outputs 2Y(0:4) L H L H L L H H NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. Not to exceed 4.6V. NOTE: 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care 2 IDT5V2310 2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER INDUSTRIAL TEMPERATURE RANGE PIN DESCRIPTION TERMINAL Symbol I/O 1G I 2G 1Y(0:4) 2Y(0:4) I O O I PWR CLK GND VDD Description Output Enable Control for 1Y(0:4) Outputs. This output enable is active HIGH. If this pin is Logic HIGH, the 1Y(0:4) clock outputs will follow the input clock (CLK). If this pin is logic LOW, the 1Y(0:4) outputs will drive low independent of the state of CLK. Output Enable Control for 2Y(0:4) Outputs. This output enable is active HIGH. If this pin is Logic HIGH, the 2Y(0:4) clock outputs will follow the input clock (CLK). If this pin is logic LOW, the 2Y(0:4) outputs will drive low independent of the state of CLK. Buffered Output Clocks Buffered Output Clocks Input Reference Frequency Ground DC Power Supply, 2.3V to 3.6V RECOMMENDED OPERATING RANGE Symbol VDD VIL VIH VI IOH IOL TA Description Internal Power Supply Voltage Input Voltage LOW Input Voltage HIGH Input Voltage Output Current HIGH Output Current LOW Ambient Operating Temperature VDD = 3V to 3.6V VDD = 2.3V to 2.7V VDD = 3V to 3.6V VDD = 2.3V to 2.7V VDD = 3V to 3.6V VDD = 2.3V to 2.7V VDD = 3V to 3.6V VDD = 2.3V to 2.7V -40 Min. 2.3 Typ. 2.5 3.3 Max. 3.6 0.8 0.7 Unit V V V VDD -12 -6 12 6 +85 V mA mA °C 2 1.7 0 DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Symbol VIK IIN IDD Parameter Input Voltage Input Current Static Device Current(1) Test Conditions VDD = 3V, IIN = -18mA VI = 0V or VDD CLK = 0V or VDD, IO = 0mA, VDD = 3.3V Min. Typ. Max - 1.2 ±5 25 Unit V µA µA NOTE: 1. For IDD over frequency, see TEST CIRCUIT AND WAVEFORMS. DC ELECTRICAL CHARACTERISTICS - VDD = 3.3V ± 0.3V Symbol VOH Parameter HIGH level Output Voltage Test Conditions IOH = -100µA VDD = Min. to Max. VDD = 3V IOH = -12mA IOH = -6mA IOH = 100µA VDD = Min. to Max. VDD = 3V IOH = 12mA IOH = 6mA VO = 1V VDD = 3V VDD = 3.3V VO = 1.65V VDD = 3.6V VO = 3.135V VO = 1.95V VDD = 3V VDD = 3.3V VO = 1.65V VO = 0.4V VDD = 3.6V Min. VDD - 0.2 2.1 2.4 Typ.(1) Max Unit V 0.2 0.8 0.55 -28 -36 -14 28 36 14 mA mA VOL LOW level Output Voltage V IOH HIGH level Output Current IOL LOW level Output Current NOTE: 1. All typical values are at respective nominal VDD. 3 IDT5V2310 2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS - VDD = 2.5V ± 0.2V Symbol VOH VOL Parameter HIGH level Output Voltage LOW level Output Voltage Test Conditions VDD = Min. to Max. IOH = -100µA VDD = 2.3V IOH = -6mA VDD = Min. to Max. IOH = 100µA VDD = 2.3V IOH = 6mA VO = 1V VDD = 2.3V VDD = 2.5V VO = 1.25V VDD = 2.7V VO = 2.375V VO = 1.2V VDD = 2.3V VDD = 2.5V VO = 1.25V VO = 0.3V VDD = 2.7V Min. VDD - 0.2 1.8 Typ.(1) Max Unit V V 0.2 0.55 -17 -25 -10 17 25 10 IOH HIGH level Output Current mA IOL LOW level Output Current mA NOTE: 1. All typical values are at respective nominal VDD. TIMING REQUIREMENTS OVER RECOMMENDED RANGE Symbol fCLK Parameter Clock Frequency Test Conditions VDD = 3V to 3.6V VDD = 2.3V to 2.7V Min. 0 0 Typ. Max 200 170 Unit MHz 4 IDT5V2310 2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER INDUSTRIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE VDD = 3.3V ± 0.3V(1) Symbol tPLH tPHL tSK(O)(2) tSK(P) tSK(PP) tR tF tSU tH Parameter CLK to Yx Output Skew, Yx to Yx Pulse Skew Part-to-Part Skew Rise Time Fall Time G before CLK↓ G after CLK↓ Test Conditions f = 0MHz to 200MHz Min. 1.3 Typ.(1) Max 2.8 100 250 500 2 2 Unit ns ps ps ps V/ns V/ns ns VO = 0.4V to 2V VO = 2V to 0.4V V(THRESHOLD) = VDD/2 0.7 0.7 0.1 0.4 NOTES: 1. All typical values are at respective nominal VDD. 2. This specification is only valid for equal loading of all outputs. SWITCHING CHARACTERISTICS OVER OPERATING RANGE VDD = 2.5V ± 0.2V(1) Symbol tPLH tPHL tSK(O)(2) tSK(P) tSK(PP) tR tF tSU tH Parameter CLK to Yx Output Skew, Yx to Yx Pulse Skew Part-to-Part Skew Rise Time Fall Time G before CLK↓ G after CLK↓ Test Conditions f = 0MHz to 170MHz Min. 1.5 Typ.(1) Max 3.5 100 400 600 1.4 1.4 Unit ns ps ps ps V/ns V/ns ns VO = 0.4V to 1.7V VO = 1.7V to 0.4V V(THRESHOLD) = VDD/2 0.5 0.5 0.1 0.4 NOTES: 1. All typical values are at respective nominal VDD. 2. This specification is only valid for equal loading of all outputs. 5 IDT5V2310 2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER INDUSTRIAL TEMPERATURE RANGE OUTPUT ENABLE GLITCH SUPPRESSION CIRCUIT The purpose of the glitch suppression circuitry is to ensure the output enable sequence is synchronized with the clock input such that the output buffer will be enabled on the next full period of the input clock (negative edge triggered by the input clock). The G input must be stable one tEN - time prior to the falling edge of the CLK for predictable operation. CLK Gx tEN tDIS Yx G (tEN, tDIS) Relative to CLK↓ 6 IDT5V2310 2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS FROM OUTPUT UNDER TEST 500Ω CL NOTES: 1. CL includes probe and jig capacitance. 2. All input pulses are supplied by generators having the following characteristics: PRR ≤200MHz; ZO = 50Ω; tR < 1.2ns; tF < 1.2ns. Test Load Circuit VDD CLK tPLH tPHL VOH 1.7V or 2V Yx 0.4V tR tF 0.4V 50% VDD VOL 50% VDD 0V Voltage Waveforms Propagation Delay Times VDD CLK 0V VOH Any Y 50% VDD VOL VOH Any Y 50% VDD VOL tSK(O) tSK(O) Output Skew VDD CLK 50% VDD 0V tPLH Yx 50% VDD VOL tPHL VOH tSK(P) = tPLH tPHL Pulse Skew 7 IDT5V2310 2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION IDT XXXXX Device Type XX Package X Package I -40°C to +85°C (Industrial) PG NR Thin Shrink Small Outline Package Thermally Enhanced Plastic Very Fine Pitch Quad Flat No Lead Package 2.5V to 3.3V High Performance Clock Buffer 5V2310 CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com for Tech Support: logichelp@idt.com (408) 654-6459 8