IDT5V926A

IDT5V926A

  • 厂商:

    IDT

  • 封装:

  • 描述:

    IDT5V926A - Single Output Clock Generator - Integrated Device Technology

  • 详情介绍
  • 数据手册
  • 价格&库存
IDT5V926A 数据手册
Single Output Clock Generator IDT5V926A DATA SHEET FEATURES: • 3V to 3.6V operating voltage • 48MHz to 160MHz output frequency range • Input from fundamental crystal oscillator or external source • Internal PLL feedback (loading the feedback output relative to the other outputs, will adjust the propagation delay between REF inputs and outputs) • Select inputs (S[1:0]) for FB divide selection (multiply ratio of 2, 3, 4, 4.25, 5, 6, 6.25, and 8) • Low jitter • PLL bypass for testing and power-down control (S1 = H, S0 = H, powers part down 125MHz QREF Output/Duty Cycle VT = VDDQ/2 FOUT = 106.25MHz tJ fOUT Cycle - Cycle Jitter FOUT = 125MHz FOUT = 155.52MHz Output Frequency INPUT TIMING REQUIREMENTS Symbol tR, tF tPWC DH fOSC fIN NOTES: 1. Where pulse width implied by DH is less than the tPWC limit, tPWC limit applies. 2. When using a clock input. Description(1) Maximum input rise and fall time, 0.8V to 2V(2) Input clock pulse, HIGH or LOW(2) Input duty cycle(2) XTAL oscillator frequency Input frequency(2) Min. — 2 10 10 48/N Max. 10 — 90 40 160/N Unit ns/V ns % MHz MHz DT5V926A REVISION A JUNE 11, 2009 4 ©2009 Integrated Device Technology, Inc. IDT5V926A Data Sheet SINGLE OUTPUT CLOCK GENERATOR PARAMETER MEASUREMENT INFORMATION 1.65V±0.15V VDD, VDDQ SCOPE QOUT LVCMOS GND t cycle n ➤ t jit(cc) = |t cycle n – t cycle n+1| 1000 Cycles -1.65V±0.15V 3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT CYCLE-TO-CYCLE JITTER 2V 0.8V tR 2V 0.8V tF QREF, QOUT t PW t PERIOD QREF, QOUT odc = t PW t PERIOD OUTPUT RISE/FALL TIME OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD DT5V926A REVISION A JUNE 11, 2009 5 ©2009 Integrated Device Technology, Inc. ➤ V DD ➤ Qx t cycle n+1 ➤ 2 x 100% IDT5V926A SINGLE OUTPUT CLOCK GENERATOR PRELIMINARY ORDERING INFORMATION IDT XXXX Device Type X Package X Process I PG PGG 5V926A -40°C to +85C° (Industrial) Thin Shrink Small Outline Package TSSOP - Green Single Output Clock Generator Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 (inside USA) +408-284-8200 (outside USA) Fax: 408-284-2775 www.IDT.com/go/contactIDT For Tech Support netcom@idt.com +480-763-2056 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800-345-7015 (inside USA) +408-284-8200 (outside USA) © 2008 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered trademarks used to identify products or services of their respective owners. Printed in USA
IDT5V926A
1. 物料型号: - 型号为IDT5V926A。

2. 器件简介: - IDT5V926A是一款低成本、低偏斜、低抖动、高性能的时钟乘法器,可从较低频率的晶体振荡器或外部时钟输入提供参考时钟。特别设计用于与千兆以太网和快速以太网应用接口,通过25MHz输入提供125MHz时钟。可编程提供48MHz至160MHz的输出频率范围,输入频率范围为6MHz至80MHz。

3. 引脚分配: - S[1:0]:三分频选择输入,悬空至中电平。 - OE:输出使能,高电平时Qout和Oref处于高阻态,低电平时正常工作。 - REFE:Oref使能输入,高电平时Oref停止,低电平时Oref启用。 - X1/REF:晶体振荡器输入或时钟输入。 - X2:晶体振荡器输出,时钟输入时不连接。 - QOUT:输出频率为N'REF。 - QREF:输出频率为REF。 - VDDQ:设备输出电源,连接至PCB上的VDD。 - VDD:设备核心和输入电源,连接至PCB上的VDD。 - GND:地电源。

4. 参数特性: - 工作电压:3V至3.6V。 - 输出频率范围:48MHz至160MHz。 - 输入频率范围:6MHz至80MHz。 - 内部PLL反馈,选择输入S[1:0]用于FB分频选择。

5. 功能详解: - 内部RC滤波器提供优秀的抖动特性,无需外部组件。 - PLL旁路用于测试和电源控制。 - 封装为TSSOP。

6. 应用信息: - 应用于千兆以太网、路由器、网络交换机、SAN、仪器和光纤通道。

7. 封装信息: - 可用TSSOP封装,引脚和功能与IDT5V926兼容。
IDT5V926A 价格&库存

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