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IDT6116LA25P

IDT6116LA25P

  • 厂商:

    IDT

  • 封装:

  • 描述:

    IDT6116LA25P - CMOS STATIC RAM 16K (2K x 8 BIT) - Integrated Device Technology

  • 数据手册
  • 价格&库存
IDT6116LA25P 数据手册
CMOS Static RAM 16K (2K x 8-Bit) IDT6116SA IDT6116LA x Features High-speed access and chip select times – Military: 20/25/35/45/55/70/90/120/150ns (max.) – Industrial: 20/25/35/45ns (max.) – Commercial: 15/20/25/35/45ns (max.) Low-power consumption Battery backup operation – 2V data retention voltage (LA version only) Produced with advanced CMOS high-performance technology CMOS process virtually eliminates alpha particle soft-error rates Input and output directly TTL-compatible Static operation: no clocks or refresh required Available in ceramic and plastic 24-pin DIP, 24-pin Thin Dip, 24-pin SOIC and 24-pin SOJ Military product compliant to MIL-STD-833, Class B Description The IDT6116SA/LA is a 16,384-bit high-speed static RAM organized as 2K x 8. It is fabricated using IDT's high-performance, high-reliability CMOS technology. Access times as fast as 15ns are available. The circuit also offers a reduced power standby mode. When CS goes HIGH, the circuit will automatically go to, and remain in, a standby power mode, as long as CS remains HIGH. This capability provides significant system level power and cooling savings. The low-power (LA) version also offers a battery backup data retention capability where the circuit typically consumes only 1µW to 4µW operating off a 2V battery. All inputs and outputs of the IDT6116SA/LA are TTL-compatible. Fully static asynchronous circuitry is used, requiring no clocks or refreshing for operation. The IDT6116SA/LA is packaged in 24-pin 600 and 300 mil plastic or ceramic DIP, 24-lead gull-wing SOIC, and 24-lead J-bend SOJ providing high board-level packing densities. Military grade product is manufactured in compliance to the latest version of MIL-STD-883, Class B, making it ideally suited to military temperature applications demanding the highest level of performance and reliability. x x x x x x x x Functional Block Diagram A0 V CC ADDRESS DECODER A 10 128 X 128 MEMORY ARRAY GND I/O 0 INPUT DATA CIRCUIT I/O 7 I/O CONTROL , CS OE WE CONTROL CIRCUIT 3089 drw 01 FEBRUARY 2001 1 ©2000 Integrated Device Technology, Inc. DSC-3089/03 IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and In dustrial Temperature Ranges Pin Configurations A7 A6 A5 A4 A3 A2 A1 A0 I/O 0 I/O 1 I/O 2 GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VCC A8 A9 WE OE A10 CS I/O 7 I/O 6 I/O 5 I/O 4 I/O3 3089 drw 02 Capacitance (TA = +25°C, f = 1.0 MHZ) Symbol CIN CI/O Parameter(1) Input Capacitance I/O Capacitance Conditions VIN = 0V VOUT = 0V Max. 8 8 Unit pF pF 3089 tbl 03 P24-2 P24-1 D24-2 D24-1 SO24-2 SO24-4 NOTE: 1. This parameter is determined by device characterization, but is not production tested. , Absolute Maximum Ratings(1) Symbol VTERM (2) DIP/SOIC/SOJ Top View Pin Description Name A0 - A10 I/O0 - I/O7 CS WE OE VCC GND Description Address Inputs Data Input/Output Chip Select Write Enable Output Enable Power Ground 3089 tbl 01 Rating Terminal Voltage with Respect to GND Operating Temperature Temperature Under Bias Storage Temperature Power Dissipation DC Output Current Com'l. -0.5 to +7.0 Mil. -0.5 to +7.0 Unit V TA TBIAS TSTG PT IOUT 0 to +70 -55 to +125 -55 to +125 1.0 50 -55 to +125 -65 to +135 -65 to +150 1.0 50 o C C C o o W mA 3089 tbl 04 NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VTERM must not exceed VCC +0.5V. Truth Table(1) Mode Standby Read Read Write CS H L L L OE X L H X WE X H H L I/O High-Z DATA OUT High-Z DATA IN 3089 tbl 02 NOTE: 1. H = VIH, L = VIL, X = Don't Care. 2 IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and In dustrial Temperature Ranges Recommended Operating Temperature and Supply Voltage Grade Military Industrial Commercial Ambient Temperature -55OC to +125OC -45OC to +85OC 0OC to +70OC GND 0V 0V 0V Vcc 5.0V ± 10% 5.0V ± 10% 5.0V ± 10% 3089 tbl 05 Recommended DC Operating Conditions Symbol VCC GND VIH VIL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Min. 4.5 0 2.2 -0.5 (1) Typ. 5.0 0 3.5 ____ Max. 5.5 0 VCC +0.5 0.8 (2) Unit V V V V 3089 tbl 06 NOTES: 1. VIL (min.) = –3.0V for pulse width less than 20ns, once per cycle. 2. VIN must not exceed VCC +0.5V. DC Electrical Characteristics (VCC = 5.0V ± 10%) Symbol |ILI| |ILO| VOL VOH IDT6116SA Parameter Input Leakage Current Output Leakage Current Output Low Voltage Output High Voltage Test Conditions VCC = Max., VIN = GND to VCC VCC = Max., CS = VIH, VOUT = GND to V CC IOL = 8mA, VCC = Min. IOH = -4mA, VCC = Min. MIL. COM'L. MIL. COM'L. Min. ____ ____ ____ ____ IDT6116LA Min. ____ ____ ____ ____ Max. 10 5 10 5 0.4 ____ Max. 5 2 5 2 0.4 ____ Unit µA µA V V 3089 tbl 07 ____ ____ 2.4 2.4 DC Electrical Characteristics(1) (VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC - 0.2V) 6116SA15 Symbol ICC1 Parameter Operating Power Supply Current CS < VIL, Outputs Open VCC = Max., f = 0 Dynamic Operating Current CS < VIL, Outputs Open VCC = Max., f = fMAX(2) Standby Power Supply Current (TTL Level) CS > VIH, Outputs Open VCC = Max., f = fMAX(2) Full Standby Power Supply Current (CMOS Level) CS > VHC, VCC = Max., VIN < VLC o r VIN > VHC, f = 0 Power SA LA SA LA SA LA SA LA Com'l Only 105 95 150 140 40 35 2 0.1 6116SA20 6116LA20 Com'l & Ind 105 95 130 120 40 35 2 0.1 Mil 130 120 150 140 50 45 10 0.9 6116SA25 6116LA25 Com'l & Ind 80 75 120 110 40 35 2 0.1 Mil 90 85 135 125 45 40 10 0.9 6116SA35 6116LA35 Com'l. & Ind. 80 75 100 95 25 25 2 0.1 Mil 90 85 115 105 35 30 10 0.9 3089 tbl 08 Unit mA ICC2 mA ISB mA ISB1 mA NOTES: 1. All values are maximum guaranteed values. 2. fMAX = 1/tRC, only address inputs are cycling at fMAX, f = 0 means address inputs are not changing. 6.42 3 IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and In dustrial Temperature Ranges DC Electrical Characteristics(1) (continued) (VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC - 0.2V) 6116SA45 6116LA45 Symbol ICC1 Parameter Operating Power Supply Current, CS < VIL, Outputs Open VCC = Max., f = 0 Dynamic Operating Current, CS < VIL, Outputs Open VCC = M ax., f = fMAX(2) Standby Power Supply Current (TTL Level) CS > VIH, Outputs Open VCC = M ax., f = fMAX(2) Full Standby Power Supply Current (CMOS Level), CS > VHC, VCC = Max., VIN < VLC or VIN > VHC, f = 0 Power SA LA SA LA SA LA SA LA Com'l & Ind 80 75 100 90 25 20 2 0.1 Mil 90 85 100 95 25 20 10 0.9 6116SA55 6116LA55 Mil Only 90 85 100 90 25 20 10 0.9 6116SA70 6116LA70 Mil Only 90 85 100 90 25 20 10 0.9 6116SA90 6116LA90 Mil Only 90 85 100 85 25 25 10 0.9 6116SA120 6116LA120 Mil Only 90 85 100 85 25 15 10 0.9 6116SA150 6116LA150 Mil Only 90 85 90 85 25 15 10 0.9 3089 tbl 09 Unit mA ICC2 mA ISB mA ISB1 mA NOTES: 1. All values are maximum guaranteed values. 2. fMAX = 1/tRC, only address inputs are toggling at fMAX, f = 0 means address inputs are not changing. Data Retention Characteristics Over All Temperature Ranges (LA Version Only) (VLC = 0.2V, VHC = VCC – 0.2V) Typ. (1) VCC @ Symbol V DR ICCDR tCDR(3) tR(3) Parameter VCC for Data Retention Data Retention Current Chip Deselect to Data Retention Time Operation Recovery Time Input Leakage Current Test Condition ____ Max. VCC @ 3.0V ____ Min. 2.0 2.0V ____ 2.0V ____ 3.0V ____ Unit V µA ns MIL. COM'L. CS > VHC VIN > VHC o r < VLC ____ ____ 0.5 0.5 0 1.5 1.5 ____ 200 20 ____ 300 30 ____ ____ tRC(2) ____ ____ ____ ____ ____ ns µA 3089 tbl 10 IILII ____ ____ 2 2 NOTES: 1. TA = + 25°C 2. tRC = Read Cycle Time. 3. This parameter is guaranteed by device characterization, but is not production tested. 4 IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and In dustrial Temperature Ranges Low VCC Data Retention Waveform DATA RETENTION MODE VCC tCDR CS VDR VIH VIH 3089 drw 03 4.5V VDR ≥ 2V 4.5V tR , AC Test Conditions Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels AC Test Load GND to 3.0V 5ns 1.5V 1.5V See Figures 1 and 2 3089 tbl 11 5V 5V 480Ω DATAOUT 255Ω 30pF* DATAOUT 255Ω 480Ω 5pF* , 3089 drw 04 3089 drw 05 , Figure 1. AC Test Load *Including scope and jig. Figure 2. AC Test Load (for tOLZ, tCLZ, tOHZ , tWHZ, tCHZ & tOW) 6.42 5 IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and In dustrial Temperature Ranges AC Electrical Characteristics (VCC = 5V ± 10%, All Temperature Ranges) 6116SA15(1) Symbol Parameter Min. Max. 6116SA20 6116LA20 Min. Max. 6116SA25 6116LA25 Min. Max. 6116SA35 6116LA35 Min. Max. Unit Read Cycle tRC tAA tACS tCLZ(3) tOE tOLZ(3) tCHZ(3) tOHZ(3) tOH tPU(3) tPD(3) Read Cycle Time Address Access Time Chip Select Access Time Chip Select to Output in Low-Z Output Enable to Output Valid Output Enable to Output in Low-Z Chip Dese lect to Output in High-Z Output Disable to Output in High-Z Output Hold from Address Change Chip Select to Power Up Time Chip Desele ct to Power Down Time 15 ____ ____ ____ 20 ____ ____ ____ 25 ____ ____ ____ 35 ____ ____ ____ ns ns ns ns ns ns ns ns ns ns ns 3089 tbl 12 15 15 ____ 19 20 ____ 25 25 ____ 35 35 ____ 5 ____ 5 ____ 5 ____ 5 ____ 10 ____ 10 ____ 13 ____ 20 ____ 0 ____ 0 ____ 5 ____ 5 ____ 10 8 ____ 11 8 ____ 12 10 ____ 15 13 ____ ____ ____ ____ ____ 5 0 ____ 5 0 ____ 5 0 ____ 5 0 ____ ____ ____ ____ ____ 15 20 25 35 AC Electrical Characteristics (VCC = 5V ± 10%, All Temperature Ranges) (continued) 6116SA45 6116LA45 Symbol Parameter Min. Max. 6116SA55(2) 6116LA55(2) Min. Max. 6116SA70(2) 6116LA70(2) Min. Max. 6116SA90(2) 6116LA90(2) Min. Max. 6116SA120(2) 6116LA120(2) Min. Max. 6116SA150(2) 6116LA150(2) Min. Max. Unit Read Cycle tRC tAA tACS tCLZ(3) tOE tOLZ(3) tCHZ(3) tOHZ(3) tOH Read Cycle Time Address Access Time Chip Select Access Time Chip Select to Output in Low-Z Output Enable to Output Valid Output Enable to Output in Low-Z Chip Dese lect to Output in High-Z Output Disable to Output in High-Z Output Hold from Address Change 45 ____ ____ 55 ____ ____ 70 ____ ____ 90 ____ ____ 120 ____ ____ 150 ____ ____ ns ns ns ns ns ns ns ns ns 3089 tbl 13 45 45 ____ 55 50 ____ 70 65 ____ 90 90 ____ 120 120 ____ 150 150 ____ ____ ____ ____ ____ ____ ____ 5 ____ 5 ____ 5 ____ 5 ____ 5 ____ 5 ____ 25 ____ 40 ____ 50 ____ 60 ____ 80 ____ 100 ____ 5 ____ 5 ____ 5 ____ 5 ____ 5 ____ 5 ____ 20 15 ____ 30 30 ____ 35 35 ____ 40 40 ____ 40 40 ____ 40 40 ____ ____ ____ ____ ____ ____ ____ 5 5 5 5 5 5 NOTES: 1. 0°C to +70°C temperature range only. 2. –55°C to +125°C temperature range only. 3. This parameter guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested. 6 IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and In dustrial Temperature Ranges Timing Waveform of Read Cycle No. 1(1,3) tRC ADDRESS tAA tOH OE tOHZ (5) tOE CS tOLZ (5) tACS tCLZ DATAOUT ICC VCC Supply Currents tPU (5) tCHZ (5) DATA VALID ISB tPD 3089 drw 06 , Timing Waveform of Read Cycle No. 2(1,2,4) tRC ADDRESS tAA tOH DATAOUT PREVIOUS DATA VALID DATA VALID 3089 drw 07 tOH , Timing Waveform of Read Cycle No. 3(1,3,4) CS tCLZ (5) DATAOUT tACS tCHZ DATA VALID 3089 drw 08 (5) , NOTES: 1. WE is HIGH for Read cycle. 2. Device is continously selected, CS is LOW. 3. Address valid prior to or coincident with CS transition LOW. 4. OE is LOW. 5. Transition is measured ±500mV from steady state. 6.42 7 IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and In dustrial Temperature Ranges AC Electrical Characteristics (VCC = 5V ± 10%, All Temperature Ranges) 6116SA15(1) Symbol Parameter Min. Max. 6116SA20 6116LA20 Min. Max. 6116SA25 6116LA25 Min. Max. 6116SA35 6116LA35 Min. Max. Unit Write Cycle tWC tCW tAW tAS tWP tWR tWHZ tDW tDH(4) tOW(3,4) (3) Write Cycle Time Chip Select to End-of-Write Address Valid to End-of-Write Address Set-up Time Write Pulse Width Write Recovery Time Write to Output in High-Z Data to Write Time Overlap Data Hold from Write Time Output Active from End-of-Write 15 13 14 0 12 0 ____ ____ ____ 20 15 15 0 12 0 ____ ____ ____ 25 17 17 0 15 0 ____ ____ ____ 35 25 25 0 20 0 ____ ____ ____ ns ns ns ns ns ns ns ns ns ns 3089 tbl 14 ____ ____ ____ ____ ____ ____ ____ ____ ____ ____ ____ ____ ____ ____ ____ ____ 7 ____ 8 ____ 16 ____ 20 ____ 12 0 0 12 0 0 13 0 0 15 0 0 ____ ____ ____ ____ ____ ____ ____ ____ AC Electrical Characteristics (VCC = 5V ± 10%, All Temperature Ranges) (continued) 6116SA45 6116LA45 Symbol Parameter Min. Max. 6116SA55(2) 6116LA55(2) Min. Max. 6116SA70(2) 6116LA70(2) Min. Max. 6116SA90(2) 6116LA90(2) Min. Max. 6116SA120(2) 6116LA120(2) Min. Max. 6116SA150(2) 6116LA150(2) Min. Max. Unit Write Cycle tWC tCW tAW tAS tWP tWR tWHZ(3) tDW tDH(4) tOW(3,4) Write Cycle Time Chip Select to End-of-Write Address Valid to End-of-Write Address Set-up Time Write Pulse Width Write Recovery Time Write to Output in High-Z Data to Write Time Overlap Data Hold from Write Time Output Active from End-of-Write 45 30 30 0 25 0 ____ ____ ____ ____ ____ ____ ____ 55 40 45 5 40 5 ____ ____ ____ ____ ____ ____ ____ 70 40 65 15 40 5 ____ ____ ____ ____ ____ ____ ____ 90 55 80 15 55 5 ____ ____ ____ ____ ____ ____ ____ 120 70 105 20 70 5 ____ ____ ____ ____ ____ ____ ____ 150 90 120 20 90 10 ____ ____ ____ ____ ____ ____ ____ ns ns ns ns ns ns ns ns ns ns 3089 tbl 15 25 ____ 30 ____ 35 ____ 40 ____ 40 ____ 40 ____ 20 0 0 25 5 0 30 5 0 30 5 0 35 5 0 40 10 0 ____ ____ ____ ____ ____ ____ ____ ____ ____ ____ ____ ____ NOTES: 1. 0°C to +70°C temperature range only. 2. –55°C to +125°C temperature range only. 3. This parameter guaranteed with AC Load (Figure 2) by device characterization, but is not production tested. 4. The specification for tDH must be met by the device supplying write data to the RAM under all operation conditions. Although t DH and tOW values will vary over voltage and temperature, the actual tDH will always be smaller than the actual tOW. 8 IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and In dustrial Temperature Ranges Timing Waveform of Write Cycle No. 1 (WE Controlled Timing)(1,2,5,7) tWC ADDRESS tAW CS tAS WE tWHZ DATAOUT PREVIOUS DATA VALID (4) (6) (6) tWP (7) tWR (3) tCHZ (6) tOW tDW tDH DATA (4) VALID DATAIN DATA VALID 3089 drw 09 , Timing Waveform of Write Cycle No. 2 (CS Controlled Timing)(1,2,3,5,7) tWC ADDRESS tAW CS tAS WE tDW DATAIN DATA VALID 3089 drw 10 tWR (3) tCW tDH , NOTES: 1. WE or CS must be HIGH during all address transitions. 2. A write occurs during the overlap of a LOW CS and a LOW WE. 3. tWR is measured from the earlier of CS or WE going HIGH to the end of the write cycle. 4. During this period, the I/O pins are in the output state and the input signals must not be applied. 5. If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in the high-impedance state. 6. Transition is measured ±500mV from steady state. 7. OE is continuously HIGH. If OE is LOW during a WE controlled write cycle, the write pulse width must be the larger of tWP or (tWHZ + tDW) to allow the I/O drivers to turn off and data to be placed on the bus for the required tDW. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the write pulse is the specified tWP. For a CS controlled write cycle, OE may be LOW with no degradation to tCW. 6.42 9 IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and In dustrial Temperature Ranges Ordering Information — Military IDT 6116 Device Type XX Power XXX Speed X Package X Process/ Temperature Range B Military (-55°C to +125°C) Compliant to MIL-STD-883, Class B TD D 300 mil CERDIP (D24-1) 600 mil CERDIP (D24-2) 20* 25* 35* 45 55 70 90 120 150** SA LA , Speed in nanoseconds Standard Power Low Power *Available in 300 mil packaging only. **Available in 600 mil packaging only. 3089 drw 11 Ordering Information — Commercial & Industrial IDT 6116 Device Type XX Power XXX Speed X Package X Process/ Temperature Range Blank I Commercial (0°C to +70°C) Industrial (-45°C to +85°C) TP P SO Y 300 mil Plastic DIP (P24-1) 600 mil Plastic DIP (P24-2) 300 mil Small Outline IC, Gull-Wing Bend (SO24-2) 300 mil SOJ, J-Bend (SO24-4) , 15* 20 25 35 45 Speed in nanoseconds SA LA Standard Power Low Power *Available in commercial temperature range and standard power only. 3089 drw 12 10 IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Military, Commercial, and In dustrial Temperature Ranges Datasheet Document History 1/7/00 Pg. 1, 3, 4, 10 Pg. 9, 10 Pg. 11 08/09/00 02/01/01 Updated to new format Added Industrial Temperature range offerings Separated ordering information into military, commercial, and industrial temperature range offerings Added Datasheet Document History Not recommended for new designs Removed "Not recommended for new designs" CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax:408-492-8674 www.idt.com 6.42 11 for Tech Support: sramhelp@idt.com 800 544-7726, x4033 The IDT logo is a registered trademark of Integrated Device Technology, Inc.
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