ISM92-3251AH-8.000MHZ

ISM92 Series Product Features: Low Jitter, Non-PLL Based Output CMOS/TTL Compatible Logic Levels Compatible with Leadfree Processing Frequency Applications: Fibre Channel Server & Storage Sonet /SDH 802.11 / Wifi T1/E1.T3/E3 System Clock 1.5 MHz to 125.000 MHz Output Level HC-MOS TTL Duty Cycle ‘0’ = 0.1 Vcc Max., ‘1’ = 0.9 Vcc Min. ‘0’ = 0.4 VDC Max., ‘1’ = 2.4 VDC Min. Specify 50% ±10% or ±5% See Table in Part Number Guide Rise / Fall Time 5 nS Max. @ Vcc = +3.3 VDC, 10 nS Max. @ Vcc = +5 VDC *** Output Load Fo < 50 MHz = 10 TTL, Fo > 50 MHz = 5 LSTTL See Table in Part Number Guide Frequency Stability Start-up Time See Frequency Stability Table (Includes room temperature tolerance and stability over operating temperature) 10 mS Max. Enable / Disable Time 100 nS Max. N.C. or ≥ 70% Vdd = Enable. ≤ 30% Vdd = Disable. Supply Voltage See Input Voltage Table, tolerance ±5 % Current 40 mA Max. *** Operating See Operating Temperature Table in Part Number Guide Storage -55° C to +125° C Jitter: RMS(1sigma) 1 MHz-75 MHz 5 pS RMS (1 sigma) Max. accumulated jitter (20K adjacent periods) 3 pS RMS (1 sigma) Max. accumulated jitter (20K adjacent periods) 76 MHz-125 MHz Max Integrated 1 MHz-75 MHz 76 MHz-125 MHz Max Total Jitter 1 MHz-75 MHz 76 MHz-125 MHz 1.5 pS RMS (1 sigma -12KHz to 20MHz) 1 pS RMS (1 sigma -12KHz to 20MHz) 50 pS p-p (100K adjacent periods) 30 pS p-p (100K adjacent periods) Part Number Guide Sample Part Number: ISM91 - 3251BH - 20.000 Package Input Operating Symmetry Output Voltage Temperature (Duty Cycle) 5 = 5.0 V 1 = 0° C to +70° C 5 = 45 / 55 Max. 1 = 10TTL / 15 pF HC-MOS 3 = 3.3 V 6 = -10° C to +70° C 6 = 40 / 60 Max. 5 = 50 pF HC-MOS (