2ED020I12-FI

Final Datasheet, September 2007 2ED020I12-FI Dual IGBT Driver IC Power Managment & Drives Never stop thinking. 2ED020I12-FI Revision History: 2007-09-10 Final Datasheet Previous Version: Page 12 21 Preliminary Datasheet V3.2 2ED020I12-FI Subjects (major changes since last revision) Update Operating Range Update Application Advices For questions on technology, delivery and prices, please contact the Infineon offices in Germany or the Infineon companies and representatives worldwide: See our webpage at http://www.infineon.com/gatedriver Edition 2007-09-10 Published by Infineon Technologies AG, Am Campeon 1-12, D-85579 Neubiberg © Infineon 2007. All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as warranted characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies AG is an approved CECC manufacturer. Information For further information on technology, delivery terms and conditions and prices, please contact your nearest Infineon office in Germany or our Infineon representatives worldwide (see at http://www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question, please contact your nearest Infineon office. Infineon components may only be used in life-support devices or systems with the express written approval of Infineon, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. 2ED020I12-FI Final Data Dual IGBT Driver IC 2ED020I12-FI Product Highlights • • • • • • • • Fully operational to ±1.2 kV Power supply operating range from 14 to 18 V Gate drive currents of +1 A / –2 A Matched propagation delay for both channels High dV/dt immunity Low power consumption General purpose operational amplifier General purpose comparator PG-DS O-18-2 Features • • • • • • • • Floating high side driver Undervoltage lockout for both channels 3.3 V and 5 V TTL compatible inputs CMOS Schmitt-triggered inputs with pull-down Non-inverting inputs Interlocking inputs Dedicated shutdown input with pull-up RoHS compliant Type 2ED020I12-FI Final Datasheet Ordering Code SP0002-65782 3 Package Packaging PG-DSO-18-2 Tape&Reel September 2007 Final Data High and Low Side Driver 2ED020I12-FI Overview 1 Overview The 2ED020I12-FI is a high voltage, high speed power MOSFET and IGBT driver with interlocking high and low side referenced outputs. The floating high side driver may be supplied directly or by means of a bootstrap diode and capacitor. In addition to the logic input of each driver the 2ED020I12-FI is equipped with a dedicated shutdown input. All logic inputs are compatible with 3.3 V and 5 V TTL. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. Both drivers are designed to drive an N-channel power MOSFET or IGBT which operate up to 1.2 kV. In addition, a general purpose operational amplifier and a general purpose comparator are provided which may be used for instance for current measurement or overcurrent detection. Final Datasheet 4 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Pin Configuration and Functionality 2 2.1 Pin Configuration and Functionality Pin Configuration InH InL SD GNDH OutH VSH 2ED020I12-FI GND CPO CP CP+ OPO OP OP+ GNDH n.c. VSL OutL GNDL P-DSO-18-2 (300mil) Figure 1 Pin Configuration (top view) 2.2 Pin 1 2 3 4 5 6 7 8 Table 1 Pin Definitions and Functions Symbol InH InL SD GND CPO CP– CP+ Function Logic input for high side driver Logic input for low side driver Logic input for shutdown of both drivers Common ground Open collector output of general purpose comparator Inverting input of general purpose comparator Non-inverting input of general purpose comparator OPO Output of general purpose OP Pin Description Final Datasheet 5 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Pin Configuration and Functionality Pin 9 10 11 12 13 14 15 16 17 18 19 20 Table 1 1) Symbol OP– OP+ GNDL OutL VSL n.c. n.e. n.e. GNDH VSH OutH Function Inverting input of general purpose OP Non-inverting input of general purpose OP Low side power ground 1) Low side gate driver output Low side supply voltage (not connected) (not existing) (not existing) High side (power) ground High side supply voltage High side gate driver output GNDH High side (power) ground Pin Description (cont’d) Please note : GNDL has to be connected directly to GND Final Datasheet 6 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Block Diagram 3 Block Diagram VCC High Side Voltage Supply UVLO VSH SD InH RX Logic OutH GNDH InL CLT CPO TX VSL CP+ CP OPO OP+ OP GND Input Logic CP Delay UVLO OP Voltage Supply Low Side OutL GNDL Figure 2 Block Diagram Final Datasheet 7 September 2007 Final Data 4 4.1 High and Low Side Driver 2ED020I12-FI Functional Description Functional Description Power Supply The power supply of both sides, “VSL” and “VSH”, is monitored by an undervoltage lockout block (UVLO) which enables operation of the corresponding side when the supply voltage reaches the “on” threshold. Afterwards the internal voltage reference and the biasing circuit are enabled. When the supply voltage (VSL, VSH) drops below the “off” threshold, the circuit is disabled. 4.2 Logic Inputs The logic inputs InH, InL and SD are fed into Schmitt-Triggers with thresholds compatible to 3.3V and 5V TTL. When SD is enabled (low), InH and InL are disabled. If InH is high (while InL is low), OutH is enabled and vice versa. However, if both signals are high, they are internally disabled until one of them gets low again. This is due to the interlocking logic of the device. See Figure 3 (section 4.7). 4.3 Gate Driver 2ED020I12-FI features two hard-switching gate drivers with N-channel output stages capable to source 1A and to sink 2A peak current. Both drivers are equipped with activelow-clamping capability. Furthermore, they feature a large ground bounce ruggedness in order to compensate ground bounces caused by a turn-off of the driven IGBT. 4.4 General Purpose Operational Amplifier This general purpose operational amplifier can be applied for current measurement of the driven low-side IGBT. It is dedicated for fast operation with a gain of at least 3. The OP is equipped with a -0.1 to 2V input stage and a rail-to-rail output stage which is capable to drive ± 5mA. 4.5 General Purpose Comparator The general purpose comparator can be applied for overcurrent detection of the low side IGBT. A dedicated offset as well as a pull-up and pull-down resistor has been introduced to its inputs for security reasons. 4.6 Coreless Transformer (CLT) In order to enable signal transmission across the isolation barrier between low-side and high-side driver, a transformer based on CLT-Technology is employed. Signals, that are to be transmitted, are specially encoded by the transmitter and correspondingly restored by the receiver. In this way EMI due to variations of GNDH (dVGNDH/dt) or the magnetic flux density (dΗ/dt) can be suppresed.To compensate the additional propagation delay Final Datasheet 8 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Functional Description of transmitter, level shifter and receiver, a dedicated propagation delay is introduced into the low-side driver. 4.7 Diagrams InH InL /SD OutH OutL Figure 3 Input/Output Timing Diagram Final Datasheet 9 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Electrical Parameters 5 5.1 Electrical Parameters Absolute Maximum Ratings Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of the integrated circuit. Unless otherwise noted all parameters refer to GND. Parameter High side ground High side supply voltage Low side ground Low side supply voltage Logic input voltages (InH, InL, SD) OP input voltages (OP–, OP+) OP output voltage CP input voltages (CP–, CP+) CP output voltage CP output maximal sink current High side ground, voltage transient ESD Capability Package power disipation @TA = 25°C Thermal resistance (both chips active), junction to ambient Symbol min. GNDH VSH GNDL VSL VIN VOP VOPO VCP VCPO ICPO dVGNDH /dt – 50 VESD PD RTHJA — — — – 1200 – 0.3 – 0.3 – 0.3 – 0.3 – 0.3 – 0.3 – 0.3 – 0.3 – 0.3 – 0.3 — Limit Values max. 1200 20 VSH + 0.3 5.3 20 VSL + 0.3 5.3 5.3 5.3 5.3 5.3 5 50 2 1.4 90 V V V V V V V V V V V mA V/ns kV W K/W 5) 4) 4) 2) 3) 1) 1) Unit Remarks High side gate driver output OutH Low side gate driver output OutL Human Body Model 6) 7) Final Datasheet 10 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Electrical Parameters Parameter Thermal resistance (high side chip), junction to ambient Thermal resistance (low side chip), junction to ambient Junction temperature Storage temperature 1) 2) 3) 4) 5) 6) 7) Symbol min. RTHJA(HS) Limit Values max. — 110 Unit K/W Remarks 6) RTHJA(LS) — 110 K/W 6) TJ TS – 55 — 150 150 °C °C With reference to high side ground GNDH. With respect to both GND and GNDL. With respect to GNDL. Please note the different specifications for the operating range (section 5.2). According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5kΩ series resistor). Considering Rth(both chips active)=90K/W Device soldered to reference PCB without cooling area 5.2 Operating Range Note: Within the operating range the IC operates as described in the functional description. Unless otherwise noted all parameters refer to GND. Parameter High side ground High side supply voltage Low side supply voltage Logic input voltages (InH, InL, SD) OP input voltages (OP–, OP+) CP input voltages (CP–, CP+) Symbol min. GNDH VSH VSL VIN VOP VCP – 1200 14 14 0 – 0.1 – 0.1 Limit Values max. 1200 18 18 5 2 2 V V V V V V 1) 2) Unit Remarks Final Datasheet 11 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Electrical Parameters Parameter Junction temperature Symbol min. TJ – 40 Limit Values max. 105 Unit °C Remarks Industrial applications, useful lifetime 87600h Other applications, useful lifetime 15000h Junction temperature TJ – 40 125 °C 1) 2) With reference to high side ground GNDH. With respect to both GND and GNDL. 5.3 Electrical Characteristics Note: The electrical characteristics involve the spread of values guaranteed for the supply voltages, load and junction temperature given below. Typical values represent the median values, which are related to production processes. Unless otherwise noted all voltages are given with respect to ground (GND). VSL = VSH – GNDH = 15 V, CL = 1 nF, TA = 25 °C. Positive currents are assumed to be flowing into pins. Voltage Supply Parameter High side leakage current High side quiescent supply current Symbol min. IGNDH IVSH — — — 10.9 — 0.7 Limit Values typ 0 2.4 2.3 12.2 11.2 1 max. — 3.2 3.2 13.5 — 1.3 µA mA mA V V V GNDH = 1.2 kV GNDL = 0 V VSH = 15 V1) VSH = 15 V1) TJ = 125 °C Unit Test Condition High side undervoltage VVSH1) lockout, upper threshold High side undervoltage VVSH1) lockout, lower threshold High side undervoltage ∆VVSH lockout hysteresis Final Datasheet 12 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Electrical Parameters Voltage Supply (cont’d) Parameter Low side quiescent supply current Symbol min. IVSL — Limit Values typ 3.9 3.9 10.7 — 0.7 12 11 1 max. 5.0 5.5 13.3 — 1.3 mA mA V V V VSL = 15 V VSL = 15 V TJ = 125 °C Unit Test Condition Low side undervoltage VVSL lockout, upper threshold Low side undervoltage VVSL lockout, lower threshold Low side undervoltage lockout hysteresis 1) ∆VVSL With reference to high side ground GNDH. Logic Inputs Parameter Symbol min. Logic “1” input voltages VIN (InH, InL, SD) Logic “0” input voltages VIN (InH, InL, SD) Logic “1” input currents IIN (InH, InL) Logic “0” input currents IIN (InH, InL) Logic “1” input currents IIN (SD) Logic “0” input currents IIN (SD) 2 — — — — –60 0 0 –40 Limit Values typ — — 40 max. — 0.8 55 — — — V V µA µA µA µA VIN = 5 V VIN = 0 V VIN = 5 V VIN = 0 V Unit Test Condition Final Datasheet 13 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Electrical Parameters Gate Drivers Parameter High side high level output voltage High side low level output voltage Low side high level output voltage Low side low level output voltage Output high peak current (OutL, OutH) Symbol min. VVSH – VOutH VOutH1) VVSL – VOutL VOutL IOut 2 — — — — — — — Limit Values typ 1.4 — 1.4 — — — 2.6 2.7 max. 1.7 0.1 1.7 0.1 –1 — 3 3.2 V V V V A A V V IOutH = –1mA VInH = 5V IOutH = 1mA VInH = 0V IOutL = –1mA VInL = 5V IOutL = 1mA VInL = 0V VIN = 5 V VOut = 0 V VIN = 0 V VOut = 15 V InH =0V, VSH open IOutH =200mA InH =0V, VSH open IOutH =200mA TJ = 125 °C InL =0V, VSL open IOutL =200mA InL =0V, VSL open IOutL =200mA TJ = 125 °C Unit Test Condition Output low peak current IOut (OutL, OutH) High side active low clamping VOutH1) Low side active low clamping VOutL — — 2.6 2.7 3 3.2 V V 1) With reference to high side ground GNDH. Dynamic Characteristics Parameter Turn-on propagation delay Symbol min. tON — — Limit Values typ 85 95 max. 105 120 ns ns GNDH = 0 V 20% Vout GNDH = 0 V 20% Vout TJ = 125 °C Unit Test Condition Final Datasheet 14 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Electrical Parameters Dynamic Characteristics (cont’d) Parameter Turn-off propagation delay Symbol min. tOFF — — Shutdown propagation delay Turn-on rise time tSD — — tr — — Turn-off fall time tf — — Delay mismatch (high & ∆t low side turn-on/off) — — Minimum turn-on input (InH, InL) pulse width Minimum turn-off input (InH, InL) pulse width 1) Limit Values typ 85 100 85 100 20 30 20 25 15 15 50 55 50 55 max. 115 130 115 130 40 50 35 40 25 30 75 80 75 80 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns Test Condition 80% Vout 80% Vout TJ = 125 °C 80% Vout 80% Vout TJ = 125 °C 20% to 80% Vout 20% to 80% Vout TJ = 125 °C 80% to 20% Vout 80% to 20% Vout TJ = 125 °C TJ = 25°C see Figure 6 TJ = 125°C see Figure 6 1) 1) 1) 1) tpON tpOFF — — — — TJ = 125°C TJ = 125 °C InH-Pulses shorter than the “minimum turn-on(off) input pulse width” are prolonged to 50ns (See Figure 7). InLInput doesn´t have this feature. General Purpose Operational Amplifier OP Parameter OP input offset voltage OP input offset voltage drift OP input high currents (OP–, OP+) Final Datasheet Symbol min. ∆VIN VDrift IIN Limit Values typ 0 ±15 0 max. 10 — 0.2 –10 — — Unit mV µV/K µA Test Condition VIN = 2 V 15 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Electrical Parameters General Purpose Operational Amplifier OP (cont’d) Parameter OP input low currents (OP–, OP+) OP high output voltage OP low output voltage OP output source current OP output sink current Symbol min. IIN VOPO VOPO IOPO – 0.2 4.9 — — Limit Values typ 0 — — — max. — — 0.1 –5 µA V V mA VIN = 0 V VOP– = 0 V VOP+ = 2 V VOP– = 2 V VOP+ = 0 V VOP+ = 2 V VOP– = 0 V VOPO = 0 V VOP+ = 0 V VOP– = 2 V VOPO = 5 V 1) Unit Test Condition IOPO 5 — — mA OP open loop gain OP gain-bandwidth product OP phase margin 2) 1) 2) AOL A x BW Φ — — — 120 20 70 — — — dB MHz ° 1) Design value Due to inevitable parasitics a minimal gain of 3 is recommended General Purpose Comparator CP Parameter CP input offset voltage CP input high current CP input low current CP low output voltage CP output leakage current Symbol min. ∆VIN ICP– ICP+ VCPO ICPO –45 — –35 — — Limit Values typ –30 20 –20 — — max. –15 35 — 0.2 5 mV µA µA V µA VCP+ = VCPVCP– = 5V VCP+ = 0 V VCP+ = 2 V ICPO = 1 mA VCP+ = 0 V VCP– = 2 V VCPO = 5 V Unit Test Condition Final Datasheet 16 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Electrical Parameters General Purpose Comparator CP (cont’d) Parameter CP switch-on delay Symbol min. td — Limit Values typ 100 max. — ns RCPO = 4.7kΩ Vres = 5V VCPO = 4V RCPO = 4.7kΩ Vres = 5V VCPO = 1V Unit Test Condition CP switch-off delay td — 300 — ns Final Datasheet 17 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Package Outline 6 Package Outline Note: dimensions are given in mm. 6.1 Soldering Profile The soldering profile qualified for 2ED020I12-FI (according to the standard IPC/JEDEC J-STD-020C) is moisture sensitivity level 3. The peak reflow temperature for its package (volume < 350 mm3) is 260 +0/-5 °C. Final Datasheet 18 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Diagrams 7 Diagrams InH/L 2V 0.8V tr 80% tOFF 80% OutH/L 20% 20% tON tf Figure 4 Switching Time Waveform Definition /SD 0.8V tSD 80% OutH/L Figure 5 Shutdown Waveform Definition Final Datasheet 19 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Diagrams InL 2V 0.8V 2V 0.8V InH OutL 80% 80% 20% 20% OutH tOFFL tONH tOFFH tONL ∆t = max (|tONH - tOFFL| , |tOFFH - tONL|) Figure 6 Delay Matching Waveform Definitions InH OutH 50ns 50ns Figure 7 Short InH-Pulses Prolongation Final Datasheet 20 September 2007 Final Data High and Low Side Driver 2ED020I12-FI Application Advices 8 Application Advices 8.1 Operational Amplifier To minimize the current consumption when the operational amplifier is not used, it is necessary to connect both inputs properly, e.g connect OP+ to 5V and OP- to 0V or vice versa. On the other hand, the operational amplifier cannot operate with a follower configuration , i.e OP- = OPO. A minimum gain of 3 has to be used so that its output OPO has a stable behaviour. 8.2 Power Supply a) The connection of a capacitor (>10nF) as close as possible to the supply pins VSH, VSL is recommended for avoiding that possible oscillations in the supply voltage can cause erroneous operation of the output driver stage. Total value of capacitance connected to the supply terminals has to be determined by taking into account gatecharge, peak current, supply voltage and kind of power supply. b) If a bootstrap power supply for the high side driver is applied, a resistor of 10Ω minimum in series with the bootstrap diode is recommended. Final Datasheet 21 September 2007 Total Quality Management Qualität hat für uns eine umfassende Bedeutung. Wir wollen allen Ihren Ansprüchen in der bestmöglichen Weise gerecht werden. Es geht uns also nicht nur um die Produktqualität – unsere Anstrengungen gelten gleichermaßen der Lieferqualität und Logistik, dem Service und Support sowie allen sonstigen Beratungs- und Betreuungsleistungen. Dazu gehört eine bestimmte Geisteshaltung unserer Mitarbeiter. Total Quality im Denken und Handeln gegenüber Kollegen, Lieferanten und Ihnen, unserem Kunden. Unsere Leitlinie ist jede Aufgabe mit „Null Fehlern“ zu lösen – in offener Sichtweise auch über den eigenen Arbeitsplatz hinaus – und uns ständig zu verbessern. Unternehmensweit orientieren wir uns dabei auch an „top“ (Time Optimized Processes), um Ihnen durch größere Schnelligkeit den entscheidenden Wettbewerbsvorsprung zu verschaffen. Geben Sie uns die Chance, hohe Leistung durch umfassende Qualität zu beweisen. Wir werden Sie überzeugen. Quality takes on an all encompassing significance at Infineon AG. For us it means living up to each and every one of your demands in the best possible way. So we are not only concerned with product quality. We direct our efforts equally at quality of supply and logistics, service and support, as well as all the other ways in which we advise and attend to you. Part of this is the very special attitude of our staff. Total Quality in thought and deed, towards co-workers, suppliers and you, our customer. Our guideline is “do everything with zero defects”, in an open manner that is demonstrated beyond your immediate workplace, and to constantly improve. Throughout the corporation we also think in terms of Time Optimized Processes (top), greater speed on our part to give you that decisive competitive edge. Give us the chance to prove the best of performance through the best of quality – you will be convinced. http://www.infineon.com Published by Infineon Technologies AG