2N7002

2N7002 OptiMOS™ Small-Signal-Transistor Features • N-channel • Enhancement mode • Logic level • Avalanche rated • fast switching • Pb-free lead-plating; RoHS compliant • Qualified according to JEDEC(1) for target applications • Halogen-free according to IEC61249-2-21 Product Summary V DS R DS(on),max V GS=10 V V GS=4.5 V ID 60 3 4 0.3 PG-SOT23 3 V Ω A 1 2 Type 2N7002 Parameter Package PG-SOT-23 Tape and Reel Information H6327: 3000 pcs/reel Symbol Conditions ID T A=25 °C T A=70 °C Marking 72s HalogenFree Yes Value 0.30 0.24 1.2 1.3 6 ±20 Packing Non Dry Unit A Continuous drain current Pulsed drain current Avalanche energy, single pulse Reverse diode d v /dt Gate source voltage ESD class Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 (1) I D,pulse E AS dv /dt V GS T A=25 °C I D=0.3 A, R GS=25 Ω I D=0.3 A, V DS=48 V, di /dt =200 A/µs, T j,max=150 °C mJ kV/µs V JESD22-A114 (HBM) P tot (2) T j, T stg T A=25 °C class 0 (2|I D|R DS(on)max, I D=0.24 A S Perfomed on a 40x40mm2 FR4 PCB with both sided Cu sense-force traces, each 1mm wide, 70µm thick and 20mm long. (2) Rev. 2.3 page 2 2010-08-26 2N7002 Parameter Symbol Conditions min. Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics Gate to source charge Gate to drain charge Gate charge total Gate plateau voltage Reverse Diode Diode continous forward current Diode pulse current Diode forward voltage Reverse recovery time Reverse recovery charge IS I S,pulse V SD t rr Q rr T A=25 °C V GS=0 V, I F=0.5 A, T j=25 °C V R=30 V, I F=0.5 A, di F/dt =100 A/µs 0.96 8.5 2.4 0.3 1.2 1.2 13 4 V ns nC A Q gs Q gd Qg V plateau V DD=48 V, I D=0.5 A, V GS=0 to 10 V 0.05 0.2 0.4 4.0 0.1 0.4 0.6 V nC C iss C oss Crss t d(on) tr t d(off) tf V DD=30 V, V GS=10 V, I D=0.5 A, R G=6 Ω V GS=0 V, V DS=25 V, f =1 MHz 13 4.1 2.0 3.0 3.3 5.5 3.1 20 6 3 4.5 5 9 5 ns pF Values typ. max. Unit Rev. 2.3 page 3 2010-08-26 2N7002 1 Power dissipation P tot=f(T A) 2 Drain current I D=f(T A); V GS≥10 V 0.35 0.5 0.3 0.4 0.25 P tot [W] I D [A] 0.15 0.1 0.05 0 0 40 80 120 160 0 40 80 120 160 0.3 0.2 0.2 0.1 0 T A [°C] T A [°C] 3 Safe operating area I D=f(V DS); T A=25 °C; D =0 parameter: t p 101 4 Max. transient thermal impedance Z thJA=f(t p) parameter: D =t p/T 103 limited by on-state resistance 100 1 µs 0.5 10 µs 100 µs 2 10 0.2 10-1 1 ms 10 ms Z thJA [K/W] I D [A] 0.1 0.05 0.02 single pulse 101 10-2 DC 0.01 10-3 1 10 100 100 10-5 10-4 10-3 10-2 10-1 100 101 102 103 V DS [V] t p [s] Rev. 2.3 page 4 2010-08-26 2N7002 5 Typ. output characteristics I D=f(V DS); T j=25 °C parameter: V GS 0.6 5V 7V 2.9 V 3.2 V 3.5 V 4V 6 Typ. drain-source on resistance R DS(on)=f(I D); T j=25 °C parameter: V GS 6 0.5 10 V 4.5 V 4V 5 0.4 4 R DS(on) [Ω ] I D [A] 0.3 3.5 V 3 0.2 3.2 V 2 4.5 V 5V 10 V 7V 0.1 2.9 V 1 0 0 1 2 3 4 5 0 0 0.1 0.2 0.3 0.4 0.5 V DS [V] I D [A] 7 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max 8 Typ. forward transconductance g fs=f(I D); T j=25 °C 0.6 0.5 0.45 0.5 0.4 0.35 0.3 0.3 0.4 g fs [S] 0 1 2 3 4 5 I D [A] 0.25 0.2 0.2 0.15 0.1 0.05 0 0 0.0 0.1 0.2 0.3 0.4 0.5 0.1 V GS [V] I D [A] Rev. 2.3 page 5 2010-08-26 2N7002 9 Drain-source on-state resistance R DS(on)=f(T j); I D=0.3 A; V GS=10 V 10 Typ. gate threshold voltage V GS(th)=f(T j); V DS=VGS; I D=250 µA parameter: I D 6.0 3.2 5.0 2.8 2.4 4.0 2 98 % R DS(on) [Ω ] 3.0 V GS(th) [V] 98 % typ 1.6 2% 2.0 typ 1.2 0.8 1.0 0.4 0.0 -60 -20 20 60 100 140 0 -60 -20 20 60 100 140 T j [°C] T j [°C] 11 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz; Tj=25°C 12 Forward characteristics of reverse diode I F=f(V SD) parameter: T j 102 101 150 °C, 98% 100 25 °C 150 °C C [pF] 10 1 I F [A] Ciss 25 °C, 98% 10 -1 Coss 10-2 Crss 100 0 10 20 30 10-3 0 0.4 0.8 1.2 1.6 V DS [V] V SD [V] Rev. 2.3 page 6 2010-08-26 2N7002 13 Avalanche characteristics I AS =f(t AV ); R GS =25 Ω parameter: Tj(start) 100 14 Typ. gate charge V GS=f(Q gate); I D=0.5 A pulsed parameter: V DD 10 9 8 25 °C 100 °C 30 V 10 -1 125 °C 7 6 12 V 48 V V GS [V] 10-2 10-3 100 101 t AV [µs] 102 103 I AV [A] 5 4 3 2 1 0 0 0.1 0.2 0.3 0.4 0.5 Q gate [nC] 15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=250 µA 70 65 V BR(DSS) [V] 60 55 50 -40 0 40 80 120 160 T j [°C] Rev. 2.3 page 7 2010-08-26 2N7002 Package Outline: Footprint: Packing: Dimensions in mm Rev. 2.3 page 8 2010-08-26 2N7002 Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.3 page 9 2010-08-26