BF1005...
Silicon N-Channel MOSFET Tetrode • For low noise, high gain controlled input stages up to 1 GHz • Operating voltage 5V • Integrated biasing network
Drain AGC HF Input G2 G1 HF Output + DC
GND
EHA07215
ESD: Electrostatic discharge sensitive device, observe handling precaution!
Type BF1005 BF1005R BF1005W* * on request only
Maximum Ratings Parameter
Package SOT143 SOT143R SOT343 1=S 1=D 1=D 2=D 2=S 2=S
Pin Configuration 3=G2 3=G1 3=G1 4=G1 4=G2 4=G2 -
Marking MZs MZs MZ
Symbol VDS ID ±IG1/2SM +VG1SE Ptot
Value 8 25 10 3 200 200
Unit V mA V mW
Drain-source voltage Continuous drain current Gate 1/ gate 2-source current Gate 1 (external biasing) Total power dissipation TS ≤ 76 °C, BF1005, BF1005R TS ≤ 94 °C, BF1005W Storage temperature Channel temperature
Tstg Tch
-55 ... 150 150
°C
Note: It is not recommended to apply external DC-voltage on Gate 1 in active mode.
1 Feb-18-2004
BF1005...
Thermal Resistance Parameter Channel - soldering point 1) BF1005, BF1005R BF1005W Symbol
Rthchs ≤ 370 ≤ 280
Value
Unit K/W
Electrical Characteristics Parameter DC Characteristics Drain-source breakdown voltage ID = 650 µA, VG1S = 0 , VG2S = 0 Gate1-source breakdown voltage +IG1S = 10 mA, V G2S = 0 , VDS = 0 Gate2 source breakdown voltage ±IG2S = 10 mA, VG1S = 0 , V DS = 0 Gate1-source leakage current VG1S = 0 , VG2S = 6 V Gate 2 source leakage current ±V G2S = 8 V, VG1S = 0 , V DS = 0 Drain current VDS = 5 V, VG1S = 0 , VG2S = 4 V Operating current (selfbiased) VDS = 5 V, VG2S = 4 V Gate2-source pinch-off voltage VDS = 5 V, I D = 100 µA
1For calculation of R thJA please refer to Application Note Thermal Resistance
Symbol min. V(BR)DS +V(BR)G1SS ±V (BR)G2SS +IG1SS ±IG2SS IDSS IDSO VG2S(p) 12 8 8 8 -
Values typ. 100 10 1 max. 12 13 50 1.5 16 -
Unit
V
µA nA mA
V
2
Feb-18-2004
BF1005...
Electrical Characteristics Parameter AC Characteristics Symbol min. (verified by random sampling) gfs Cg1ss Cdss Gp F ∆G p 20 17 40 24 2.1 1.3 19 1.6 50 2.5 2.5 dB dB mS pF Forward transconductance VDS = 5 V, V G2S = 4.5 V Gate1 input capacitance VDS = 5 V, V G2S = 4 V, f = 1 MHz Output capacitance VDS = 5 V, V G2S = 4 V, f = 100 MHz Power gain (self biased) VDS = 5 V, V G2S = 4 V, f = 800 MHz Noise figure VDS = 5 V, V G2S = 4 V, f = 800 MHz Gain control range VDS = 5 V, V G2S = 4V ...0V, f = 800 GHz Values typ. max. Unit
3
Feb-18-2004
BF1005...
Total power dissipation Ptot = ƒ(TS) BF1005, BF1005R Total power dissipation Ptot = ƒ(TS) BF1005W
220
mW
220
mA
180 160
180 160
P tot
140 120 100 80 60 40 20 0 0 15 30 45 60 75 90 105 120 °C 150
P tot
140 120 100 80 60 40 20 0 0 15 30 45 60 75 90 105 120 °C 150
TS
TS
Drain current ID = ƒ(VG2S)
Insertion power gain |S21|² = ƒ(VG2S)
12
mA
10 dB 0 -5
10 9
|S21|²
V
8
-10 -15 -20
ID
7 6 5 4 3 2 1 0 0 0.5 1 1.5 2 2.5 3 3.5 4 5
-25 -30 -35 -40 -45 -50 -55 0 0.5 1 1.5 2 2.5 3 3.5 4
V
5
VG2S
VG2S
4
Feb-18-2004
BF1005...
Forward transfer admittance |Y21| = ƒ(VG2S)
26 mS 22 20 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0.5 1 1.5 2 2.5 3 3.5 4
V
Gate 1 input capacitance Cg1ss= ƒ(Vg2s) f = 200MHz
pF
3
16 14 12 10 8 6 4 2 0 0 5
Cg1ss
|Y 21|
18
0 0.5
1
1.5
2
2.5
3
3.5
4
4.5
V
5.5
VG2S
VG2S
Output capacitance C dss = ƒ(VG2S) f = 200MHz
pF
3
2.4 2.2
Cdss
2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 0.5 1 1.5 2 2.5 3 3.5 4
V
5
VG2S
5
Feb-18-2004
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