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BG5412K

BG5412K

  • 厂商:

    INFINEON

  • 封装:

  • 描述:

    BG5412K - Dual N-Channel MOSFET Tetrode - Infineon Technologies AG

  • 数据手册
  • 价格&库存
BG5412K 数据手册
BG5412K Dual N-Channel MOSFET Tetrode • Designed for input stages of 2 band tuners • Two AGC amplifiers in one single package, with on-chip internal switch • Only one switching line to control both FETs • Integrated gate protection diodes • Ultra low noise figure • Excellent cross modulation at gain reduction • Integrated ESD gate protection diodes • Pb-free (RoHS compliant) package • Qualified according AEC Q101 Detailed functional diagram on page 5 4 5 6 1 2 3 BG5412K 6 5 4 A 1 2 B 3 ESD (Electrostatic discharge) sensitive device, observe handling precaution! Type BG5412K Package SOT363 1=G1* 2=G2 Pin Configuration 3=G1** 4=D** 5=S 6=D* Marking K2s * For amp. A; ** for amp. B 180° rotated tape loading orientation available 1 2009-10-01 BG5412K Maximum Ratings Parameter Drain-source voltage Continuous drain current amp. A amp. B Gate 1/ gate 2-source current Gate 1/ gate 2-source voltage Total power dissipation TS ≤ 94 °C Storage temperature Channel temperature Tstg Tch -55 ... 150 150 °C IG1S, IG2S VG1S, VG2S Ptot Symbol VDS ID 25 25 ±1 ±6 200 mA V mW Value 8 Unit V mA Thermal Resistance Parameter Symbol Rthchs Value ≤ 280 Unit Channel - soldering point 1) 1For K/W calculation of RthJA please refer to Application Note Thermal Resistance 2 2009-10-01 BG5412K Electrical Characteristics at TA = 25°C, unless otherwise specified Parameter DC Characteristics Drain-source breakdown voltage ID = 100 µA, VG1S = 0 , VG2S = 0 Gate1-source breakdown voltage +IG1S = 10 mA, V G2S = 0 , VDS = 0 Gate2-source breakdown voltage +IG2S = 10 mA, V G1S = 0 , VDS = 0 Gate1-source leakage current VG1S = 6 V, VG2S = 0 , VDS = 0 Gate2-source leakage current VG2S = 8 V, VG1S = 0 Drain current VDS = 5 V, VG1S = 0 , VG2S = 4 V Drain-source current VDS = 5 V, VG2S = 4 V, RG1 = 120 kΩ, amp. B VDS = 5 V, VG2S= 4 V, selfbiased, amp. A Gate1-source pinch-off voltage VDS = 5 V, VG2S = 4 V, ID = 100 µA Gate2-source pinch-off voltage VDS = 5 V, I D = 100 µA VG2S(p) 0.7 VG1S(p) 0.7 V 14 18 IDSX mA IDSS 100 µA +IG2SS 50 +IG1SS 50 nA +V(BR)G2SS 6 15 +V(BR)G1SS 6 15 V(BR)DS 12 V Symbol min. Values typ. max. Unit 3 2009-10-01 BG5412K Electrical Characteristics at TA = 25°C, unless otherwise specified Parameter Symbol min. Forward transconductance amp. A amp. B Gate1 input capacitance amp. A amp. B Output capacitance amp. A amp. B Power gain f= 800 MHz, amp. A f= 800 MHz, amp. B f= 45 MHz, amp. A f= 45 MHz, amp. B Noise figure f= 800 MHz, amp. A f= 800 MHz, amp. B f= 45 MHz, amp. A f= 45 MHz, amp. B Gain control range VG2S = 4...0 V, f = 800 MHz Cross-modulation k=1%, f W=50MHz, funw=60MHz Xmod amp. A, AGC = 0 dB amp. B, AGC = 0 dB amp. A, AGC = 10 dB amp. B, AGC = 10 dB amp. A, AGC = 40 dB amp. B, AGC = 40 dB 97 96 94 91 105 103 ∆G p F 1.1 1.2 0.8 0.9 45 Gp 24 24 34 31 dB Cdss 0.9 0.8 dB Cg1ss 2.2 2 gfs 33 30 pF Values typ. max. mS Unit AC Characteristics V DS = 5 V, VG2 = 4 V, ID = 10 mA (verified by random sampling) 4 2009-10-01 BG5412K Functional diagram shows pinning of BG5412K, switching pin at PIN 3 (RFoutA) DA (Ground) S (RFoutB) Amp. B Amp. A VGG bias network partially integrated bias network fully integrated DB S Amp. A Amp. B Vgg = 5 V : Amp. A is OFF ; Amp. B is ON Vgg = 0 V : Amp. A is ON ; Amp. B is OFF Amp. A and Amp. B share G2 and S pins G2 Int. switch G2 (RFinA) G1A G2 (AGC) (RFinB) Rg1 G1B VGG 5 2009-10-01 BG5412K Total power dissipation Ptot = ƒ(TS) Drain current ID = ƒ(IG1) VG2S = 4V, amp. B VDS= 5 V 220 mA mA 30 180 160 P tot 120 15 100 80 60 40 20 0 0 15 30 45 60 75 90 105 120 °C 150 0 0 10 20 30 40 50 µA ID 10 5 140 20 70 TS IG1 Output characteristics ID = ƒ(V DS) VG2 = 4 V, amp. A VG1 = Parameter 20 mA 1.5V Output characteristics ID = ƒ(V DS) VG2 = 4 V, amp. B VG1 = Parameter 20 mA 1.6V 16 14 1.4V 16 14 1.5V ID 12 10 8 6 4 2 0 0 ID 1.4V 1.3V 12 10 1.3V 1.2V 8 1.2V 1.1V 6 4 2 2 4 6 8 V 12 0 0 2 4 6 8 10 V 14 VDS VDS 6 2009-10-01 BG5412K Gate 1 current IG1 = ƒ(V G1S) VDS = 5V VG2S = Parameter 150 Gate 1 forward transconductance g fs = ƒ(ID); amp.A VDS = 5V, VG2S = Parameter 45 mS 4V µA 4V 35 100 3.5V I G1 G fs 30 25 3V 75 3V 20 50 2.5V 2.5V 15 10 1.5V 2V 2V 25 5 0 0 0 0 0.4 0.8 1.2 1.6 2 2.4 V 3.2 5 10 15 20 25 30 35 40 mA 50 VG1S ID Gate 1 forward transconductance g fs = ƒ(ID), amp. B VDS = 5V, VG2S = Parameter 40 mS 4V Drain current ID = ƒ(V G1S) VDS = 5V, amp. A VG2S = Parameter 36 mA 4V 3V 2.5V 30 25 20 15 10 5 0 -5 0 2V 2.5V 3V 3.5V 28 24 2V Gfs ID 20 16 12 8 4 0 0 1.5V 5 10 15 20 25 30 35 mA 45 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 V 2 ID VG1S 7 2009-10-01 BG5412K Drain current ID = ƒ(VG1S) VDS = 5V, amp. B VG2S = Parameter 32 mA 4V 3V 2.5V Drain current ID = ƒ(V GG), amp. B VDS = 5V, VG2S = 4V, RG1 = 100kΩ (connected to VGG, V GG=gate1 supply voltage) 16 mA 24 12 ID 2V 16 ID 20 10 8 12 1.5V 6 8 4 4 2 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 V 2 0 0 1 2 3 V 5 VG1S VGG Drain current ID = ƒ(VGG ), amp. B VDS = 5V, VG2S = 4V (connected to VGG, VGG =gate1 supply voltage) 28 mA 24 22 20 82K 100K 120K 150K 180K 56K Drain current of FET A and FET B as function of Gate 1 FET B 22 mA FET A 68K 18 16 ID 16 14 12 10 8 6 4 2 0 0 1 2 3 4 V ID 18 14 12 10 8 6 4 2 FET B 6 0 0 0.2 0.4 0.6 0.8 1 1.2 V 1.6 VGG=VDS VG1_B 8 2009-10-01 BG5412K AGC characteristic AGC = ƒ(VG2S) f= 45 MHz, amp. A AGC characteristic AGC = ƒ(V G2S) f= 45 MHz, amp. B 0 dB -10 -15 -20 0 dB -10 -15 -20 120k AGC -25 -30 -35 -40 -45 -50 -55 -60 -65 -70 0 0.5 1 1.5 2 2.5 3 V AGC -25 -30 -35 -40 -45 -50 -55 -60 -65 82k 4 -70 0 0.5 1 1.5 2 2.5 3 V 4 VG2S VG2S AGC characteristic AGC = ƒ(VG2S) f= 800MHz, amp. A 0 dB AGC characteristic AGC = ƒ(V G2S) f= 800 MHz, amp. B 0 dB -10 -15 -10 -15 120k 82k AGC -25 -30 -35 -40 -45 -50 -55 -60 0 0.5 1 1.5 2 2.5 3 V AGC -20 -20 -25 -30 -35 -40 -45 -50 -55 4 -60 0 0.5 1 1.5 2 2.5 3 V 4 VG2S VG2S 9 2009-10-01 BG5412K Crossmodulation Vunw = (AGC) VDS = 5 V, Rg1 = 120 kΩ amp.A 115 Crossmodulation Vunw = (AGC) VDS = 5 V, Rg1 = 56 kΩ amp.B 115 dBµV dBµV V unw 105 V unw 105 82k 120k 100 100 95 95 90 90 85 0 5 10 15 20 25 30 35 40 dB 50 85 0 5 10 15 20 25 30 35 40 dB 50 AGC AGC 10 2009-10-01 BG5412K Crossmodulation test circuit VAGC VDS 4n7 R1 10kΩ 4n7 2.2 uH 4n7 RL 50Ω RGEN 50Ω 4n7 50 Ω RG1 VGG Semibiased VAGC VDS 4n7 R1 10kΩ 4n7 2.2 uH 4n7 RL 50Ω RGEN 50Ω 4n7 50 Ω fullbiased 11 2009-10-01 Package SOT363 BG5412K Package Outline 2 ±0.2 0.2 -0.05 +0.1 0.9 ±0.1 6x 0.1 4 1.25 ±0.1 2.1 ±0.1 M 0.1 MAX. 0.1 A 6 5 Pin 1 marking 1 2 3 0.1 MIN. 0.65 0.65 0.2 M 0.15 +0.1 -0.05 A Foot Print 0.3 0.9 0.7 0.65 0.65 Marking Layout (Example) Small variations in positioning of Date code, Type code and Manufacture are possible. 1.6 Manufacturer 2005, June Date code (Year/Month) Pin 1 marking Laser marking BCR108S Type code Standard Packing Reel ø180 mm = 3.000 Pieces/Reel Reel ø330 mm = 10.000 Pieces/Reel For symmetric types no defined Pin 1 orientation in reel. 4 0.2 2.3 8 Pin 1 marking 2.15 1.1 12 2009-10-01 BG5412K Edition 2006-02-01 Published by Infineon Technologies AG 81726 München, Germany © Infineon Technologies AG 2007. All Rights Reserved. Attention please! The information given in this dokument shall in no event be regarded as a guarantee of conditions or characteristics (“Beschaffenheitsgarantie”). With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office ( www.infineon.com ). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. 13 2009-10-01
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